1/* 2 * ALSA driver for RME Digi9652 audio interfaces 3 * 4 * Copyright (c) 1999 IEM - Winfried Ritsch 5 * Copyright (c) 1999-2001 Paul Davis 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23#include <linux/delay.h> 24#include <linux/init.h> 25#include <linux/interrupt.h> 26#include <linux/pci.h> 27#include <linux/moduleparam.h> 28 29#include <sound/core.h> 30#include <sound/control.h> 31#include <sound/pcm.h> 32#include <sound/info.h> 33#include <sound/asoundef.h> 34#include <sound/initval.h> 35 36#include <asm/current.h> 37#include <asm/io.h> 38 39static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 40static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 41static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 42static int precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */ 43 44module_param_array(index, int, NULL, 0444); 45MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard."); 46module_param_array(id, charp, NULL, 0444); 47MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard."); 48module_param_array(enable, bool, NULL, 0444); 49MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards."); 50module_param_array(precise_ptr, bool, NULL, 0444); 51MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably)."); 52MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch"); 53MODULE_DESCRIPTION("RME Digi9652/Digi9636"); 54MODULE_LICENSE("GPL"); 55MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall}," 56 "{RME,Hammerfall-Light}}"); 57 58/* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for 59 capture, one for playback. Both the ADAT and S/PDIF channels appear 60 to the host CPU in the same block of memory. There is no functional 61 difference between them in terms of access. 62 63 The Hammerfall Light is identical to the Hammerfall, except that it 64 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback. 65*/ 66 67#define RME9652_NCHANNELS 26 68#define RME9636_NCHANNELS 18 69 70/* Preferred sync source choices - used by "sync_pref" control switch */ 71 72#define RME9652_SYNC_FROM_SPDIF 0 73#define RME9652_SYNC_FROM_ADAT1 1 74#define RME9652_SYNC_FROM_ADAT2 2 75#define RME9652_SYNC_FROM_ADAT3 3 76 77/* Possible sources of S/PDIF input */ 78 79#define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */ 80#define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */ 81#define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */ 82 83/* ------------- Status-Register bits --------------------- */ 84 85#define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */ 86#define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */ 87#define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */ 88#define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */ 89#define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */ 90#define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */ 91 /* bits 6-15 encode h/w buffer pointer position */ 92#define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */ 93#define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */ 94#define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */ 95#define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */ 96#define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */ 97#define RME9652_tc_out (1<<21) /* time-code out bit */ 98#define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */ 99#define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */ 100#define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */ 101#define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */ 102#define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */ 103#define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */ 104#define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */ 105 106#define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2) 107#define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2) 108#define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2) 109#define rme9652_decode_spdif_rate(x) ((x)>>22) 110 111/* Bit 6..15 : h/w buffer pointer */ 112 113#define RME9652_buf_pos 0x000FFC0 114 115/* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later 116 Rev G EEPROMS and Rev 1.5 cards or later. 117*/ 118 119#define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos)) 120 121/* amount of io space we remap for register access. i'm not sure we 122 even need this much, but 1K is nice round number :) 123*/ 124 125#define RME9652_IO_EXTENT 1024 126 127#define RME9652_init_buffer 0 128#define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */ 129#define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */ 130#define RME9652_control_register 64 131#define RME9652_irq_clear 96 132#define RME9652_time_code 100 /* useful if used with alesis adat */ 133#define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */ 134 135/* Read-only registers */ 136 137/* Writing to any of the register locations writes to the status 138 register. We'll use the first location as our point of access. 139*/ 140 141#define RME9652_status_register 0 142 143/* --------- Control-Register Bits ---------------- */ 144 145 146#define RME9652_start_bit (1<<0) /* start record/play */ 147 /* bits 1-3 encode buffersize/latency */ 148#define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */ 149#define RME9652_IE (1<<5) /* Interrupt Enable */ 150#define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */ 151#define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */ 152#define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */ 153#define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */ 154#define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */ 155#define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */ 156#define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */ 157#define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */ 158#define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */ 159#define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */ 160#define RME9652_SyncPref_ADAT2 (1<<16) 161#define RME9652_SyncPref_ADAT3 (1<<17) 162#define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */ 163#define RME9652_SPDIF_SELECT (1<<19) 164#define RME9652_SPDIF_CLOCK (1<<20) 165#define RME9652_SPDIF_WRITE (1<<21) 166#define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */ 167 168/* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */ 169 170#define RME9652_latency 0x0e 171#define rme9652_encode_latency(x) (((x)&0x7)<<1) 172#define rme9652_decode_latency(x) (((x)>>1)&0x7) 173#define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS) 174#define RME9652_inp (RME9652_inp_0|RME9652_inp_1) 175#define rme9652_encode_spdif_in(x) (((x)&0x3)<<14) 176#define rme9652_decode_spdif_in(x) (((x)>>14)&0x3) 177 178#define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 179#define RME9652_SyncPref_ADAT1 0 180#define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3) 181 182/* the size of a substream (1 mono data stream) */ 183 184#define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024) 185#define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES) 186 187/* the size of the area we need to allocate for DMA transfers. the 188 size is the same regardless of the number of channels - the 189 9636 still uses the same memory area. 190 191 Note that we allocate 1 more channel than is apparently needed 192 because the h/w seems to write 1 byte beyond the end of the last 193 page. Sigh. 194*/ 195 196#define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES) 197#define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024) 198 199struct snd_rme9652 { 200 int dev; 201 202 spinlock_t lock; 203 int irq; 204 unsigned long port; 205 void __iomem *iobase; 206 207 int precise_ptr; 208 209 u32 control_register; /* cached value */ 210 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */ 211 212 u32 creg_spdif; 213 u32 creg_spdif_stream; 214 215 char *card_name; /* hammerfall or hammerfall light names */ 216 217 size_t hw_offsetmask; /* &-with status register to get real hw_offset */ 218 size_t prev_hw_offset; /* previous hw offset */ 219 size_t max_jitter; /* maximum jitter in frames for 220 hw pointer */ 221 size_t period_bytes; /* guess what this is */ 222 223 unsigned char ds_channels; 224 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */ 225 226 struct snd_dma_buffer playback_dma_buf; 227 struct snd_dma_buffer capture_dma_buf; 228 229 unsigned char *capture_buffer; /* suitably aligned address */ 230 unsigned char *playback_buffer; /* suitably aligned address */ 231 232 pid_t capture_pid; 233 pid_t playback_pid; 234 235 struct snd_pcm_substream *capture_substream; 236 struct snd_pcm_substream *playback_substream; 237 int running; 238 239 int passthru; /* non-zero if doing pass-thru */ 240 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */ 241 242 int last_spdif_sample_rate; /* so that we can catch externally ... */ 243 int last_adat_sample_rate; /* ... induced rate changes */ 244 245 char *channel_map; 246 247 struct snd_card *card; 248 struct snd_pcm *pcm; 249 struct pci_dev *pci; 250 struct snd_kcontrol *spdif_ctl; 251 252}; 253 254/* These tables map the ALSA channels 1..N to the channels that we 255 need to use in order to find the relevant channel buffer. RME 256 refer to this kind of mapping as between "the ADAT channel and 257 the DMA channel." We index it using the logical audio channel, 258 and the value is the DMA channel (i.e. channel buffer number) 259 where the data for that channel can be read/written from/to. 260*/ 261 262static char channel_map_9652_ss[26] = { 263 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 264 18, 19, 20, 21, 22, 23, 24, 25 265}; 266 267static char channel_map_9636_ss[26] = { 268 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 269 /* channels 16 and 17 are S/PDIF */ 270 24, 25, 271 /* channels 18-25 don't exist */ 272 -1, -1, -1, -1, -1, -1, -1, -1 273}; 274 275static char channel_map_9652_ds[26] = { 276 /* ADAT channels are remapped */ 277 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 278 /* channels 12 and 13 are S/PDIF */ 279 24, 25, 280 /* others don't exist */ 281 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 282}; 283 284static char channel_map_9636_ds[26] = { 285 /* ADAT channels are remapped */ 286 1, 3, 5, 7, 9, 11, 13, 15, 287 /* channels 8 and 9 are S/PDIF */ 288 24, 25 289 /* others don't exist */ 290 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 291}; 292 293static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size) 294{ 295 dmab->dev.type = SNDRV_DMA_TYPE_DEV; 296 dmab->dev.dev = snd_dma_pci_data(pci); 297 if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) { 298 if (dmab->bytes >= size) 299 return 0; 300 } 301 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 302 size, dmab) < 0) 303 return -ENOMEM; 304 return 0; 305} 306 307static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) 308{ 309 if (dmab->area) { 310 dmab->dev.dev = NULL; /* make it anonymous */ 311 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci)); 312 } 313} 314 315 316static DEFINE_PCI_DEVICE_TABLE(snd_rme9652_ids) = { 317 { 318 .vendor = 0x10ee, 319 .device = 0x3fc4, 320 .subvendor = PCI_ANY_ID, 321 .subdevice = PCI_ANY_ID, 322 }, /* RME Digi9652 */ 323 { 0, }, 324}; 325 326MODULE_DEVICE_TABLE(pci, snd_rme9652_ids); 327 328static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val) 329{ 330 writel(val, rme9652->iobase + reg); 331} 332 333static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg) 334{ 335 return readl(rme9652->iobase + reg); 336} 337 338static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652) 339{ 340 unsigned long flags; 341 int ret = 1; 342 343 spin_lock_irqsave(&rme9652->lock, flags); 344 if ((rme9652->playback_pid != rme9652->capture_pid) && 345 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) { 346 ret = 0; 347 } 348 spin_unlock_irqrestore(&rme9652->lock, flags); 349 return ret; 350} 351 352static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652) 353{ 354 if (rme9652_running_double_speed(rme9652)) { 355 return (rme9652_read(rme9652, RME9652_status_register) & 356 RME9652_fs48) ? 96000 : 88200; 357 } else { 358 return (rme9652_read(rme9652, RME9652_status_register) & 359 RME9652_fs48) ? 48000 : 44100; 360 } 361} 362 363static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652) 364{ 365 unsigned int i; 366 367 i = rme9652->control_register & RME9652_latency; 368 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8)); 369 rme9652->hw_offsetmask = 370 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos; 371 rme9652->max_jitter = 80; 372} 373 374static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652) 375{ 376 int status; 377 unsigned int offset, frag; 378 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4; 379 snd_pcm_sframes_t delta; 380 381 status = rme9652_read(rme9652, RME9652_status_register); 382 if (!rme9652->precise_ptr) 383 return (status & RME9652_buffer_id) ? period_size : 0; 384 offset = status & RME9652_buf_pos; 385 386 /* The hardware may give a backward movement for up to 80 frames 387 Martin Kirst <martin.kirst@freenet.de> knows the details. 388 */ 389 390 delta = rme9652->prev_hw_offset - offset; 391 delta &= 0xffff; 392 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4) 393 offset = rme9652->prev_hw_offset; 394 else 395 rme9652->prev_hw_offset = offset; 396 offset &= rme9652->hw_offsetmask; 397 offset /= 4; 398 frag = status & RME9652_buffer_id; 399 400 if (offset < period_size) { 401 if (offset > rme9652->max_jitter) { 402 if (frag) 403 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset); 404 } else if (!frag) 405 return 0; 406 offset -= rme9652->max_jitter; 407 if ((int)offset < 0) 408 offset += period_size * 2; 409 } else { 410 if (offset > period_size + rme9652->max_jitter) { 411 if (!frag) 412 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset); 413 } else if (frag) 414 return period_size; 415 offset -= rme9652->max_jitter; 416 } 417 418 return offset; 419} 420 421static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652) 422{ 423 int i; 424 425 /* reset the FIFO pointer to zero. We do this by writing to 8 426 registers, each of which is a 32bit wide register, and set 427 them all to zero. Note that s->iobase is a pointer to 428 int32, not pointer to char. 429 */ 430 431 for (i = 0; i < 8; i++) { 432 rme9652_write(rme9652, i * 4, 0); 433 udelay(10); 434 } 435 rme9652->prev_hw_offset = 0; 436} 437 438static inline void rme9652_start(struct snd_rme9652 *s) 439{ 440 s->control_register |= (RME9652_IE | RME9652_start_bit); 441 rme9652_write(s, RME9652_control_register, s->control_register); 442} 443 444static inline void rme9652_stop(struct snd_rme9652 *s) 445{ 446 s->control_register &= ~(RME9652_start_bit | RME9652_IE); 447 rme9652_write(s, RME9652_control_register, s->control_register); 448} 449 450static int rme9652_set_interrupt_interval(struct snd_rme9652 *s, 451 unsigned int frames) 452{ 453 int restart = 0; 454 int n; 455 456 spin_lock_irq(&s->lock); 457 458 if ((restart = s->running)) { 459 rme9652_stop(s); 460 } 461 462 frames >>= 7; 463 n = 0; 464 while (frames) { 465 n++; 466 frames >>= 1; 467 } 468 469 s->control_register &= ~RME9652_latency; 470 s->control_register |= rme9652_encode_latency(n); 471 472 rme9652_write(s, RME9652_control_register, s->control_register); 473 474 rme9652_compute_period_size(s); 475 476 if (restart) 477 rme9652_start(s); 478 479 spin_unlock_irq(&s->lock); 480 481 return 0; 482} 483 484static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate) 485{ 486 int restart; 487 int reject_if_open = 0; 488 int xrate; 489 490 if (!snd_rme9652_use_is_exclusive (rme9652)) { 491 return -EBUSY; 492 } 493 494 /* Changing from a "single speed" to a "double speed" rate is 495 not allowed if any substreams are open. This is because 496 such a change causes a shift in the location of 497 the DMA buffers and a reduction in the number of available 498 buffers. 499 500 Note that a similar but essentially insoluble problem 501 exists for externally-driven rate changes. All we can do 502 is to flag rate changes in the read/write routines. 503 */ 504 505 spin_lock_irq(&rme9652->lock); 506 xrate = rme9652_adat_sample_rate(rme9652); 507 508 switch (rate) { 509 case 44100: 510 if (xrate > 48000) { 511 reject_if_open = 1; 512 } 513 rate = 0; 514 break; 515 case 48000: 516 if (xrate > 48000) { 517 reject_if_open = 1; 518 } 519 rate = RME9652_freq; 520 break; 521 case 88200: 522 if (xrate < 48000) { 523 reject_if_open = 1; 524 } 525 rate = RME9652_DS; 526 break; 527 case 96000: 528 if (xrate < 48000) { 529 reject_if_open = 1; 530 } 531 rate = RME9652_DS | RME9652_freq; 532 break; 533 default: 534 spin_unlock_irq(&rme9652->lock); 535 return -EINVAL; 536 } 537 538 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) { 539 spin_unlock_irq(&rme9652->lock); 540 return -EBUSY; 541 } 542 543 if ((restart = rme9652->running)) { 544 rme9652_stop(rme9652); 545 } 546 rme9652->control_register &= ~(RME9652_freq | RME9652_DS); 547 rme9652->control_register |= rate; 548 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 549 550 if (restart) { 551 rme9652_start(rme9652); 552 } 553 554 if (rate & RME9652_DS) { 555 if (rme9652->ss_channels == RME9652_NCHANNELS) { 556 rme9652->channel_map = channel_map_9652_ds; 557 } else { 558 rme9652->channel_map = channel_map_9636_ds; 559 } 560 } else { 561 if (rme9652->ss_channels == RME9652_NCHANNELS) { 562 rme9652->channel_map = channel_map_9652_ss; 563 } else { 564 rme9652->channel_map = channel_map_9636_ss; 565 } 566 } 567 568 spin_unlock_irq(&rme9652->lock); 569 return 0; 570} 571 572static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable) 573{ 574 int i; 575 576 rme9652->passthru = 0; 577 578 if (channel < 0) { 579 580 /* set thru for all channels */ 581 582 if (enable) { 583 for (i = 0; i < RME9652_NCHANNELS; i++) { 584 rme9652->thru_bits |= (1 << i); 585 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1); 586 } 587 } else { 588 for (i = 0; i < RME9652_NCHANNELS; i++) { 589 rme9652->thru_bits &= ~(1 << i); 590 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0); 591 } 592 } 593 594 } else { 595 int mapped_channel; 596 597 mapped_channel = rme9652->channel_map[channel]; 598 599 if (enable) { 600 rme9652->thru_bits |= (1 << mapped_channel); 601 } else { 602 rme9652->thru_bits &= ~(1 << mapped_channel); 603 } 604 605 rme9652_write(rme9652, 606 RME9652_thru_base + mapped_channel * 4, 607 enable ? 1 : 0); 608 } 609} 610 611static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff) 612{ 613 if (onoff) { 614 rme9652_set_thru(rme9652, -1, 1); 615 616 /* we don't want interrupts, so do a 617 custom version of rme9652_start(). 618 */ 619 620 rme9652->control_register = 621 RME9652_inp_0 | 622 rme9652_encode_latency(7) | 623 RME9652_start_bit; 624 625 rme9652_reset_hw_pointer(rme9652); 626 627 rme9652_write(rme9652, RME9652_control_register, 628 rme9652->control_register); 629 rme9652->passthru = 1; 630 } else { 631 rme9652_set_thru(rme9652, -1, 0); 632 rme9652_stop(rme9652); 633 rme9652->passthru = 0; 634 } 635 636 return 0; 637} 638 639static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff) 640{ 641 if (onoff) 642 rme9652->control_register |= mask; 643 else 644 rme9652->control_register &= ~mask; 645 646 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 647} 648 649static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val) 650{ 651 long mask; 652 long i; 653 654 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 655 if (val & mask) 656 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1); 657 else 658 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0); 659 660 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 661 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 662 } 663} 664 665static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652) 666{ 667 long mask; 668 long val; 669 long i; 670 671 val = 0; 672 673 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) { 674 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1); 675 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ) 676 val |= mask; 677 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0); 678 } 679 680 return val; 681} 682 683static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data) 684{ 685 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 686 rme9652_spdif_write_byte (rme9652, 0x20); 687 rme9652_spdif_write_byte (rme9652, address); 688 rme9652_spdif_write_byte (rme9652, data); 689 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 690} 691 692 693static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address) 694{ 695 int ret; 696 697 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 698 rme9652_spdif_write_byte (rme9652, 0x20); 699 rme9652_spdif_write_byte (rme9652, address); 700 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 701 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1); 702 703 rme9652_spdif_write_byte (rme9652, 0x21); 704 ret = rme9652_spdif_read_byte (rme9652); 705 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0); 706 707 return ret; 708} 709 710static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652) 711{ 712 713 rme9652->control_register |= RME9652_SPDIF_RESET; 714 715 rme9652_write_spdif_codec (rme9652, 4, 0x40); 716 rme9652_write_spdif_codec (rme9652, 17, 0x13); 717 rme9652_write_spdif_codec (rme9652, 6, 0x02); 718} 719 720static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s) 721{ 722 unsigned int rate_bits; 723 724 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) { 725 return -1; /* error condition */ 726 } 727 728 if (s->hw_rev == 15) { 729 730 int x, y, ret; 731 732 x = rme9652_spdif_read_codec (s, 30); 733 734 if (x != 0) 735 y = 48000 * 64 / x; 736 else 737 y = 0; 738 739 if (y > 30400 && y < 33600) ret = 32000; 740 else if (y > 41900 && y < 46000) ret = 44100; 741 else if (y > 46000 && y < 50400) ret = 48000; 742 else if (y > 60800 && y < 67200) ret = 64000; 743 else if (y > 83700 && y < 92000) ret = 88200; 744 else if (y > 92000 && y < 100000) ret = 96000; 745 else ret = 0; 746 return ret; 747 } 748 749 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F; 750 751 switch (rme9652_decode_spdif_rate(rate_bits)) { 752 case 0x7: 753 return 32000; 754 break; 755 756 case 0x6: 757 return 44100; 758 break; 759 760 case 0x5: 761 return 48000; 762 break; 763 764 case 0x4: 765 return 88200; 766 break; 767 768 case 0x3: 769 return 96000; 770 break; 771 772 case 0x0: 773 return 64000; 774 break; 775 776 default: 777 snd_printk(KERN_ERR "%s: unknown S/PDIF input rate (bits = 0x%x)\n", 778 s->card_name, rate_bits); 779 return 0; 780 break; 781 } 782} 783 784/*----------------------------------------------------------------------------- 785 Control Interface 786 ----------------------------------------------------------------------------*/ 787 788static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes) 789{ 790 u32 val = 0; 791 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0; 792 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0; 793 if (val & RME9652_PRO) 794 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0; 795 else 796 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0; 797 return val; 798} 799 800static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val) 801{ 802 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) | 803 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0); 804 if (val & RME9652_PRO) 805 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0; 806 else 807 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0; 808} 809 810static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 811{ 812 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 813 uinfo->count = 1; 814 return 0; 815} 816 817static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 818{ 819 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 820 821 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif); 822 return 0; 823} 824 825static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 826{ 827 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 828 int change; 829 u32 val; 830 831 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 832 spin_lock_irq(&rme9652->lock); 833 change = val != rme9652->creg_spdif; 834 rme9652->creg_spdif = val; 835 spin_unlock_irq(&rme9652->lock); 836 return change; 837} 838 839static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 840{ 841 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 842 uinfo->count = 1; 843 return 0; 844} 845 846static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 847{ 848 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 849 850 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream); 851 return 0; 852} 853 854static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 855{ 856 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 857 int change; 858 u32 val; 859 860 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958); 861 spin_lock_irq(&rme9652->lock); 862 change = val != rme9652->creg_spdif_stream; 863 rme9652->creg_spdif_stream = val; 864 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 865 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val); 866 spin_unlock_irq(&rme9652->lock); 867 return change; 868} 869 870static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 871{ 872 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 873 uinfo->count = 1; 874 return 0; 875} 876 877static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 878{ 879 ucontrol->value.iec958.status[0] = kcontrol->private_value; 880 return 0; 881} 882 883#define RME9652_ADAT1_IN(xname, xindex) \ 884{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 885 .info = snd_rme9652_info_adat1_in, \ 886 .get = snd_rme9652_get_adat1_in, \ 887 .put = snd_rme9652_put_adat1_in } 888 889static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652) 890{ 891 if (rme9652->control_register & RME9652_ADAT1_INTERNAL) 892 return 1; 893 return 0; 894} 895 896static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal) 897{ 898 int restart = 0; 899 900 if (internal) { 901 rme9652->control_register |= RME9652_ADAT1_INTERNAL; 902 } else { 903 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL; 904 } 905 906 907 if ((restart = rme9652->running)) { 908 rme9652_stop(rme9652); 909 } 910 911 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 912 913 if (restart) { 914 rme9652_start(rme9652); 915 } 916 917 return 0; 918} 919 920static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 921{ 922 static char *texts[2] = {"ADAT1", "Internal"}; 923 924 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 925 uinfo->count = 1; 926 uinfo->value.enumerated.items = 2; 927 if (uinfo->value.enumerated.item > 1) 928 uinfo->value.enumerated.item = 1; 929 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 930 return 0; 931} 932 933static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 934{ 935 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 936 937 spin_lock_irq(&rme9652->lock); 938 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652); 939 spin_unlock_irq(&rme9652->lock); 940 return 0; 941} 942 943static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 944{ 945 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 946 int change; 947 unsigned int val; 948 949 if (!snd_rme9652_use_is_exclusive(rme9652)) 950 return -EBUSY; 951 val = ucontrol->value.enumerated.item[0] % 2; 952 spin_lock_irq(&rme9652->lock); 953 change = val != rme9652_adat1_in(rme9652); 954 if (change) 955 rme9652_set_adat1_input(rme9652, val); 956 spin_unlock_irq(&rme9652->lock); 957 return change; 958} 959 960#define RME9652_SPDIF_IN(xname, xindex) \ 961{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 962 .info = snd_rme9652_info_spdif_in, \ 963 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in } 964 965static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652) 966{ 967 return rme9652_decode_spdif_in(rme9652->control_register & 968 RME9652_inp); 969} 970 971static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in) 972{ 973 int restart = 0; 974 975 rme9652->control_register &= ~RME9652_inp; 976 rme9652->control_register |= rme9652_encode_spdif_in(in); 977 978 if ((restart = rme9652->running)) { 979 rme9652_stop(rme9652); 980 } 981 982 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 983 984 if (restart) { 985 rme9652_start(rme9652); 986 } 987 988 return 0; 989} 990 991static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 992{ 993 static char *texts[3] = {"ADAT1", "Coaxial", "Internal"}; 994 995 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 996 uinfo->count = 1; 997 uinfo->value.enumerated.items = 3; 998 if (uinfo->value.enumerated.item > 2) 999 uinfo->value.enumerated.item = 2; 1000 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1001 return 0; 1002} 1003 1004static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1005{ 1006 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1007 1008 spin_lock_irq(&rme9652->lock); 1009 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652); 1010 spin_unlock_irq(&rme9652->lock); 1011 return 0; 1012} 1013 1014static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1015{ 1016 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1017 int change; 1018 unsigned int val; 1019 1020 if (!snd_rme9652_use_is_exclusive(rme9652)) 1021 return -EBUSY; 1022 val = ucontrol->value.enumerated.item[0] % 3; 1023 spin_lock_irq(&rme9652->lock); 1024 change = val != rme9652_spdif_in(rme9652); 1025 if (change) 1026 rme9652_set_spdif_input(rme9652, val); 1027 spin_unlock_irq(&rme9652->lock); 1028 return change; 1029} 1030 1031#define RME9652_SPDIF_OUT(xname, xindex) \ 1032{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1033 .info = snd_rme9652_info_spdif_out, \ 1034 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out } 1035 1036static int rme9652_spdif_out(struct snd_rme9652 *rme9652) 1037{ 1038 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0; 1039} 1040 1041static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out) 1042{ 1043 int restart = 0; 1044 1045 if (out) { 1046 rme9652->control_register |= RME9652_opt_out; 1047 } else { 1048 rme9652->control_register &= ~RME9652_opt_out; 1049 } 1050 1051 if ((restart = rme9652->running)) { 1052 rme9652_stop(rme9652); 1053 } 1054 1055 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1056 1057 if (restart) { 1058 rme9652_start(rme9652); 1059 } 1060 1061 return 0; 1062} 1063 1064#define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info 1065 1066static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1067{ 1068 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1069 1070 spin_lock_irq(&rme9652->lock); 1071 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652); 1072 spin_unlock_irq(&rme9652->lock); 1073 return 0; 1074} 1075 1076static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1077{ 1078 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1079 int change; 1080 unsigned int val; 1081 1082 if (!snd_rme9652_use_is_exclusive(rme9652)) 1083 return -EBUSY; 1084 val = ucontrol->value.integer.value[0] & 1; 1085 spin_lock_irq(&rme9652->lock); 1086 change = (int)val != rme9652_spdif_out(rme9652); 1087 rme9652_set_spdif_output(rme9652, val); 1088 spin_unlock_irq(&rme9652->lock); 1089 return change; 1090} 1091 1092#define RME9652_SYNC_MODE(xname, xindex) \ 1093{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1094 .info = snd_rme9652_info_sync_mode, \ 1095 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode } 1096 1097static int rme9652_sync_mode(struct snd_rme9652 *rme9652) 1098{ 1099 if (rme9652->control_register & RME9652_wsel) { 1100 return 2; 1101 } else if (rme9652->control_register & RME9652_Master) { 1102 return 1; 1103 } else { 1104 return 0; 1105 } 1106} 1107 1108static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode) 1109{ 1110 int restart = 0; 1111 1112 switch (mode) { 1113 case 0: 1114 rme9652->control_register &= 1115 ~(RME9652_Master | RME9652_wsel); 1116 break; 1117 case 1: 1118 rme9652->control_register = 1119 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master; 1120 break; 1121 case 2: 1122 rme9652->control_register |= 1123 (RME9652_Master | RME9652_wsel); 1124 break; 1125 } 1126 1127 if ((restart = rme9652->running)) { 1128 rme9652_stop(rme9652); 1129 } 1130 1131 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1132 1133 if (restart) { 1134 rme9652_start(rme9652); 1135 } 1136 1137 return 0; 1138} 1139 1140static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1141{ 1142 static char *texts[3] = {"AutoSync", "Master", "Word Clock"}; 1143 1144 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1145 uinfo->count = 1; 1146 uinfo->value.enumerated.items = 3; 1147 if (uinfo->value.enumerated.item > 2) 1148 uinfo->value.enumerated.item = 2; 1149 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1150 return 0; 1151} 1152 1153static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1154{ 1155 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1156 1157 spin_lock_irq(&rme9652->lock); 1158 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652); 1159 spin_unlock_irq(&rme9652->lock); 1160 return 0; 1161} 1162 1163static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1164{ 1165 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1166 int change; 1167 unsigned int val; 1168 1169 val = ucontrol->value.enumerated.item[0] % 3; 1170 spin_lock_irq(&rme9652->lock); 1171 change = (int)val != rme9652_sync_mode(rme9652); 1172 rme9652_set_sync_mode(rme9652, val); 1173 spin_unlock_irq(&rme9652->lock); 1174 return change; 1175} 1176 1177#define RME9652_SYNC_PREF(xname, xindex) \ 1178{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1179 .info = snd_rme9652_info_sync_pref, \ 1180 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref } 1181 1182static int rme9652_sync_pref(struct snd_rme9652 *rme9652) 1183{ 1184 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1185 case RME9652_SyncPref_ADAT1: 1186 return RME9652_SYNC_FROM_ADAT1; 1187 case RME9652_SyncPref_ADAT2: 1188 return RME9652_SYNC_FROM_ADAT2; 1189 case RME9652_SyncPref_ADAT3: 1190 return RME9652_SYNC_FROM_ADAT3; 1191 case RME9652_SyncPref_SPDIF: 1192 return RME9652_SYNC_FROM_SPDIF; 1193 } 1194 /* Not reachable */ 1195 return 0; 1196} 1197 1198static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref) 1199{ 1200 int restart; 1201 1202 rme9652->control_register &= ~RME9652_SyncPref_Mask; 1203 switch (pref) { 1204 case RME9652_SYNC_FROM_ADAT1: 1205 rme9652->control_register |= RME9652_SyncPref_ADAT1; 1206 break; 1207 case RME9652_SYNC_FROM_ADAT2: 1208 rme9652->control_register |= RME9652_SyncPref_ADAT2; 1209 break; 1210 case RME9652_SYNC_FROM_ADAT3: 1211 rme9652->control_register |= RME9652_SyncPref_ADAT3; 1212 break; 1213 case RME9652_SYNC_FROM_SPDIF: 1214 rme9652->control_register |= RME9652_SyncPref_SPDIF; 1215 break; 1216 } 1217 1218 if ((restart = rme9652->running)) { 1219 rme9652_stop(rme9652); 1220 } 1221 1222 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1223 1224 if (restart) { 1225 rme9652_start(rme9652); 1226 } 1227 1228 return 0; 1229} 1230 1231static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1232{ 1233 static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"}; 1234 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1235 1236 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1237 uinfo->count = 1; 1238 uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; 1239 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1240 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1241 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1242 return 0; 1243} 1244 1245static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1246{ 1247 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1248 1249 spin_lock_irq(&rme9652->lock); 1250 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652); 1251 spin_unlock_irq(&rme9652->lock); 1252 return 0; 1253} 1254 1255static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1256{ 1257 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1258 int change, max; 1259 unsigned int val; 1260 1261 if (!snd_rme9652_use_is_exclusive(rme9652)) 1262 return -EBUSY; 1263 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3; 1264 val = ucontrol->value.enumerated.item[0] % max; 1265 spin_lock_irq(&rme9652->lock); 1266 change = (int)val != rme9652_sync_pref(rme9652); 1267 rme9652_set_sync_pref(rme9652, val); 1268 spin_unlock_irq(&rme9652->lock); 1269 return change; 1270} 1271 1272static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1273{ 1274 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1275 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1276 uinfo->count = rme9652->ss_channels; 1277 uinfo->value.integer.min = 0; 1278 uinfo->value.integer.max = 1; 1279 return 0; 1280} 1281 1282static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1283{ 1284 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1285 unsigned int k; 1286 u32 thru_bits = rme9652->thru_bits; 1287 1288 for (k = 0; k < rme9652->ss_channels; ++k) { 1289 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k)); 1290 } 1291 return 0; 1292} 1293 1294static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1295{ 1296 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1297 int change; 1298 unsigned int chn; 1299 u32 thru_bits = 0; 1300 1301 if (!snd_rme9652_use_is_exclusive(rme9652)) 1302 return -EBUSY; 1303 1304 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1305 if (ucontrol->value.integer.value[chn]) 1306 thru_bits |= 1 << chn; 1307 } 1308 1309 spin_lock_irq(&rme9652->lock); 1310 change = thru_bits ^ rme9652->thru_bits; 1311 if (change) { 1312 for (chn = 0; chn < rme9652->ss_channels; ++chn) { 1313 if (!(change & (1 << chn))) 1314 continue; 1315 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn)); 1316 } 1317 } 1318 spin_unlock_irq(&rme9652->lock); 1319 return !!change; 1320} 1321 1322#define RME9652_PASSTHRU(xname, xindex) \ 1323{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1324 .info = snd_rme9652_info_passthru, \ 1325 .put = snd_rme9652_put_passthru, \ 1326 .get = snd_rme9652_get_passthru } 1327 1328#define snd_rme9652_info_passthru snd_ctl_boolean_mono_info 1329 1330static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1331{ 1332 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1333 1334 spin_lock_irq(&rme9652->lock); 1335 ucontrol->value.integer.value[0] = rme9652->passthru; 1336 spin_unlock_irq(&rme9652->lock); 1337 return 0; 1338} 1339 1340static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1341{ 1342 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1343 int change; 1344 unsigned int val; 1345 int err = 0; 1346 1347 if (!snd_rme9652_use_is_exclusive(rme9652)) 1348 return -EBUSY; 1349 1350 val = ucontrol->value.integer.value[0] & 1; 1351 spin_lock_irq(&rme9652->lock); 1352 change = (ucontrol->value.integer.value[0] != rme9652->passthru); 1353 if (change) 1354 err = rme9652_set_passthru(rme9652, val); 1355 spin_unlock_irq(&rme9652->lock); 1356 return err ? err : change; 1357} 1358 1359/* Read-only switches */ 1360 1361#define RME9652_SPDIF_RATE(xname, xindex) \ 1362{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1363 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1364 .info = snd_rme9652_info_spdif_rate, \ 1365 .get = snd_rme9652_get_spdif_rate } 1366 1367static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1368{ 1369 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1370 uinfo->count = 1; 1371 uinfo->value.integer.min = 0; 1372 uinfo->value.integer.max = 96000; 1373 return 0; 1374} 1375 1376static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1377{ 1378 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1379 1380 spin_lock_irq(&rme9652->lock); 1381 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652); 1382 spin_unlock_irq(&rme9652->lock); 1383 return 0; 1384} 1385 1386#define RME9652_ADAT_SYNC(xname, xindex, xidx) \ 1387{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1388 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1389 .info = snd_rme9652_info_adat_sync, \ 1390 .get = snd_rme9652_get_adat_sync, .private_value = xidx } 1391 1392static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1393{ 1394 static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"}; 1395 1396 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1397 uinfo->count = 1; 1398 uinfo->value.enumerated.items = 4; 1399 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1400 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1401 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1402 return 0; 1403} 1404 1405static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1406{ 1407 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1408 unsigned int mask1, mask2, val; 1409 1410 switch (kcontrol->private_value) { 1411 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break; 1412 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break; 1413 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break; 1414 default: return -EINVAL; 1415 } 1416 val = rme9652_read(rme9652, RME9652_status_register); 1417 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0; 1418 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0; 1419 return 0; 1420} 1421 1422#define RME9652_TC_VALID(xname, xindex) \ 1423{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1424 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ 1425 .info = snd_rme9652_info_tc_valid, \ 1426 .get = snd_rme9652_get_tc_valid } 1427 1428#define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info 1429 1430static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1431{ 1432 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol); 1433 1434 ucontrol->value.integer.value[0] = 1435 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0; 1436 return 0; 1437} 1438 1439#ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE 1440 1441 1442static int snd_rme9652_get_tc_value(void *private_data, 1443 snd_kswitch_t *kswitch, 1444 snd_switch_t *uswitch) 1445{ 1446 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data; 1447 u32 value; 1448 int i; 1449 1450 uswitch->type = SNDRV_SW_TYPE_DWORD; 1451 1452 if ((rme9652_read(s, RME9652_status_register) & 1453 RME9652_tc_valid) == 0) { 1454 uswitch->value.data32[0] = 0; 1455 return 0; 1456 } 1457 1458 /* timecode request */ 1459 1460 rme9652_write(s, RME9652_time_code, 0); 1461 1462 1463 for (i = 0; i < 50; i++) { 1464 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) 1465 break; 1466 } 1467 1468 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) { 1469 return -EIO; 1470 } 1471 1472 value = 0; 1473 1474 for (i = 0; i < 32; i++) { 1475 value >>= 1; 1476 1477 if (rme9652_read(s, i * 4) & RME9652_tc_out) 1478 value |= 0x80000000; 1479 } 1480 1481 if (value > 2 * 60 * 48000) { 1482 value -= 2 * 60 * 48000; 1483 } else { 1484 value = 0; 1485 } 1486 1487 uswitch->value.data32[0] = value; 1488 1489 return 0; 1490} 1491 1492#endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */ 1493 1494static struct snd_kcontrol_new snd_rme9652_controls[] = { 1495{ 1496 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1497 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1498 .info = snd_rme9652_control_spdif_info, 1499 .get = snd_rme9652_control_spdif_get, 1500 .put = snd_rme9652_control_spdif_put, 1501}, 1502{ 1503 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1504 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1505 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1506 .info = snd_rme9652_control_spdif_stream_info, 1507 .get = snd_rme9652_control_spdif_stream_get, 1508 .put = snd_rme9652_control_spdif_stream_put, 1509}, 1510{ 1511 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1512 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1513 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1514 .info = snd_rme9652_control_spdif_mask_info, 1515 .get = snd_rme9652_control_spdif_mask_get, 1516 .private_value = IEC958_AES0_NONAUDIO | 1517 IEC958_AES0_PROFESSIONAL | 1518 IEC958_AES0_CON_EMPHASIS, 1519}, 1520{ 1521 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1522 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1523 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 1524 .info = snd_rme9652_control_spdif_mask_info, 1525 .get = snd_rme9652_control_spdif_mask_get, 1526 .private_value = IEC958_AES0_NONAUDIO | 1527 IEC958_AES0_PROFESSIONAL | 1528 IEC958_AES0_PRO_EMPHASIS, 1529}, 1530RME9652_SPDIF_IN("IEC958 Input Connector", 0), 1531RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0), 1532RME9652_SYNC_MODE("Sync Mode", 0), 1533RME9652_SYNC_PREF("Preferred Sync Source", 0), 1534{ 1535 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1536 .name = "Channels Thru", 1537 .index = 0, 1538 .info = snd_rme9652_info_thru, 1539 .get = snd_rme9652_get_thru, 1540 .put = snd_rme9652_put_thru, 1541}, 1542RME9652_SPDIF_RATE("IEC958 Sample Rate", 0), 1543RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0), 1544RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1), 1545RME9652_TC_VALID("Timecode Valid", 0), 1546RME9652_PASSTHRU("Passthru", 0) 1547}; 1548 1549static struct snd_kcontrol_new snd_rme9652_adat3_check = 1550RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2); 1551 1552static struct snd_kcontrol_new snd_rme9652_adat1_input = 1553RME9652_ADAT1_IN("ADAT1 Input Source", 0); 1554 1555static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652) 1556{ 1557 unsigned int idx; 1558 int err; 1559 struct snd_kcontrol *kctl; 1560 1561 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) { 1562 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0) 1563 return err; 1564 if (idx == 1) /* IEC958 (S/PDIF) Stream */ 1565 rme9652->spdif_ctl = kctl; 1566 } 1567 1568 if (rme9652->ss_channels == RME9652_NCHANNELS) 1569 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0) 1570 return err; 1571 1572 if (rme9652->hw_rev >= 15) 1573 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0) 1574 return err; 1575 1576 return 0; 1577} 1578 1579/*------------------------------------------------------------ 1580 /proc interface 1581 ------------------------------------------------------------*/ 1582 1583static void 1584snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 1585{ 1586 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data; 1587 u32 thru_bits = rme9652->thru_bits; 1588 int show_auto_sync_source = 0; 1589 int i; 1590 unsigned int status; 1591 int x; 1592 1593 status = rme9652_read(rme9652, RME9652_status_register); 1594 1595 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1); 1596 snd_iprintf(buffer, "Buffers: capture %p playback %p\n", 1597 rme9652->capture_buffer, rme9652->playback_buffer); 1598 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", 1599 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase); 1600 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register); 1601 1602 snd_iprintf(buffer, "\n"); 1603 1604 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register & 1605 RME9652_latency)); 1606 1607 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n", 1608 x, (unsigned long) rme9652->period_bytes); 1609 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", 1610 rme9652_hw_pointer(rme9652)); 1611 snd_iprintf(buffer, "Passthru: %s\n", 1612 rme9652->passthru ? "yes" : "no"); 1613 1614 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) { 1615 snd_iprintf(buffer, "Clock mode: autosync\n"); 1616 show_auto_sync_source = 1; 1617 } else if (rme9652->control_register & RME9652_wsel) { 1618 if (status & RME9652_wsel_rd) { 1619 snd_iprintf(buffer, "Clock mode: word clock\n"); 1620 } else { 1621 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n"); 1622 } 1623 } else { 1624 snd_iprintf(buffer, "Clock mode: master\n"); 1625 } 1626 1627 if (show_auto_sync_source) { 1628 switch (rme9652->control_register & RME9652_SyncPref_Mask) { 1629 case RME9652_SyncPref_ADAT1: 1630 snd_iprintf(buffer, "Pref. sync source: ADAT1\n"); 1631 break; 1632 case RME9652_SyncPref_ADAT2: 1633 snd_iprintf(buffer, "Pref. sync source: ADAT2\n"); 1634 break; 1635 case RME9652_SyncPref_ADAT3: 1636 snd_iprintf(buffer, "Pref. sync source: ADAT3\n"); 1637 break; 1638 case RME9652_SyncPref_SPDIF: 1639 snd_iprintf(buffer, "Pref. sync source: IEC958\n"); 1640 break; 1641 default: 1642 snd_iprintf(buffer, "Pref. sync source: ???\n"); 1643 } 1644 } 1645 1646 if (rme9652->hw_rev >= 15) 1647 snd_iprintf(buffer, "\nADAT1 Input source: %s\n", 1648 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ? 1649 "Internal" : "ADAT1 optical"); 1650 1651 snd_iprintf(buffer, "\n"); 1652 1653 switch (rme9652_decode_spdif_in(rme9652->control_register & 1654 RME9652_inp)) { 1655 case RME9652_SPDIFIN_OPTICAL: 1656 snd_iprintf(buffer, "IEC958 input: ADAT1\n"); 1657 break; 1658 case RME9652_SPDIFIN_COAXIAL: 1659 snd_iprintf(buffer, "IEC958 input: Coaxial\n"); 1660 break; 1661 case RME9652_SPDIFIN_INTERN: 1662 snd_iprintf(buffer, "IEC958 input: Internal\n"); 1663 break; 1664 default: 1665 snd_iprintf(buffer, "IEC958 input: ???\n"); 1666 break; 1667 } 1668 1669 if (rme9652->control_register & RME9652_opt_out) { 1670 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n"); 1671 } else { 1672 snd_iprintf(buffer, "IEC958 output: Coaxial only\n"); 1673 } 1674 1675 if (rme9652->control_register & RME9652_PRO) { 1676 snd_iprintf(buffer, "IEC958 quality: Professional\n"); 1677 } else { 1678 snd_iprintf(buffer, "IEC958 quality: Consumer\n"); 1679 } 1680 1681 if (rme9652->control_register & RME9652_EMP) { 1682 snd_iprintf(buffer, "IEC958 emphasis: on\n"); 1683 } else { 1684 snd_iprintf(buffer, "IEC958 emphasis: off\n"); 1685 } 1686 1687 if (rme9652->control_register & RME9652_Dolby) { 1688 snd_iprintf(buffer, "IEC958 Dolby: on\n"); 1689 } else { 1690 snd_iprintf(buffer, "IEC958 Dolby: off\n"); 1691 } 1692 1693 i = rme9652_spdif_sample_rate(rme9652); 1694 1695 if (i < 0) { 1696 snd_iprintf(buffer, 1697 "IEC958 sample rate: error flag set\n"); 1698 } else if (i == 0) { 1699 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n"); 1700 } else { 1701 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i); 1702 } 1703 1704 snd_iprintf(buffer, "\n"); 1705 1706 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n", 1707 rme9652_adat_sample_rate(rme9652)); 1708 1709 /* Sync Check */ 1710 1711 x = status & RME9652_sync_0; 1712 if (status & RME9652_lock_0) { 1713 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); 1714 } else { 1715 snd_iprintf(buffer, "ADAT1: No Lock\n"); 1716 } 1717 1718 x = status & RME9652_sync_1; 1719 if (status & RME9652_lock_1) { 1720 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); 1721 } else { 1722 snd_iprintf(buffer, "ADAT2: No Lock\n"); 1723 } 1724 1725 x = status & RME9652_sync_2; 1726 if (status & RME9652_lock_2) { 1727 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); 1728 } else { 1729 snd_iprintf(buffer, "ADAT3: No Lock\n"); 1730 } 1731 1732 snd_iprintf(buffer, "\n"); 1733 1734 snd_iprintf(buffer, "Timecode signal: %s\n", 1735 (status & RME9652_tc_valid) ? "yes" : "no"); 1736 1737 /* thru modes */ 1738 1739 snd_iprintf(buffer, "Punch Status:\n\n"); 1740 1741 for (i = 0; i < rme9652->ss_channels; i++) { 1742 if (thru_bits & (1 << i)) { 1743 snd_iprintf(buffer, "%2d: on ", i + 1); 1744 } else { 1745 snd_iprintf(buffer, "%2d: off ", i + 1); 1746 } 1747 1748 if (((i + 1) % 8) == 0) { 1749 snd_iprintf(buffer, "\n"); 1750 } 1751 } 1752 1753 snd_iprintf(buffer, "\n"); 1754} 1755 1756static void __devinit snd_rme9652_proc_init(struct snd_rme9652 *rme9652) 1757{ 1758 struct snd_info_entry *entry; 1759 1760 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry)) 1761 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read); 1762} 1763 1764static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652) 1765{ 1766 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci); 1767 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci); 1768} 1769 1770static int snd_rme9652_free(struct snd_rme9652 *rme9652) 1771{ 1772 if (rme9652->irq >= 0) 1773 rme9652_stop(rme9652); 1774 snd_rme9652_free_buffers(rme9652); 1775 1776 if (rme9652->irq >= 0) 1777 free_irq(rme9652->irq, (void *)rme9652); 1778 if (rme9652->iobase) 1779 iounmap(rme9652->iobase); 1780 if (rme9652->port) 1781 pci_release_regions(rme9652->pci); 1782 1783 pci_disable_device(rme9652->pci); 1784 return 0; 1785} 1786 1787static int __devinit snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652) 1788{ 1789 unsigned long pb_bus, cb_bus; 1790 1791 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 || 1792 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) { 1793 if (rme9652->capture_dma_buf.area) 1794 snd_dma_free_pages(&rme9652->capture_dma_buf); 1795 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name); 1796 return -ENOMEM; 1797 } 1798 1799 /* Align to bus-space 64K boundary */ 1800 1801 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul); 1802 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul); 1803 1804 /* Tell the card where it is */ 1805 1806 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus); 1807 rme9652_write(rme9652, RME9652_play_buffer, pb_bus); 1808 1809 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr); 1810 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr); 1811 1812 return 0; 1813} 1814 1815static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652) 1816{ 1817 unsigned int k; 1818 1819 /* ASSUMPTION: rme9652->lock is either held, or 1820 there is no need to hold it (e.g. during module 1821 initialization). 1822 */ 1823 1824 /* set defaults: 1825 1826 SPDIF Input via Coax 1827 autosync clock mode 1828 maximum latency (7 = 8192 samples, 64Kbyte buffer, 1829 which implies 2 4096 sample, 32Kbyte periods). 1830 1831 if rev 1.5, initialize the S/PDIF receiver. 1832 1833 */ 1834 1835 rme9652->control_register = 1836 RME9652_inp_0 | rme9652_encode_latency(7); 1837 1838 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register); 1839 1840 rme9652_reset_hw_pointer(rme9652); 1841 rme9652_compute_period_size(rme9652); 1842 1843 /* default: thru off for all channels */ 1844 1845 for (k = 0; k < RME9652_NCHANNELS; ++k) 1846 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0); 1847 1848 rme9652->thru_bits = 0; 1849 rme9652->passthru = 0; 1850 1851 /* set a default rate so that the channel map is set up */ 1852 1853 rme9652_set_rate(rme9652, 48000); 1854} 1855 1856static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id) 1857{ 1858 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id; 1859 1860 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) { 1861 return IRQ_NONE; 1862 } 1863 1864 rme9652_write(rme9652, RME9652_irq_clear, 0); 1865 1866 if (rme9652->capture_substream) { 1867 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); 1868 } 1869 1870 if (rme9652->playback_substream) { 1871 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream); 1872 } 1873 return IRQ_HANDLED; 1874} 1875 1876static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream) 1877{ 1878 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1879 return rme9652_hw_pointer(rme9652); 1880} 1881 1882static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652, 1883 int stream, 1884 int channel) 1885 1886{ 1887 int mapped_channel; 1888 1889 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS)) 1890 return NULL; 1891 1892 if ((mapped_channel = rme9652->channel_map[channel]) < 0) { 1893 return NULL; 1894 } 1895 1896 if (stream == SNDRV_PCM_STREAM_CAPTURE) { 1897 return rme9652->capture_buffer + 1898 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1899 } else { 1900 return rme9652->playback_buffer + 1901 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES); 1902 } 1903} 1904 1905static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel, 1906 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count) 1907{ 1908 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1909 char *channel_buf; 1910 1911 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4)) 1912 return -EINVAL; 1913 1914 channel_buf = rme9652_channel_buffer_location (rme9652, 1915 substream->pstr->stream, 1916 channel); 1917 if (snd_BUG_ON(!channel_buf)) 1918 return -EIO; 1919 if (copy_from_user(channel_buf + pos * 4, src, count * 4)) 1920 return -EFAULT; 1921 return count; 1922} 1923 1924static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel, 1925 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count) 1926{ 1927 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1928 char *channel_buf; 1929 1930 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4)) 1931 return -EINVAL; 1932 1933 channel_buf = rme9652_channel_buffer_location (rme9652, 1934 substream->pstr->stream, 1935 channel); 1936 if (snd_BUG_ON(!channel_buf)) 1937 return -EIO; 1938 if (copy_to_user(dst, channel_buf + pos * 4, count * 4)) 1939 return -EFAULT; 1940 return count; 1941} 1942 1943static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel, 1944 snd_pcm_uframes_t pos, snd_pcm_uframes_t count) 1945{ 1946 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1947 char *channel_buf; 1948 1949 channel_buf = rme9652_channel_buffer_location (rme9652, 1950 substream->pstr->stream, 1951 channel); 1952 if (snd_BUG_ON(!channel_buf)) 1953 return -EIO; 1954 memset(channel_buf + pos * 4, 0, count * 4); 1955 return count; 1956} 1957 1958static int snd_rme9652_reset(struct snd_pcm_substream *substream) 1959{ 1960 struct snd_pcm_runtime *runtime = substream->runtime; 1961 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1962 struct snd_pcm_substream *other; 1963 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 1964 other = rme9652->capture_substream; 1965 else 1966 other = rme9652->playback_substream; 1967 if (rme9652->running) 1968 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652); 1969 else 1970 runtime->status->hw_ptr = 0; 1971 if (other) { 1972 struct snd_pcm_substream *s; 1973 struct snd_pcm_runtime *oruntime = other->runtime; 1974 snd_pcm_group_for_each_entry(s, substream) { 1975 if (s == other) { 1976 oruntime->status->hw_ptr = runtime->status->hw_ptr; 1977 break; 1978 } 1979 } 1980 } 1981 return 0; 1982} 1983 1984static int snd_rme9652_hw_params(struct snd_pcm_substream *substream, 1985 struct snd_pcm_hw_params *params) 1986{ 1987 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 1988 int err; 1989 pid_t this_pid; 1990 pid_t other_pid; 1991 1992 spin_lock_irq(&rme9652->lock); 1993 1994 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1995 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP); 1996 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream); 1997 this_pid = rme9652->playback_pid; 1998 other_pid = rme9652->capture_pid; 1999 } else { 2000 this_pid = rme9652->capture_pid; 2001 other_pid = rme9652->playback_pid; 2002 } 2003 2004 if ((other_pid > 0) && (this_pid != other_pid)) { 2005 2006 /* The other stream is open, and not by the same 2007 task as this one. Make sure that the parameters 2008 that matter are the same. 2009 */ 2010 2011 if ((int)params_rate(params) != 2012 rme9652_adat_sample_rate(rme9652)) { 2013 spin_unlock_irq(&rme9652->lock); 2014 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2015 return -EBUSY; 2016 } 2017 2018 if (params_period_size(params) != rme9652->period_bytes / 4) { 2019 spin_unlock_irq(&rme9652->lock); 2020 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2021 return -EBUSY; 2022 } 2023 2024 /* We're fine. */ 2025 2026 spin_unlock_irq(&rme9652->lock); 2027 return 0; 2028 2029 } else { 2030 spin_unlock_irq(&rme9652->lock); 2031 } 2032 2033 /* how to make sure that the rate matches an externally-set one ? 2034 */ 2035 2036 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) { 2037 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); 2038 return err; 2039 } 2040 2041 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) { 2042 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 2043 return err; 2044 } 2045 2046 return 0; 2047} 2048 2049static int snd_rme9652_channel_info(struct snd_pcm_substream *substream, 2050 struct snd_pcm_channel_info *info) 2051{ 2052 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2053 int chn; 2054 2055 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS)) 2056 return -EINVAL; 2057 2058 if ((chn = rme9652->channel_map[info->channel]) < 0) { 2059 return -EINVAL; 2060 } 2061 2062 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES; 2063 info->first = 0; 2064 info->step = 32; 2065 return 0; 2066} 2067 2068static int snd_rme9652_ioctl(struct snd_pcm_substream *substream, 2069 unsigned int cmd, void *arg) 2070{ 2071 switch (cmd) { 2072 case SNDRV_PCM_IOCTL1_RESET: 2073 { 2074 return snd_rme9652_reset(substream); 2075 } 2076 case SNDRV_PCM_IOCTL1_CHANNEL_INFO: 2077 { 2078 struct snd_pcm_channel_info *info = arg; 2079 return snd_rme9652_channel_info(substream, info); 2080 } 2081 default: 2082 break; 2083 } 2084 2085 return snd_pcm_lib_ioctl(substream, cmd, arg); 2086} 2087 2088static void rme9652_silence_playback(struct snd_rme9652 *rme9652) 2089{ 2090 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES); 2091} 2092 2093static int snd_rme9652_trigger(struct snd_pcm_substream *substream, 2094 int cmd) 2095{ 2096 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2097 struct snd_pcm_substream *other; 2098 int running; 2099 spin_lock(&rme9652->lock); 2100 running = rme9652->running; 2101 switch (cmd) { 2102 case SNDRV_PCM_TRIGGER_START: 2103 running |= 1 << substream->stream; 2104 break; 2105 case SNDRV_PCM_TRIGGER_STOP: 2106 running &= ~(1 << substream->stream); 2107 break; 2108 default: 2109 snd_BUG(); 2110 spin_unlock(&rme9652->lock); 2111 return -EINVAL; 2112 } 2113 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2114 other = rme9652->capture_substream; 2115 else 2116 other = rme9652->playback_substream; 2117 2118 if (other) { 2119 struct snd_pcm_substream *s; 2120 snd_pcm_group_for_each_entry(s, substream) { 2121 if (s == other) { 2122 snd_pcm_trigger_done(s, substream); 2123 if (cmd == SNDRV_PCM_TRIGGER_START) 2124 running |= 1 << s->stream; 2125 else 2126 running &= ~(1 << s->stream); 2127 goto _ok; 2128 } 2129 } 2130 if (cmd == SNDRV_PCM_TRIGGER_START) { 2131 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) && 2132 substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2133 rme9652_silence_playback(rme9652); 2134 } else { 2135 if (running && 2136 substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 2137 rme9652_silence_playback(rme9652); 2138 } 2139 } else { 2140 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 2141 rme9652_silence_playback(rme9652); 2142 } 2143 _ok: 2144 snd_pcm_trigger_done(substream, substream); 2145 if (!rme9652->running && running) 2146 rme9652_start(rme9652); 2147 else if (rme9652->running && !running) 2148 rme9652_stop(rme9652); 2149 rme9652->running = running; 2150 spin_unlock(&rme9652->lock); 2151 2152 return 0; 2153} 2154 2155static int snd_rme9652_prepare(struct snd_pcm_substream *substream) 2156{ 2157 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2158 unsigned long flags; 2159 int result = 0; 2160 2161 spin_lock_irqsave(&rme9652->lock, flags); 2162 if (!rme9652->running) 2163 rme9652_reset_hw_pointer(rme9652); 2164 spin_unlock_irqrestore(&rme9652->lock, flags); 2165 return result; 2166} 2167 2168static struct snd_pcm_hardware snd_rme9652_playback_subinfo = 2169{ 2170 .info = (SNDRV_PCM_INFO_MMAP | 2171 SNDRV_PCM_INFO_MMAP_VALID | 2172 SNDRV_PCM_INFO_NONINTERLEAVED | 2173 SNDRV_PCM_INFO_SYNC_START | 2174 SNDRV_PCM_INFO_DOUBLE), 2175 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2176 .rates = (SNDRV_PCM_RATE_44100 | 2177 SNDRV_PCM_RATE_48000 | 2178 SNDRV_PCM_RATE_88200 | 2179 SNDRV_PCM_RATE_96000), 2180 .rate_min = 44100, 2181 .rate_max = 96000, 2182 .channels_min = 10, 2183 .channels_max = 26, 2184 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26, 2185 .period_bytes_min = (64 * 4) * 10, 2186 .period_bytes_max = (8192 * 4) * 26, 2187 .periods_min = 2, 2188 .periods_max = 2, 2189 .fifo_size = 0, 2190}; 2191 2192static struct snd_pcm_hardware snd_rme9652_capture_subinfo = 2193{ 2194 .info = (SNDRV_PCM_INFO_MMAP | 2195 SNDRV_PCM_INFO_MMAP_VALID | 2196 SNDRV_PCM_INFO_NONINTERLEAVED | 2197 SNDRV_PCM_INFO_SYNC_START), 2198 .formats = SNDRV_PCM_FMTBIT_S32_LE, 2199 .rates = (SNDRV_PCM_RATE_44100 | 2200 SNDRV_PCM_RATE_48000 | 2201 SNDRV_PCM_RATE_88200 | 2202 SNDRV_PCM_RATE_96000), 2203 .rate_min = 44100, 2204 .rate_max = 96000, 2205 .channels_min = 10, 2206 .channels_max = 26, 2207 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26, 2208 .period_bytes_min = (64 * 4) * 10, 2209 .period_bytes_max = (8192 * 4) * 26, 2210 .periods_min = 2, 2211 .periods_max = 2, 2212 .fifo_size = 0, 2213}; 2214 2215static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; 2216 2217static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = { 2218 .count = ARRAY_SIZE(period_sizes), 2219 .list = period_sizes, 2220 .mask = 0 2221}; 2222 2223static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params, 2224 struct snd_pcm_hw_rule *rule) 2225{ 2226 struct snd_rme9652 *rme9652 = rule->private; 2227 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2228 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels }; 2229 return snd_interval_list(c, 2, list, 0); 2230} 2231 2232static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params, 2233 struct snd_pcm_hw_rule *rule) 2234{ 2235 struct snd_rme9652 *rme9652 = rule->private; 2236 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2237 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2238 if (r->min > 48000) { 2239 struct snd_interval t = { 2240 .min = rme9652->ds_channels, 2241 .max = rme9652->ds_channels, 2242 .integer = 1, 2243 }; 2244 return snd_interval_refine(c, &t); 2245 } else if (r->max < 88200) { 2246 struct snd_interval t = { 2247 .min = rme9652->ss_channels, 2248 .max = rme9652->ss_channels, 2249 .integer = 1, 2250 }; 2251 return snd_interval_refine(c, &t); 2252 } 2253 return 0; 2254} 2255 2256static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params, 2257 struct snd_pcm_hw_rule *rule) 2258{ 2259 struct snd_rme9652 *rme9652 = rule->private; 2260 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 2261 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 2262 if (c->min >= rme9652->ss_channels) { 2263 struct snd_interval t = { 2264 .min = 44100, 2265 .max = 48000, 2266 .integer = 1, 2267 }; 2268 return snd_interval_refine(r, &t); 2269 } else if (c->max <= rme9652->ds_channels) { 2270 struct snd_interval t = { 2271 .min = 88200, 2272 .max = 96000, 2273 .integer = 1, 2274 }; 2275 return snd_interval_refine(r, &t); 2276 } 2277 return 0; 2278} 2279 2280static int snd_rme9652_playback_open(struct snd_pcm_substream *substream) 2281{ 2282 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2283 struct snd_pcm_runtime *runtime = substream->runtime; 2284 2285 spin_lock_irq(&rme9652->lock); 2286 2287 snd_pcm_set_sync(substream); 2288 2289 runtime->hw = snd_rme9652_playback_subinfo; 2290 runtime->dma_area = rme9652->playback_buffer; 2291 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2292 2293 if (rme9652->capture_substream == NULL) { 2294 rme9652_stop(rme9652); 2295 rme9652_set_thru(rme9652, -1, 0); 2296 } 2297 2298 rme9652->playback_pid = current->pid; 2299 rme9652->playback_substream = substream; 2300 2301 spin_unlock_irq(&rme9652->lock); 2302 2303 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2304 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2305 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2306 snd_rme9652_hw_rule_channels, rme9652, 2307 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2308 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2309 snd_rme9652_hw_rule_channels_rate, rme9652, 2310 SNDRV_PCM_HW_PARAM_RATE, -1); 2311 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2312 snd_rme9652_hw_rule_rate_channels, rme9652, 2313 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2314 2315 rme9652->creg_spdif_stream = rme9652->creg_spdif; 2316 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2317 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2318 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2319 return 0; 2320} 2321 2322static int snd_rme9652_playback_release(struct snd_pcm_substream *substream) 2323{ 2324 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2325 2326 spin_lock_irq(&rme9652->lock); 2327 2328 rme9652->playback_pid = -1; 2329 rme9652->playback_substream = NULL; 2330 2331 spin_unlock_irq(&rme9652->lock); 2332 2333 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 2334 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE | 2335 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id); 2336 return 0; 2337} 2338 2339 2340static int snd_rme9652_capture_open(struct snd_pcm_substream *substream) 2341{ 2342 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2343 struct snd_pcm_runtime *runtime = substream->runtime; 2344 2345 spin_lock_irq(&rme9652->lock); 2346 2347 snd_pcm_set_sync(substream); 2348 2349 runtime->hw = snd_rme9652_capture_subinfo; 2350 runtime->dma_area = rme9652->capture_buffer; 2351 runtime->dma_bytes = RME9652_DMA_AREA_BYTES; 2352 2353 if (rme9652->playback_substream == NULL) { 2354 rme9652_stop(rme9652); 2355 rme9652_set_thru(rme9652, -1, 0); 2356 } 2357 2358 rme9652->capture_pid = current->pid; 2359 rme9652->capture_substream = substream; 2360 2361 spin_unlock_irq(&rme9652->lock); 2362 2363 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 2364 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes); 2365 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2366 snd_rme9652_hw_rule_channels, rme9652, 2367 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2368 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2369 snd_rme9652_hw_rule_channels_rate, rme9652, 2370 SNDRV_PCM_HW_PARAM_RATE, -1); 2371 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 2372 snd_rme9652_hw_rule_rate_channels, rme9652, 2373 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 2374 return 0; 2375} 2376 2377static int snd_rme9652_capture_release(struct snd_pcm_substream *substream) 2378{ 2379 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream); 2380 2381 spin_lock_irq(&rme9652->lock); 2382 2383 rme9652->capture_pid = -1; 2384 rme9652->capture_substream = NULL; 2385 2386 spin_unlock_irq(&rme9652->lock); 2387 return 0; 2388} 2389 2390static struct snd_pcm_ops snd_rme9652_playback_ops = { 2391 .open = snd_rme9652_playback_open, 2392 .close = snd_rme9652_playback_release, 2393 .ioctl = snd_rme9652_ioctl, 2394 .hw_params = snd_rme9652_hw_params, 2395 .prepare = snd_rme9652_prepare, 2396 .trigger = snd_rme9652_trigger, 2397 .pointer = snd_rme9652_hw_pointer, 2398 .copy = snd_rme9652_playback_copy, 2399 .silence = snd_rme9652_hw_silence, 2400}; 2401 2402static struct snd_pcm_ops snd_rme9652_capture_ops = { 2403 .open = snd_rme9652_capture_open, 2404 .close = snd_rme9652_capture_release, 2405 .ioctl = snd_rme9652_ioctl, 2406 .hw_params = snd_rme9652_hw_params, 2407 .prepare = snd_rme9652_prepare, 2408 .trigger = snd_rme9652_trigger, 2409 .pointer = snd_rme9652_hw_pointer, 2410 .copy = snd_rme9652_capture_copy, 2411}; 2412 2413static int __devinit snd_rme9652_create_pcm(struct snd_card *card, 2414 struct snd_rme9652 *rme9652) 2415{ 2416 struct snd_pcm *pcm; 2417 int err; 2418 2419 if ((err = snd_pcm_new(card, 2420 rme9652->card_name, 2421 0, 1, 1, &pcm)) < 0) { 2422 return err; 2423 } 2424 2425 rme9652->pcm = pcm; 2426 pcm->private_data = rme9652; 2427 strcpy(pcm->name, rme9652->card_name); 2428 2429 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops); 2430 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops); 2431 2432 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 2433 2434 return 0; 2435} 2436 2437static int __devinit snd_rme9652_create(struct snd_card *card, 2438 struct snd_rme9652 *rme9652, 2439 int precise_ptr) 2440{ 2441 struct pci_dev *pci = rme9652->pci; 2442 int err; 2443 int status; 2444 unsigned short rev; 2445 2446 rme9652->irq = -1; 2447 rme9652->card = card; 2448 2449 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev); 2450 2451 switch (rev & 0xff) { 2452 case 3: 2453 case 4: 2454 case 8: 2455 case 9: 2456 break; 2457 2458 default: 2459 /* who knows? */ 2460 return -ENODEV; 2461 } 2462 2463 if ((err = pci_enable_device(pci)) < 0) 2464 return err; 2465 2466 spin_lock_init(&rme9652->lock); 2467 2468 if ((err = pci_request_regions(pci, "rme9652")) < 0) 2469 return err; 2470 rme9652->port = pci_resource_start(pci, 0); 2471 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT); 2472 if (rme9652->iobase == NULL) { 2473 snd_printk(KERN_ERR "unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1); 2474 return -EBUSY; 2475 } 2476 2477 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED, 2478 "rme9652", rme9652)) { 2479 snd_printk(KERN_ERR "unable to request IRQ %d\n", pci->irq); 2480 return -EBUSY; 2481 } 2482 rme9652->irq = pci->irq; 2483 rme9652->precise_ptr = precise_ptr; 2484 2485 /* Determine the h/w rev level of the card. This seems like 2486 a particularly kludgy way to encode it, but its what RME 2487 chose to do, so we follow them ... 2488 */ 2489 2490 status = rme9652_read(rme9652, RME9652_status_register); 2491 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) { 2492 rme9652->hw_rev = 15; 2493 } else { 2494 rme9652->hw_rev = 11; 2495 } 2496 2497 /* Differentiate between the standard Hammerfall, and the 2498 "Light", which does not have the expansion board. This 2499 method comes from information received from Mathhias 2500 Clausen at RME. Display the EEPROM and h/w revID where 2501 relevant. 2502 */ 2503 2504 switch (rev) { 2505 case 8: /* original eprom */ 2506 strcpy(card->driver, "RME9636"); 2507 if (rme9652->hw_rev == 15) { 2508 rme9652->card_name = "RME Digi9636 (Rev 1.5)"; 2509 } else { 2510 rme9652->card_name = "RME Digi9636"; 2511 } 2512 rme9652->ss_channels = RME9636_NCHANNELS; 2513 break; 2514 case 9: /* W36_G EPROM */ 2515 strcpy(card->driver, "RME9636"); 2516 rme9652->card_name = "RME Digi9636 (Rev G)"; 2517 rme9652->ss_channels = RME9636_NCHANNELS; 2518 break; 2519 case 4: /* W52_G EPROM */ 2520 strcpy(card->driver, "RME9652"); 2521 rme9652->card_name = "RME Digi9652 (Rev G)"; 2522 rme9652->ss_channels = RME9652_NCHANNELS; 2523 break; 2524 case 3: /* original eprom */ 2525 strcpy(card->driver, "RME9652"); 2526 if (rme9652->hw_rev == 15) { 2527 rme9652->card_name = "RME Digi9652 (Rev 1.5)"; 2528 } else { 2529 rme9652->card_name = "RME Digi9652"; 2530 } 2531 rme9652->ss_channels = RME9652_NCHANNELS; 2532 break; 2533 } 2534 2535 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2; 2536 2537 pci_set_master(rme9652->pci); 2538 2539 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) { 2540 return err; 2541 } 2542 2543 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) { 2544 return err; 2545 } 2546 2547 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) { 2548 return err; 2549 } 2550 2551 snd_rme9652_proc_init(rme9652); 2552 2553 rme9652->last_spdif_sample_rate = -1; 2554 rme9652->last_adat_sample_rate = -1; 2555 rme9652->playback_pid = -1; 2556 rme9652->capture_pid = -1; 2557 rme9652->capture_substream = NULL; 2558 rme9652->playback_substream = NULL; 2559 2560 snd_rme9652_set_defaults(rme9652); 2561 2562 if (rme9652->hw_rev == 15) { 2563 rme9652_initialize_spdif_receiver (rme9652); 2564 } 2565 2566 return 0; 2567} 2568 2569static void snd_rme9652_card_free(struct snd_card *card) 2570{ 2571 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data; 2572 2573 if (rme9652) 2574 snd_rme9652_free(rme9652); 2575} 2576 2577static int __devinit snd_rme9652_probe(struct pci_dev *pci, 2578 const struct pci_device_id *pci_id) 2579{ 2580 static int dev; 2581 struct snd_rme9652 *rme9652; 2582 struct snd_card *card; 2583 int err; 2584 2585 if (dev >= SNDRV_CARDS) 2586 return -ENODEV; 2587 if (!enable[dev]) { 2588 dev++; 2589 return -ENOENT; 2590 } 2591 2592 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 2593 sizeof(struct snd_rme9652), &card); 2594 2595 if (err < 0) 2596 return err; 2597 2598 rme9652 = (struct snd_rme9652 *) card->private_data; 2599 card->private_free = snd_rme9652_card_free; 2600 rme9652->dev = dev; 2601 rme9652->pci = pci; 2602 snd_card_set_dev(card, &pci->dev); 2603 2604 if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) { 2605 snd_card_free(card); 2606 return err; 2607 } 2608 2609 strcpy(card->shortname, rme9652->card_name); 2610 2611 sprintf(card->longname, "%s at 0x%lx, irq %d", 2612 card->shortname, rme9652->port, rme9652->irq); 2613 2614 2615 if ((err = snd_card_register(card)) < 0) { 2616 snd_card_free(card); 2617 return err; 2618 } 2619 pci_set_drvdata(pci, card); 2620 dev++; 2621 return 0; 2622} 2623 2624static void __devexit snd_rme9652_remove(struct pci_dev *pci) 2625{ 2626 snd_card_free(pci_get_drvdata(pci)); 2627 pci_set_drvdata(pci, NULL); 2628} 2629 2630static struct pci_driver driver = { 2631 .name = "RME Digi9652 (Hammerfall)", 2632 .id_table = snd_rme9652_ids, 2633 .probe = snd_rme9652_probe, 2634 .remove = __devexit_p(snd_rme9652_remove), 2635}; 2636 2637static int __init alsa_card_hammerfall_init(void) 2638{ 2639 return pci_register_driver(&driver); 2640} 2641 2642static void __exit alsa_card_hammerfall_exit(void) 2643{ 2644 pci_unregister_driver(&driver); 2645} 2646 2647module_init(alsa_card_hammerfall_init) 2648module_exit(alsa_card_hammerfall_exit) 2649