1/***************************************************************************** 2 * 3 * Copyright (C) 2008 Cedric Bregardis <cedric.bregardis@free.fr> and 4 * Jean-Christian Hassler <jhassler@free.fr> 5 * Copyright 1998 Emagic Soft- und Hardware GmbH 6 * Copyright 2002 Martijn Sipkema 7 * 8 * This file is part of the Audiowerk2 ALSA driver 9 * 10 * The Audiowerk2 ALSA driver is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; version 2. 13 * 14 * The Audiowerk2 ALSA driver is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with the Audiowerk2 ALSA driver; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 22 * USA. 23 * 24 *****************************************************************************/ 25 26#define TSL_WS0 (1UL << 31) 27#define TSL_WS1 (1UL << 30) 28#define TSL_WS2 (1UL << 29) 29#define TSL_WS3 (1UL << 28) 30#define TSL_WS4 (1UL << 27) 31#define TSL_DIS_A1 (1UL << 24) 32#define TSL_SDW_A1 (1UL << 23) 33#define TSL_SIB_A1 (1UL << 22) 34#define TSL_SF_A1 (1UL << 21) 35#define TSL_LF_A1 (1UL << 20) 36#define TSL_BSEL_A1 (1UL << 17) 37#define TSL_DOD_A1 (1UL << 15) 38#define TSL_LOW_A1 (1UL << 14) 39#define TSL_DIS_A2 (1UL << 11) 40#define TSL_SDW_A2 (1UL << 10) 41#define TSL_SIB_A2 (1UL << 9) 42#define TSL_SF_A2 (1UL << 8) 43#define TSL_LF_A2 (1UL << 7) 44#define TSL_BSEL_A2 (1UL << 4) 45#define TSL_DOD_A2 (1UL << 2) 46#define TSL_LOW_A2 (1UL << 1) 47#define TSL_EOS (1UL << 0) 48 49 /* Audiowerk8 hardware setup: */ 50 /* WS0, SD4, TSL1 - Analog/ digital in */ 51 /* WS1, SD0, TSL1 - Analog out #1, digital out */ 52 /* WS2, SD2, TSL1 - Analog out #2 */ 53 /* WS3, SD1, TSL2 - Analog out #3 */ 54 /* WS4, SD3, TSL2 - Analog out #4 */ 55 56 /* Audiowerk8 timing: */ 57 /* Timeslot: | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | ... */ 58 59 /* A1_INPUT: */ 60 /* SD4: <_ADC-L_>-------<_ADC-R_>-------< */ 61 /* WS0: _______________/---------------\_ */ 62 63 /* A1_OUTPUT: */ 64 /* SD0: <_1-L___>-------<_1-R___>-------< */ 65 /* WS1: _______________/---------------\_ */ 66 /* SD2: >-------<_2-L___>-------<_2-R___> */ 67 /* WS2: -------\_______________/--------- */ 68 69 /* A2_OUTPUT: */ 70 /* SD1: <_3-L___>-------<_3-R___>-------< */ 71 /* WS3: _______________/---------------\_ */ 72 /* SD3: >-------<_4-L___>-------<_4-R___> */ 73 /* WS4: -------\_______________/--------- */ 74 75static int tsl1[8] = { 76 1 * TSL_SDW_A1 | 3 * TSL_BSEL_A1 | 77 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_LF_A1, 78 79 1 * TSL_SDW_A1 | 2 * TSL_BSEL_A1 | 80 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1, 81 82 0 * TSL_SDW_A1 | 3 * TSL_BSEL_A1 | 83 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1, 84 85 0 * TSL_SDW_A1 | 2 * TSL_BSEL_A1 | 86 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1, 87 88 1 * TSL_SDW_A1 | 1 * TSL_BSEL_A1 | 89 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0, 90 91 1 * TSL_SDW_A1 | 0 * TSL_BSEL_A1 | 92 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0, 93 94 0 * TSL_SDW_A1 | 1 * TSL_BSEL_A1 | 95 0 * TSL_DIS_A1 | 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0, 96 97 0 * TSL_SDW_A1 | 0 * TSL_BSEL_A1 | 0 * TSL_DIS_A1 | 98 0 * TSL_DOD_A1 | TSL_WS1 | TSL_WS0 | TSL_SF_A1 | TSL_EOS, 99}; 100 101static int tsl2[8] = { 102 0 * TSL_SDW_A2 | 3 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_LF_A2, 103 0 * TSL_SDW_A2 | 2 * TSL_BSEL_A2 | 2 * TSL_DOD_A2, 104 0 * TSL_SDW_A2 | 3 * TSL_BSEL_A2 | 2 * TSL_DOD_A2, 105 0 * TSL_SDW_A2 | 2 * TSL_BSEL_A2 | 2 * TSL_DOD_A2, 106 0 * TSL_SDW_A2 | 1 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2, 107 0 * TSL_SDW_A2 | 0 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2, 108 0 * TSL_SDW_A2 | 1 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2, 109 0 * TSL_SDW_A2 | 0 * TSL_BSEL_A2 | 2 * TSL_DOD_A2 | TSL_WS2 | TSL_EOS 110}; 111