1/* 2 Power management interface routines. 3 Written by Mariusz Matuszek. 4 This code is currently just a placeholder for later work and 5 does not do anything useful. 6 7 This is part of rtl8180 OpenSource driver. 8 Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it> 9 Released under the terms of GPL (General Public Licence) 10*/ 11 12#include "r8192E.h" 13#include "r8192E_hw.h" 14#include "r8192_pm.h" 15#include "r8190_rtl8256.h" 16 17int rtl8192E_save_state (struct pci_dev *dev, pm_message_t state) 18{ 19 printk(KERN_NOTICE "r8192E save state call (state %u).\n", state.event); 20 return(-EAGAIN); 21} 22 23 24int rtl8192E_suspend (struct pci_dev *pdev, pm_message_t state) 25{ 26 struct net_device *dev = pci_get_drvdata(pdev); 27 struct r8192_priv *priv = ieee80211_priv(dev); 28#ifdef RTL8190P 29 u8 ucRegRead; 30#endif 31 u32 ulRegRead; 32 33 RT_TRACE(COMP_POWER, "============> r8192E suspend call.\n"); 34 if (!netif_running(dev)) 35 goto out_pci_suspend; 36 37 if (dev->netdev_ops->ndo_stop) 38 dev->netdev_ops->ndo_stop(dev); 39// dev->stop(dev); 40 // Call MgntActSet_RF_State instead to prevent RF config race condition. 41 // By Bruce, 2008-01-17. 42 // 43 if(!priv->ieee80211->bSupportRemoteWakeUp) { 44 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT); 45 // 2006.11.30. System reset bit 46 ulRegRead = read_nic_dword(dev, CPU_GEN); 47 ulRegRead|=CPU_GEN_SYSTEM_RESET; 48 write_nic_dword(dev, CPU_GEN, ulRegRead); 49 } else { 50 //2008.06.03 for WOL 51 write_nic_dword(dev, WFCRC0, 0xffffffff); 52 write_nic_dword(dev, WFCRC1, 0xffffffff); 53 write_nic_dword(dev, WFCRC2, 0xffffffff); 54#ifdef RTL8190P 55 //GPIO 0 = TRUE 56 ucRegRead = read_nic_byte(dev, GPO); 57 ucRegRead |= BIT0; 58 write_nic_byte(dev, GPO, ucRegRead); 59#endif 60 //Write PMR register 61 write_nic_byte(dev, PMR, 0x5); 62 //Disable tx, enanble rx 63 write_nic_byte(dev, MacBlkCtrl, 0xa); 64 } 65 66out_pci_suspend: 67 RT_TRACE(COMP_POWER, "r8192E support WOL call??????????????????????\n"); 68 if(priv->ieee80211->bSupportRemoteWakeUp) { 69 RT_TRACE(COMP_POWER, "r8192E support WOL call!!!!!!!!!!!!!!!!!!.\n"); 70 } 71 netif_device_detach(dev); 72 pci_save_state(pdev); 73 pci_disable_device(pdev); 74 pci_enable_wake(pdev, pci_choose_state(pdev,state),\ 75 priv->ieee80211->bSupportRemoteWakeUp?1:0); 76 pci_set_power_state(pdev,pci_choose_state(pdev,state)); 77 78 return 0; 79} 80 81int rtl8192E_resume (struct pci_dev *pdev) 82{ 83 struct net_device *dev = pci_get_drvdata(pdev); 84 //struct r8192_priv *priv = ieee80211_priv(dev); 85 //union iwreq_data wrqu; 86 int err; 87 u32 val; 88 89 RT_TRACE(COMP_POWER, "================>r8192E resume call."); 90 91 pci_set_power_state(pdev, PCI_D0); 92 93 err = pci_enable_device(pdev); 94 if(err) { 95 printk(KERN_ERR "%s: pci_enable_device failed on resume\n", 96 dev->name); 97 return err; 98 } 99 100 pci_restore_state(pdev); 101 102 /* 103 * Suspend/Resume resets the PCI configuration space, so we have to 104 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries 105 * from interfering with C3 CPU state. pci_restore_state won't help 106 * here since it only restores the first 64 bytes pci config header. 107 */ 108 pci_read_config_dword(pdev, 0x40, &val); 109 if ((val & 0x0000ff00) != 0) { 110 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); 111 } 112 113 114 115 pci_enable_wake(pdev, PCI_D0, 0); 116 117 if(!netif_running(dev)) 118 goto out; 119 120 netif_device_attach(dev); 121 122 if (dev->netdev_ops->ndo_open) 123 dev->netdev_ops->ndo_open(dev); 124 125// dev->open(dev); 126out: 127 RT_TRACE(COMP_POWER, "<================r8192E resume call.\n"); 128 return 0; 129} 130 131 132int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable) 133{ 134 printk(KERN_NOTICE "r8192E enable wake call (state %u, enable %d).\n", 135 state.event, enable); 136 return(-EAGAIN); 137} 138