1/* 2 * Aic94xx SAS/SATA driver access to shared data structures and memory 3 * maps. 4 * 5 * Copyright (C) 2005 Adaptec, Inc. All rights reserved. 6 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com> 7 * 8 * This file is licensed under GPLv2. 9 * 10 * This file is part of the aic94xx driver. 11 * 12 * The aic94xx driver is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; version 2 of the 15 * License. 16 * 17 * The aic94xx driver is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 * General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with the aic94xx driver; if not, write to the Free Software 24 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 25 * 26 */ 27 28#include <linux/pci.h> 29#include <linux/slab.h> 30#include <linux/delay.h> 31 32#include "aic94xx.h" 33#include "aic94xx_reg.h" 34#include "aic94xx_sds.h" 35 36/* ---------- OCM stuff ---------- */ 37 38struct asd_ocm_dir_ent { 39 u8 type; 40 u8 offs[3]; 41 u8 _r1; 42 u8 size[3]; 43} __attribute__ ((packed)); 44 45struct asd_ocm_dir { 46 char sig[2]; 47 u8 _r1[2]; 48 u8 major; /* 0 */ 49 u8 minor; /* 0 */ 50 u8 _r2; 51 u8 num_de; 52 struct asd_ocm_dir_ent entry[15]; 53} __attribute__ ((packed)); 54 55#define OCM_DE_OCM_DIR 0x00 56#define OCM_DE_WIN_DRVR 0x01 57#define OCM_DE_BIOS_CHIM 0x02 58#define OCM_DE_RAID_ENGN 0x03 59#define OCM_DE_BIOS_INTL 0x04 60#define OCM_DE_BIOS_CHIM_OSM 0x05 61#define OCM_DE_BIOS_CHIM_DYNAMIC 0x06 62#define OCM_DE_ADDC2C_RES0 0x07 63#define OCM_DE_ADDC2C_RES1 0x08 64#define OCM_DE_ADDC2C_RES2 0x09 65#define OCM_DE_ADDC2C_RES3 0x0A 66 67#define OCM_INIT_DIR_ENTRIES 5 68/*************************************************************************** 69* OCM directory default 70***************************************************************************/ 71static struct asd_ocm_dir OCMDirInit = 72{ 73 .sig = {0x4D, 0x4F}, /* signature */ 74 .num_de = OCM_INIT_DIR_ENTRIES, /* no. of directory entries */ 75}; 76 77/*************************************************************************** 78* OCM directory Entries default 79***************************************************************************/ 80static struct asd_ocm_dir_ent OCMDirEntriesInit[OCM_INIT_DIR_ENTRIES] = 81{ 82 { 83 .type = (OCM_DE_ADDC2C_RES0), /* Entry type */ 84 .offs = {128}, /* Offset */ 85 .size = {0, 4}, /* size */ 86 }, 87 { 88 .type = (OCM_DE_ADDC2C_RES1), /* Entry type */ 89 .offs = {128, 4}, /* Offset */ 90 .size = {0, 4}, /* size */ 91 }, 92 { 93 .type = (OCM_DE_ADDC2C_RES2), /* Entry type */ 94 .offs = {128, 8}, /* Offset */ 95 .size = {0, 4}, /* size */ 96 }, 97 { 98 .type = (OCM_DE_ADDC2C_RES3), /* Entry type */ 99 .offs = {128, 12}, /* Offset */ 100 .size = {0, 4}, /* size */ 101 }, 102 { 103 .type = (OCM_DE_WIN_DRVR), /* Entry type */ 104 .offs = {128, 16}, /* Offset */ 105 .size = {128, 235, 1}, /* size */ 106 }, 107}; 108 109struct asd_bios_chim_struct { 110 char sig[4]; 111 u8 major; /* 1 */ 112 u8 minor; /* 0 */ 113 u8 bios_major; 114 u8 bios_minor; 115 __le32 bios_build; 116 u8 flags; 117 u8 pci_slot; 118 __le16 ue_num; 119 __le16 ue_size; 120 u8 _r[14]; 121 /* The unit element array is right here. 122 */ 123} __attribute__ ((packed)); 124 125/** 126 * asd_read_ocm_seg - read an on chip memory (OCM) segment 127 * @asd_ha: pointer to the host adapter structure 128 * @buffer: where to write the read data 129 * @offs: offset into OCM where to read from 130 * @size: how many bytes to read 131 * 132 * Return the number of bytes not read. Return 0 on success. 133 */ 134static int asd_read_ocm_seg(struct asd_ha_struct *asd_ha, void *buffer, 135 u32 offs, int size) 136{ 137 u8 *p = buffer; 138 if (unlikely(asd_ha->iospace)) 139 asd_read_reg_string(asd_ha, buffer, offs+OCM_BASE_ADDR, size); 140 else { 141 for ( ; size > 0; size--, offs++, p++) 142 *p = asd_read_ocm_byte(asd_ha, offs); 143 } 144 return size; 145} 146 147static int asd_read_ocm_dir(struct asd_ha_struct *asd_ha, 148 struct asd_ocm_dir *dir, u32 offs) 149{ 150 int err = asd_read_ocm_seg(asd_ha, dir, offs, sizeof(*dir)); 151 if (err) { 152 ASD_DPRINTK("couldn't read ocm segment\n"); 153 return err; 154 } 155 156 if (dir->sig[0] != 'M' || dir->sig[1] != 'O') { 157 ASD_DPRINTK("no valid dir signature(%c%c) at start of OCM\n", 158 dir->sig[0], dir->sig[1]); 159 return -ENOENT; 160 } 161 if (dir->major != 0) { 162 asd_printk("unsupported major version of ocm dir:0x%x\n", 163 dir->major); 164 return -ENOENT; 165 } 166 dir->num_de &= 0xf; 167 return 0; 168} 169 170/** 171 * asd_write_ocm_seg - write an on chip memory (OCM) segment 172 * @asd_ha: pointer to the host adapter structure 173 * @buffer: where to read the write data 174 * @offs: offset into OCM to write to 175 * @size: how many bytes to write 176 * 177 * Return the number of bytes not written. Return 0 on success. 178 */ 179static void asd_write_ocm_seg(struct asd_ha_struct *asd_ha, void *buffer, 180 u32 offs, int size) 181{ 182 u8 *p = buffer; 183 if (unlikely(asd_ha->iospace)) 184 asd_write_reg_string(asd_ha, buffer, offs+OCM_BASE_ADDR, size); 185 else { 186 for ( ; size > 0; size--, offs++, p++) 187 asd_write_ocm_byte(asd_ha, offs, *p); 188 } 189 return; 190} 191 192#define THREE_TO_NUM(X) ((X)[0] | ((X)[1] << 8) | ((X)[2] << 16)) 193 194static int asd_find_dir_entry(struct asd_ocm_dir *dir, u8 type, 195 u32 *offs, u32 *size) 196{ 197 int i; 198 struct asd_ocm_dir_ent *ent; 199 200 for (i = 0; i < dir->num_de; i++) { 201 if (dir->entry[i].type == type) 202 break; 203 } 204 if (i >= dir->num_de) 205 return -ENOENT; 206 ent = &dir->entry[i]; 207 *offs = (u32) THREE_TO_NUM(ent->offs); 208 *size = (u32) THREE_TO_NUM(ent->size); 209 return 0; 210} 211 212#define OCM_BIOS_CHIM_DE 2 213#define BC_BIOS_PRESENT 1 214 215static int asd_get_bios_chim(struct asd_ha_struct *asd_ha, 216 struct asd_ocm_dir *dir) 217{ 218 int err; 219 struct asd_bios_chim_struct *bc_struct; 220 u32 offs, size; 221 222 err = asd_find_dir_entry(dir, OCM_BIOS_CHIM_DE, &offs, &size); 223 if (err) { 224 ASD_DPRINTK("couldn't find BIOS_CHIM dir ent\n"); 225 goto out; 226 } 227 err = -ENOMEM; 228 bc_struct = kmalloc(sizeof(*bc_struct), GFP_KERNEL); 229 if (!bc_struct) { 230 asd_printk("no memory for bios_chim struct\n"); 231 goto out; 232 } 233 err = asd_read_ocm_seg(asd_ha, (void *)bc_struct, offs, 234 sizeof(*bc_struct)); 235 if (err) { 236 ASD_DPRINTK("couldn't read ocm segment\n"); 237 goto out2; 238 } 239 if (strncmp(bc_struct->sig, "SOIB", 4) 240 && strncmp(bc_struct->sig, "IPSA", 4)) { 241 ASD_DPRINTK("BIOS_CHIM entry has no valid sig(%c%c%c%c)\n", 242 bc_struct->sig[0], bc_struct->sig[1], 243 bc_struct->sig[2], bc_struct->sig[3]); 244 err = -ENOENT; 245 goto out2; 246 } 247 if (bc_struct->major != 1) { 248 asd_printk("BIOS_CHIM unsupported major version:0x%x\n", 249 bc_struct->major); 250 err = -ENOENT; 251 goto out2; 252 } 253 if (bc_struct->flags & BC_BIOS_PRESENT) { 254 asd_ha->hw_prof.bios.present = 1; 255 asd_ha->hw_prof.bios.maj = bc_struct->bios_major; 256 asd_ha->hw_prof.bios.min = bc_struct->bios_minor; 257 asd_ha->hw_prof.bios.bld = le32_to_cpu(bc_struct->bios_build); 258 ASD_DPRINTK("BIOS present (%d,%d), %d\n", 259 asd_ha->hw_prof.bios.maj, 260 asd_ha->hw_prof.bios.min, 261 asd_ha->hw_prof.bios.bld); 262 } 263 asd_ha->hw_prof.ue.num = le16_to_cpu(bc_struct->ue_num); 264 asd_ha->hw_prof.ue.size= le16_to_cpu(bc_struct->ue_size); 265 ASD_DPRINTK("ue num:%d, ue size:%d\n", asd_ha->hw_prof.ue.num, 266 asd_ha->hw_prof.ue.size); 267 size = asd_ha->hw_prof.ue.num * asd_ha->hw_prof.ue.size; 268 if (size > 0) { 269 err = -ENOMEM; 270 asd_ha->hw_prof.ue.area = kmalloc(size, GFP_KERNEL); 271 if (!asd_ha->hw_prof.ue.area) 272 goto out2; 273 err = asd_read_ocm_seg(asd_ha, (void *)asd_ha->hw_prof.ue.area, 274 offs + sizeof(*bc_struct), size); 275 if (err) { 276 kfree(asd_ha->hw_prof.ue.area); 277 asd_ha->hw_prof.ue.area = NULL; 278 asd_ha->hw_prof.ue.num = 0; 279 asd_ha->hw_prof.ue.size = 0; 280 ASD_DPRINTK("couldn't read ue entries(%d)\n", err); 281 } 282 } 283out2: 284 kfree(bc_struct); 285out: 286 return err; 287} 288 289static void 290asd_hwi_initialize_ocm_dir (struct asd_ha_struct *asd_ha) 291{ 292 int i; 293 294 /* Zero OCM */ 295 for (i = 0; i < OCM_MAX_SIZE; i += 4) 296 asd_write_ocm_dword(asd_ha, i, 0); 297 298 /* Write Dir */ 299 asd_write_ocm_seg(asd_ha, &OCMDirInit, 0, 300 sizeof(struct asd_ocm_dir)); 301 302 /* Write Dir Entries */ 303 for (i = 0; i < OCM_INIT_DIR_ENTRIES; i++) 304 asd_write_ocm_seg(asd_ha, &OCMDirEntriesInit[i], 305 sizeof(struct asd_ocm_dir) + 306 (i * sizeof(struct asd_ocm_dir_ent)) 307 , sizeof(struct asd_ocm_dir_ent)); 308 309} 310 311static int 312asd_hwi_check_ocm_access (struct asd_ha_struct *asd_ha) 313{ 314 struct pci_dev *pcidev = asd_ha->pcidev; 315 u32 reg; 316 int err = 0; 317 u32 v; 318 319 /* check if OCM has been initialized by BIOS */ 320 reg = asd_read_reg_dword(asd_ha, EXSICNFGR); 321 322 if (!(reg & OCMINITIALIZED)) { 323 err = pci_read_config_dword(pcidev, PCIC_INTRPT_STAT, &v); 324 if (err) { 325 asd_printk("couldn't access PCIC_INTRPT_STAT of %s\n", 326 pci_name(pcidev)); 327 goto out; 328 } 329 330 printk(KERN_INFO "OCM is not initialized by BIOS," 331 "reinitialize it and ignore it, current IntrptStatus" 332 "is 0x%x\n", v); 333 334 if (v) 335 err = pci_write_config_dword(pcidev, 336 PCIC_INTRPT_STAT, v); 337 if (err) { 338 asd_printk("couldn't write PCIC_INTRPT_STAT of %s\n", 339 pci_name(pcidev)); 340 goto out; 341 } 342 343 asd_hwi_initialize_ocm_dir(asd_ha); 344 345 } 346out: 347 return err; 348} 349 350/** 351 * asd_read_ocm - read on chip memory (OCM) 352 * @asd_ha: pointer to the host adapter structure 353 */ 354int asd_read_ocm(struct asd_ha_struct *asd_ha) 355{ 356 int err; 357 struct asd_ocm_dir *dir; 358 359 if (asd_hwi_check_ocm_access(asd_ha)) 360 return -1; 361 362 dir = kmalloc(sizeof(*dir), GFP_KERNEL); 363 if (!dir) { 364 asd_printk("no memory for ocm dir\n"); 365 return -ENOMEM; 366 } 367 368 err = asd_read_ocm_dir(asd_ha, dir, 0); 369 if (err) 370 goto out; 371 372 err = asd_get_bios_chim(asd_ha, dir); 373out: 374 kfree(dir); 375 return err; 376} 377 378/* ---------- FLASH stuff ---------- */ 379 380#define FLASH_RESET 0xF0 381 382#define ASD_FLASH_SIZE 0x200000 383#define FLASH_DIR_COOKIE "*** ADAPTEC FLASH DIRECTORY *** " 384#define FLASH_NEXT_ENTRY_OFFS 0x2000 385#define FLASH_MAX_DIR_ENTRIES 32 386 387#define FLASH_DE_TYPE_MASK 0x3FFFFFFF 388#define FLASH_DE_MS 0x120 389#define FLASH_DE_CTRL_A_USER 0xE0 390 391struct asd_flash_de { 392 __le32 type; 393 __le32 offs; 394 __le32 pad_size; 395 __le32 image_size; 396 __le32 chksum; 397 u8 _r[12]; 398 u8 version[32]; 399} __attribute__ ((packed)); 400 401struct asd_flash_dir { 402 u8 cookie[32]; 403 __le32 rev; /* 2 */ 404 __le32 chksum; 405 __le32 chksum_antidote; 406 __le32 bld; 407 u8 bld_id[32]; /* build id data */ 408 u8 ver_data[32]; /* date and time of build */ 409 __le32 ae_mask; 410 __le32 v_mask; 411 __le32 oc_mask; 412 u8 _r[20]; 413 struct asd_flash_de dir_entry[FLASH_MAX_DIR_ENTRIES]; 414} __attribute__ ((packed)); 415 416struct asd_manuf_sec { 417 char sig[2]; /* 'S', 'M' */ 418 u16 offs_next; 419 u8 maj; /* 0 */ 420 u8 min; /* 0 */ 421 u16 chksum; 422 u16 size; 423 u8 _r[6]; 424 u8 sas_addr[SAS_ADDR_SIZE]; 425 u8 pcba_sn[ASD_PCBA_SN_SIZE]; 426 /* Here start the other segments */ 427 u8 linked_list[0]; 428} __attribute__ ((packed)); 429 430struct asd_manuf_phy_desc { 431 u8 state; /* low 4 bits */ 432#define MS_PHY_STATE_ENABLED 0 433#define MS_PHY_STATE_REPORTED 1 434#define MS_PHY_STATE_HIDDEN 2 435 u8 phy_id; 436 u16 _r; 437 u8 phy_control_0; /* mode 5 reg 0x160 */ 438 u8 phy_control_1; /* mode 5 reg 0x161 */ 439 u8 phy_control_2; /* mode 5 reg 0x162 */ 440 u8 phy_control_3; /* mode 5 reg 0x163 */ 441} __attribute__ ((packed)); 442 443struct asd_manuf_phy_param { 444 char sig[2]; /* 'P', 'M' */ 445 u16 next; 446 u8 maj; /* 0 */ 447 u8 min; /* 2 */ 448 u8 num_phy_desc; /* 8 */ 449 u8 phy_desc_size; /* 8 */ 450 u8 _r[3]; 451 u8 usage_model_id; 452 u32 _r2; 453 struct asd_manuf_phy_desc phy_desc[ASD_MAX_PHYS]; 454} __attribute__ ((packed)); 455 456 457struct asd_ms_sb_desc { 458 u8 type; 459 u8 node_desc_index; 460 u8 conn_desc_index; 461 u8 _recvd[0]; 462} __attribute__ ((packed)); 463 464 465struct asd_ms_conn_desc { 466 u8 type; 467 u8 location; 468 u8 num_sideband_desc; 469 u8 size_sideband_desc; 470 u32 _resvd; 471 u8 name[16]; 472 struct asd_ms_sb_desc sb_desc[0]; 473} __attribute__ ((packed)); 474 475struct asd_nd_phy_desc { 476 u8 vp_attch_type; 477 u8 attch_specific[0]; 478} __attribute__ ((packed)); 479 480 481struct asd_ms_node_desc { 482 u8 type; 483 u8 num_phy_desc; 484 u8 size_phy_desc; 485 u8 _resvd; 486 u8 name[16]; 487 struct asd_nd_phy_desc phy_desc[0]; 488} __attribute__ ((packed)); 489 490struct asd_ms_conn_map { 491 char sig[2]; /* 'M', 'C' */ 492 __le16 next; 493 u8 maj; /* 0 */ 494 u8 min; /* 0 */ 495 __le16 cm_size; /* size of this struct */ 496 u8 num_conn; 497 u8 conn_size; 498 u8 num_nodes; 499 u8 usage_model_id; 500 u32 _resvd; 501 struct asd_ms_conn_desc conn_desc[0]; 502 struct asd_ms_node_desc node_desc[0]; 503} __attribute__ ((packed)); 504 505struct asd_ctrla_phy_entry { 506 u8 sas_addr[SAS_ADDR_SIZE]; 507 u8 sas_link_rates; /* max in hi bits, min in low bits */ 508 u8 flags; 509 u8 sata_link_rates; 510 u8 _r[5]; 511} __attribute__ ((packed)); 512 513struct asd_ctrla_phy_settings { 514 u8 id0; /* P'h'y */ 515 u8 _r; 516 u16 next; 517 u8 num_phys; /* number of PHYs in the PCI function */ 518 u8 _r2[3]; 519 struct asd_ctrla_phy_entry phy_ent[ASD_MAX_PHYS]; 520} __attribute__ ((packed)); 521 522struct asd_ll_el { 523 u8 id0; 524 u8 id1; 525 __le16 next; 526 u8 something_here[0]; 527} __attribute__ ((packed)); 528 529static int asd_poll_flash(struct asd_ha_struct *asd_ha) 530{ 531 int c; 532 u8 d; 533 534 for (c = 5000; c > 0; c--) { 535 d = asd_read_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar); 536 d ^= asd_read_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar); 537 if (!d) 538 return 0; 539 udelay(5); 540 } 541 return -ENOENT; 542} 543 544static int asd_reset_flash(struct asd_ha_struct *asd_ha) 545{ 546 int err; 547 548 err = asd_poll_flash(asd_ha); 549 if (err) 550 return err; 551 asd_write_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar, FLASH_RESET); 552 err = asd_poll_flash(asd_ha); 553 554 return err; 555} 556 557static int asd_read_flash_seg(struct asd_ha_struct *asd_ha, 558 void *buffer, u32 offs, int size) 559{ 560 asd_read_reg_string(asd_ha, buffer, asd_ha->hw_prof.flash.bar+offs, 561 size); 562 return 0; 563} 564 565/** 566 * asd_find_flash_dir - finds and reads the flash directory 567 * @asd_ha: pointer to the host adapter structure 568 * @flash_dir: pointer to flash directory structure 569 * 570 * If found, the flash directory segment will be copied to 571 * @flash_dir. Return 1 if found, 0 if not. 572 */ 573static int asd_find_flash_dir(struct asd_ha_struct *asd_ha, 574 struct asd_flash_dir *flash_dir) 575{ 576 u32 v; 577 for (v = 0; v < ASD_FLASH_SIZE; v += FLASH_NEXT_ENTRY_OFFS) { 578 asd_read_flash_seg(asd_ha, flash_dir, v, 579 sizeof(FLASH_DIR_COOKIE)-1); 580 if (memcmp(flash_dir->cookie, FLASH_DIR_COOKIE, 581 sizeof(FLASH_DIR_COOKIE)-1) == 0) { 582 asd_ha->hw_prof.flash.dir_offs = v; 583 asd_read_flash_seg(asd_ha, flash_dir, v, 584 sizeof(*flash_dir)); 585 return 1; 586 } 587 } 588 return 0; 589} 590 591static int asd_flash_getid(struct asd_ha_struct *asd_ha) 592{ 593 int err = 0; 594 u32 reg; 595 596 reg = asd_read_reg_dword(asd_ha, EXSICNFGR); 597 598 if (pci_read_config_dword(asd_ha->pcidev, PCI_CONF_FLSH_BAR, 599 &asd_ha->hw_prof.flash.bar)) { 600 asd_printk("couldn't read PCI_CONF_FLSH_BAR of %s\n", 601 pci_name(asd_ha->pcidev)); 602 return -ENOENT; 603 } 604 asd_ha->hw_prof.flash.present = 1; 605 asd_ha->hw_prof.flash.wide = reg & FLASHW ? 1 : 0; 606 err = asd_reset_flash(asd_ha); 607 if (err) { 608 ASD_DPRINTK("couldn't reset flash(%d)\n", err); 609 return err; 610 } 611 return 0; 612} 613 614static u16 asd_calc_flash_chksum(u16 *p, int size) 615{ 616 u16 chksum = 0; 617 618 while (size-- > 0) 619 chksum += *p++; 620 621 return chksum; 622} 623 624 625static int asd_find_flash_de(struct asd_flash_dir *flash_dir, u32 entry_type, 626 u32 *offs, u32 *size) 627{ 628 int i; 629 struct asd_flash_de *de; 630 631 for (i = 0; i < FLASH_MAX_DIR_ENTRIES; i++) { 632 u32 type = le32_to_cpu(flash_dir->dir_entry[i].type); 633 634 type &= FLASH_DE_TYPE_MASK; 635 if (type == entry_type) 636 break; 637 } 638 if (i >= FLASH_MAX_DIR_ENTRIES) 639 return -ENOENT; 640 de = &flash_dir->dir_entry[i]; 641 *offs = le32_to_cpu(de->offs); 642 *size = le32_to_cpu(de->pad_size); 643 return 0; 644} 645 646static int asd_validate_ms(struct asd_manuf_sec *ms) 647{ 648 if (ms->sig[0] != 'S' || ms->sig[1] != 'M') { 649 ASD_DPRINTK("manuf sec: no valid sig(%c%c)\n", 650 ms->sig[0], ms->sig[1]); 651 return -ENOENT; 652 } 653 if (ms->maj != 0) { 654 asd_printk("unsupported manuf. sector. major version:%x\n", 655 ms->maj); 656 return -ENOENT; 657 } 658 ms->offs_next = le16_to_cpu((__force __le16) ms->offs_next); 659 ms->chksum = le16_to_cpu((__force __le16) ms->chksum); 660 ms->size = le16_to_cpu((__force __le16) ms->size); 661 662 if (asd_calc_flash_chksum((u16 *)ms, ms->size/2)) { 663 asd_printk("failed manuf sector checksum\n"); 664 } 665 666 return 0; 667} 668 669static int asd_ms_get_sas_addr(struct asd_ha_struct *asd_ha, 670 struct asd_manuf_sec *ms) 671{ 672 memcpy(asd_ha->hw_prof.sas_addr, ms->sas_addr, SAS_ADDR_SIZE); 673 return 0; 674} 675 676static int asd_ms_get_pcba_sn(struct asd_ha_struct *asd_ha, 677 struct asd_manuf_sec *ms) 678{ 679 memcpy(asd_ha->hw_prof.pcba_sn, ms->pcba_sn, ASD_PCBA_SN_SIZE); 680 asd_ha->hw_prof.pcba_sn[ASD_PCBA_SN_SIZE] = '\0'; 681 return 0; 682} 683 684/** 685 * asd_find_ll_by_id - find a linked list entry by its id 686 * @start: void pointer to the first element in the linked list 687 * @id0: the first byte of the id (offs 0) 688 * @id1: the second byte of the id (offs 1) 689 * 690 * @start has to be the _base_ element start, since the 691 * linked list entries's offset is from this pointer. 692 * Some linked list entries use only the first id, in which case 693 * you can pass 0xFF for the second. 694 */ 695static void *asd_find_ll_by_id(void * const start, const u8 id0, const u8 id1) 696{ 697 struct asd_ll_el *el = start; 698 699 do { 700 switch (id1) { 701 default: 702 if (el->id1 == id1) 703 case 0xFF: 704 if (el->id0 == id0) 705 return el; 706 } 707 el = start + le16_to_cpu(el->next); 708 } while (el != start); 709 710 return NULL; 711} 712 713/** 714 * asd_ms_get_phy_params - get phy parameters from the manufacturing sector 715 * @asd_ha: pointer to the host adapter structure 716 * @manuf_sec: pointer to the manufacturing sector 717 * 718 * The manufacturing sector contans also the linked list of sub-segments, 719 * since when it was read, its size was taken from the flash directory, 720 * not from the structure size. 721 * 722 * HIDDEN phys do not count in the total count. REPORTED phys cannot 723 * be enabled but are reported and counted towards the total. 724 * ENABLED phys are enabled by default and count towards the total. 725 * The absolute total phy number is ASD_MAX_PHYS. hw_prof->num_phys 726 * merely specifies the number of phys the host adapter decided to 727 * report. E.g., it is possible for phys 0, 1 and 2 to be HIDDEN, 728 * phys 3, 4 and 5 to be REPORTED and phys 6 and 7 to be ENABLED. 729 * In this case ASD_MAX_PHYS is 8, hw_prof->num_phys is 5, and only 2 730 * are actually enabled (enabled by default, max number of phys 731 * enableable in this case). 732 */ 733static int asd_ms_get_phy_params(struct asd_ha_struct *asd_ha, 734 struct asd_manuf_sec *manuf_sec) 735{ 736 int i; 737 int en_phys = 0; 738 int rep_phys = 0; 739 struct asd_manuf_phy_param *phy_param; 740 struct asd_manuf_phy_param dflt_phy_param; 741 742 phy_param = asd_find_ll_by_id(manuf_sec, 'P', 'M'); 743 if (!phy_param) { 744 ASD_DPRINTK("ms: no phy parameters found\n"); 745 ASD_DPRINTK("ms: Creating default phy parameters\n"); 746 dflt_phy_param.sig[0] = 'P'; 747 dflt_phy_param.sig[1] = 'M'; 748 dflt_phy_param.maj = 0; 749 dflt_phy_param.min = 2; 750 dflt_phy_param.num_phy_desc = 8; 751 dflt_phy_param.phy_desc_size = sizeof(struct asd_manuf_phy_desc); 752 for (i =0; i < ASD_MAX_PHYS; i++) { 753 dflt_phy_param.phy_desc[i].state = 0; 754 dflt_phy_param.phy_desc[i].phy_id = i; 755 dflt_phy_param.phy_desc[i].phy_control_0 = 0xf6; 756 dflt_phy_param.phy_desc[i].phy_control_1 = 0x10; 757 dflt_phy_param.phy_desc[i].phy_control_2 = 0x43; 758 dflt_phy_param.phy_desc[i].phy_control_3 = 0xeb; 759 } 760 761 phy_param = &dflt_phy_param; 762 763 } 764 765 if (phy_param->maj != 0) { 766 asd_printk("unsupported manuf. phy param major version:0x%x\n", 767 phy_param->maj); 768 return -ENOENT; 769 } 770 771 ASD_DPRINTK("ms: num_phy_desc: %d\n", phy_param->num_phy_desc); 772 asd_ha->hw_prof.enabled_phys = 0; 773 for (i = 0; i < phy_param->num_phy_desc; i++) { 774 struct asd_manuf_phy_desc *pd = &phy_param->phy_desc[i]; 775 switch (pd->state & 0xF) { 776 case MS_PHY_STATE_HIDDEN: 777 ASD_DPRINTK("ms: phy%d: HIDDEN\n", i); 778 continue; 779 case MS_PHY_STATE_REPORTED: 780 ASD_DPRINTK("ms: phy%d: REPORTED\n", i); 781 asd_ha->hw_prof.enabled_phys &= ~(1 << i); 782 rep_phys++; 783 continue; 784 case MS_PHY_STATE_ENABLED: 785 ASD_DPRINTK("ms: phy%d: ENABLED\n", i); 786 asd_ha->hw_prof.enabled_phys |= (1 << i); 787 en_phys++; 788 break; 789 } 790 asd_ha->hw_prof.phy_desc[i].phy_control_0 = pd->phy_control_0; 791 asd_ha->hw_prof.phy_desc[i].phy_control_1 = pd->phy_control_1; 792 asd_ha->hw_prof.phy_desc[i].phy_control_2 = pd->phy_control_2; 793 asd_ha->hw_prof.phy_desc[i].phy_control_3 = pd->phy_control_3; 794 } 795 asd_ha->hw_prof.max_phys = rep_phys + en_phys; 796 asd_ha->hw_prof.num_phys = en_phys; 797 ASD_DPRINTK("ms: max_phys:0x%x, num_phys:0x%x\n", 798 asd_ha->hw_prof.max_phys, asd_ha->hw_prof.num_phys); 799 ASD_DPRINTK("ms: enabled_phys:0x%x\n", asd_ha->hw_prof.enabled_phys); 800 return 0; 801} 802 803static int asd_ms_get_connector_map(struct asd_ha_struct *asd_ha, 804 struct asd_manuf_sec *manuf_sec) 805{ 806 struct asd_ms_conn_map *cm; 807 808 cm = asd_find_ll_by_id(manuf_sec, 'M', 'C'); 809 if (!cm) { 810 ASD_DPRINTK("ms: no connector map found\n"); 811 return 0; 812 } 813 814 if (cm->maj != 0) { 815 ASD_DPRINTK("ms: unsupported: connector map major version 0x%x" 816 "\n", cm->maj); 817 return -ENOENT; 818 } 819 820 821 return 0; 822} 823 824 825/** 826 * asd_process_ms - find and extract information from the manufacturing sector 827 * @asd_ha: pointer to the host adapter structure 828 * @flash_dir: pointer to the flash directory 829 */ 830static int asd_process_ms(struct asd_ha_struct *asd_ha, 831 struct asd_flash_dir *flash_dir) 832{ 833 int err; 834 struct asd_manuf_sec *manuf_sec; 835 u32 offs, size; 836 837 err = asd_find_flash_de(flash_dir, FLASH_DE_MS, &offs, &size); 838 if (err) { 839 ASD_DPRINTK("Couldn't find the manuf. sector\n"); 840 goto out; 841 } 842 843 if (size == 0) 844 goto out; 845 846 err = -ENOMEM; 847 manuf_sec = kmalloc(size, GFP_KERNEL); 848 if (!manuf_sec) { 849 ASD_DPRINTK("no mem for manuf sector\n"); 850 goto out; 851 } 852 853 err = asd_read_flash_seg(asd_ha, (void *)manuf_sec, offs, size); 854 if (err) { 855 ASD_DPRINTK("couldn't read manuf sector at 0x%x, size 0x%x\n", 856 offs, size); 857 goto out2; 858 } 859 860 err = asd_validate_ms(manuf_sec); 861 if (err) { 862 ASD_DPRINTK("couldn't validate manuf sector\n"); 863 goto out2; 864 } 865 866 err = asd_ms_get_sas_addr(asd_ha, manuf_sec); 867 if (err) { 868 ASD_DPRINTK("couldn't read the SAS_ADDR\n"); 869 goto out2; 870 } 871 ASD_DPRINTK("manuf sect SAS_ADDR %llx\n", 872 SAS_ADDR(asd_ha->hw_prof.sas_addr)); 873 874 err = asd_ms_get_pcba_sn(asd_ha, manuf_sec); 875 if (err) { 876 ASD_DPRINTK("couldn't read the PCBA SN\n"); 877 goto out2; 878 } 879 ASD_DPRINTK("manuf sect PCBA SN %s\n", asd_ha->hw_prof.pcba_sn); 880 881 err = asd_ms_get_phy_params(asd_ha, manuf_sec); 882 if (err) { 883 ASD_DPRINTK("ms: couldn't get phy parameters\n"); 884 goto out2; 885 } 886 887 err = asd_ms_get_connector_map(asd_ha, manuf_sec); 888 if (err) { 889 ASD_DPRINTK("ms: couldn't get connector map\n"); 890 goto out2; 891 } 892 893out2: 894 kfree(manuf_sec); 895out: 896 return err; 897} 898 899static int asd_process_ctrla_phy_settings(struct asd_ha_struct *asd_ha, 900 struct asd_ctrla_phy_settings *ps) 901{ 902 int i; 903 for (i = 0; i < ps->num_phys; i++) { 904 struct asd_ctrla_phy_entry *pe = &ps->phy_ent[i]; 905 906 if (!PHY_ENABLED(asd_ha, i)) 907 continue; 908 if (*(u64 *)pe->sas_addr == 0) { 909 asd_ha->hw_prof.enabled_phys &= ~(1 << i); 910 continue; 911 } 912 /* This is the SAS address which should be sent in IDENTIFY. */ 913 memcpy(asd_ha->hw_prof.phy_desc[i].sas_addr, pe->sas_addr, 914 SAS_ADDR_SIZE); 915 asd_ha->hw_prof.phy_desc[i].max_sas_lrate = 916 (pe->sas_link_rates & 0xF0) >> 4; 917 asd_ha->hw_prof.phy_desc[i].min_sas_lrate = 918 (pe->sas_link_rates & 0x0F); 919 asd_ha->hw_prof.phy_desc[i].max_sata_lrate = 920 (pe->sata_link_rates & 0xF0) >> 4; 921 asd_ha->hw_prof.phy_desc[i].min_sata_lrate = 922 (pe->sata_link_rates & 0x0F); 923 asd_ha->hw_prof.phy_desc[i].flags = pe->flags; 924 ASD_DPRINTK("ctrla: phy%d: sas_addr: %llx, sas rate:0x%x-0x%x," 925 " sata rate:0x%x-0x%x, flags:0x%x\n", 926 i, 927 SAS_ADDR(asd_ha->hw_prof.phy_desc[i].sas_addr), 928 asd_ha->hw_prof.phy_desc[i].max_sas_lrate, 929 asd_ha->hw_prof.phy_desc[i].min_sas_lrate, 930 asd_ha->hw_prof.phy_desc[i].max_sata_lrate, 931 asd_ha->hw_prof.phy_desc[i].min_sata_lrate, 932 asd_ha->hw_prof.phy_desc[i].flags); 933 } 934 935 return 0; 936} 937 938/** 939 * asd_process_ctrl_a_user - process CTRL-A user settings 940 * @asd_ha: pointer to the host adapter structure 941 * @flash_dir: pointer to the flash directory 942 */ 943static int asd_process_ctrl_a_user(struct asd_ha_struct *asd_ha, 944 struct asd_flash_dir *flash_dir) 945{ 946 int err, i; 947 u32 offs, size; 948 struct asd_ll_el *el; 949 struct asd_ctrla_phy_settings *ps; 950 struct asd_ctrla_phy_settings dflt_ps; 951 952 err = asd_find_flash_de(flash_dir, FLASH_DE_CTRL_A_USER, &offs, &size); 953 if (err) { 954 ASD_DPRINTK("couldn't find CTRL-A user settings section\n"); 955 ASD_DPRINTK("Creating default CTRL-A user settings section\n"); 956 957 dflt_ps.id0 = 'h'; 958 dflt_ps.num_phys = 8; 959 for (i =0; i < ASD_MAX_PHYS; i++) { 960 memcpy(dflt_ps.phy_ent[i].sas_addr, 961 asd_ha->hw_prof.sas_addr, SAS_ADDR_SIZE); 962 dflt_ps.phy_ent[i].sas_link_rates = 0x98; 963 dflt_ps.phy_ent[i].flags = 0x0; 964 dflt_ps.phy_ent[i].sata_link_rates = 0x0; 965 } 966 967 size = sizeof(struct asd_ctrla_phy_settings); 968 ps = &dflt_ps; 969 } 970 971 if (size == 0) 972 goto out; 973 974 err = -ENOMEM; 975 el = kmalloc(size, GFP_KERNEL); 976 if (!el) { 977 ASD_DPRINTK("no mem for ctrla user settings section\n"); 978 goto out; 979 } 980 981 err = asd_read_flash_seg(asd_ha, (void *)el, offs, size); 982 if (err) { 983 ASD_DPRINTK("couldn't read ctrla phy settings section\n"); 984 goto out2; 985 } 986 987 err = -ENOENT; 988 ps = asd_find_ll_by_id(el, 'h', 0xFF); 989 if (!ps) { 990 ASD_DPRINTK("couldn't find ctrla phy settings struct\n"); 991 goto out2; 992 } 993 994 err = asd_process_ctrla_phy_settings(asd_ha, ps); 995 if (err) { 996 ASD_DPRINTK("couldn't process ctrla phy settings\n"); 997 goto out2; 998 } 999out2: 1000 kfree(el); 1001out: 1002 return err; 1003} 1004 1005/** 1006 * asd_read_flash - read flash memory 1007 * @asd_ha: pointer to the host adapter structure 1008 */ 1009int asd_read_flash(struct asd_ha_struct *asd_ha) 1010{ 1011 int err; 1012 struct asd_flash_dir *flash_dir; 1013 1014 err = asd_flash_getid(asd_ha); 1015 if (err) 1016 return err; 1017 1018 flash_dir = kmalloc(sizeof(*flash_dir), GFP_KERNEL); 1019 if (!flash_dir) 1020 return -ENOMEM; 1021 1022 err = -ENOENT; 1023 if (!asd_find_flash_dir(asd_ha, flash_dir)) { 1024 ASD_DPRINTK("couldn't find flash directory\n"); 1025 goto out; 1026 } 1027 1028 if (le32_to_cpu(flash_dir->rev) != 2) { 1029 asd_printk("unsupported flash dir version:0x%x\n", 1030 le32_to_cpu(flash_dir->rev)); 1031 goto out; 1032 } 1033 1034 err = asd_process_ms(asd_ha, flash_dir); 1035 if (err) { 1036 ASD_DPRINTK("couldn't process manuf sector settings\n"); 1037 goto out; 1038 } 1039 1040 err = asd_process_ctrl_a_user(asd_ha, flash_dir); 1041 if (err) { 1042 ASD_DPRINTK("couldn't process CTRL-A user settings\n"); 1043 goto out; 1044 } 1045 1046out: 1047 kfree(flash_dir); 1048 return err; 1049} 1050 1051/** 1052 * asd_verify_flash_seg - verify data with flash memory 1053 * @asd_ha: pointer to the host adapter structure 1054 * @src: pointer to the source data to be verified 1055 * @dest_offset: offset from flash memory 1056 * @bytes_to_verify: total bytes to verify 1057 */ 1058int asd_verify_flash_seg(struct asd_ha_struct *asd_ha, 1059 const void *src, u32 dest_offset, u32 bytes_to_verify) 1060{ 1061 const u8 *src_buf; 1062 u8 flash_char; 1063 int err; 1064 u32 nv_offset, reg, i; 1065 1066 reg = asd_ha->hw_prof.flash.bar; 1067 src_buf = NULL; 1068 1069 err = FLASH_OK; 1070 nv_offset = dest_offset; 1071 src_buf = (const u8 *)src; 1072 for (i = 0; i < bytes_to_verify; i++) { 1073 flash_char = asd_read_reg_byte(asd_ha, reg + nv_offset + i); 1074 if (flash_char != src_buf[i]) { 1075 err = FAIL_VERIFY; 1076 break; 1077 } 1078 } 1079 return err; 1080} 1081 1082/** 1083 * asd_write_flash_seg - write data into flash memory 1084 * @asd_ha: pointer to the host adapter structure 1085 * @src: pointer to the source data to be written 1086 * @dest_offset: offset from flash memory 1087 * @bytes_to_write: total bytes to write 1088 */ 1089int asd_write_flash_seg(struct asd_ha_struct *asd_ha, 1090 const void *src, u32 dest_offset, u32 bytes_to_write) 1091{ 1092 const u8 *src_buf; 1093 u32 nv_offset, reg, i; 1094 int err; 1095 1096 reg = asd_ha->hw_prof.flash.bar; 1097 src_buf = NULL; 1098 1099 err = asd_check_flash_type(asd_ha); 1100 if (err) { 1101 ASD_DPRINTK("couldn't find the type of flash. err=%d\n", err); 1102 return err; 1103 } 1104 1105 nv_offset = dest_offset; 1106 err = asd_erase_nv_sector(asd_ha, nv_offset, bytes_to_write); 1107 if (err) { 1108 ASD_DPRINTK("Erase failed at offset:0x%x\n", 1109 nv_offset); 1110 return err; 1111 } 1112 1113 err = asd_reset_flash(asd_ha); 1114 if (err) { 1115 ASD_DPRINTK("couldn't reset flash. err=%d\n", err); 1116 return err; 1117 } 1118 1119 src_buf = (const u8 *)src; 1120 for (i = 0; i < bytes_to_write; i++) { 1121 /* Setup program command sequence */ 1122 switch (asd_ha->hw_prof.flash.method) { 1123 case FLASH_METHOD_A: 1124 { 1125 asd_write_reg_byte(asd_ha, 1126 (reg + 0xAAA), 0xAA); 1127 asd_write_reg_byte(asd_ha, 1128 (reg + 0x555), 0x55); 1129 asd_write_reg_byte(asd_ha, 1130 (reg + 0xAAA), 0xA0); 1131 asd_write_reg_byte(asd_ha, 1132 (reg + nv_offset + i), 1133 (*(src_buf + i))); 1134 break; 1135 } 1136 case FLASH_METHOD_B: 1137 { 1138 asd_write_reg_byte(asd_ha, 1139 (reg + 0x555), 0xAA); 1140 asd_write_reg_byte(asd_ha, 1141 (reg + 0x2AA), 0x55); 1142 asd_write_reg_byte(asd_ha, 1143 (reg + 0x555), 0xA0); 1144 asd_write_reg_byte(asd_ha, 1145 (reg + nv_offset + i), 1146 (*(src_buf + i))); 1147 break; 1148 } 1149 default: 1150 break; 1151 } 1152 if (asd_chk_write_status(asd_ha, 1153 (nv_offset + i), 0) != 0) { 1154 ASD_DPRINTK("aicx: Write failed at offset:0x%x\n", 1155 reg + nv_offset + i); 1156 return FAIL_WRITE_FLASH; 1157 } 1158 } 1159 1160 err = asd_reset_flash(asd_ha); 1161 if (err) { 1162 ASD_DPRINTK("couldn't reset flash. err=%d\n", err); 1163 return err; 1164 } 1165 return 0; 1166} 1167 1168int asd_chk_write_status(struct asd_ha_struct *asd_ha, 1169 u32 sector_addr, u8 erase_flag) 1170{ 1171 u32 reg; 1172 u32 loop_cnt; 1173 u8 nv_data1, nv_data2; 1174 u8 toggle_bit1; 1175 1176 /* 1177 * Read from DQ2 requires sector address 1178 * while it's dont care for DQ6 1179 */ 1180 reg = asd_ha->hw_prof.flash.bar; 1181 1182 for (loop_cnt = 0; loop_cnt < 50000; loop_cnt++) { 1183 nv_data1 = asd_read_reg_byte(asd_ha, reg); 1184 nv_data2 = asd_read_reg_byte(asd_ha, reg); 1185 1186 toggle_bit1 = ((nv_data1 & FLASH_STATUS_BIT_MASK_DQ6) 1187 ^ (nv_data2 & FLASH_STATUS_BIT_MASK_DQ6)); 1188 1189 if (toggle_bit1 == 0) { 1190 return 0; 1191 } else { 1192 if (nv_data2 & FLASH_STATUS_BIT_MASK_DQ5) { 1193 nv_data1 = asd_read_reg_byte(asd_ha, 1194 reg); 1195 nv_data2 = asd_read_reg_byte(asd_ha, 1196 reg); 1197 toggle_bit1 = 1198 ((nv_data1 & FLASH_STATUS_BIT_MASK_DQ6) 1199 ^ (nv_data2 & FLASH_STATUS_BIT_MASK_DQ6)); 1200 1201 if (toggle_bit1 == 0) 1202 return 0; 1203 } 1204 } 1205 1206 /* 1207 * ERASE is a sector-by-sector operation and requires 1208 * more time to finish while WRITE is byte-byte-byte 1209 * operation and takes lesser time to finish. 1210 * 1211 * For some strange reason a reduced ERASE delay gives different 1212 * behaviour across different spirit boards. Hence we set 1213 * a optimum balance of 50mus for ERASE which works well 1214 * across all boards. 1215 */ 1216 if (erase_flag) { 1217 udelay(FLASH_STATUS_ERASE_DELAY_COUNT); 1218 } else { 1219 udelay(FLASH_STATUS_WRITE_DELAY_COUNT); 1220 } 1221 } 1222 return -1; 1223} 1224 1225/** 1226 * asd_hwi_erase_nv_sector - Erase the flash memory sectors. 1227 * @asd_ha: pointer to the host adapter structure 1228 * @flash_addr: pointer to offset from flash memory 1229 * @size: total bytes to erase. 1230 */ 1231int asd_erase_nv_sector(struct asd_ha_struct *asd_ha, u32 flash_addr, u32 size) 1232{ 1233 u32 reg; 1234 u32 sector_addr; 1235 1236 reg = asd_ha->hw_prof.flash.bar; 1237 1238 /* sector staring address */ 1239 sector_addr = flash_addr & FLASH_SECTOR_SIZE_MASK; 1240 1241 /* 1242 * Erasing an flash sector needs to be done in six consecutive 1243 * write cyles. 1244 */ 1245 while (sector_addr < flash_addr+size) { 1246 switch (asd_ha->hw_prof.flash.method) { 1247 case FLASH_METHOD_A: 1248 asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0xAA); 1249 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x55); 1250 asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0x80); 1251 asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0xAA); 1252 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x55); 1253 asd_write_reg_byte(asd_ha, (reg + sector_addr), 0x30); 1254 break; 1255 case FLASH_METHOD_B: 1256 asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA); 1257 asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55); 1258 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x80); 1259 asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA); 1260 asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55); 1261 asd_write_reg_byte(asd_ha, (reg + sector_addr), 0x30); 1262 break; 1263 default: 1264 break; 1265 } 1266 1267 if (asd_chk_write_status(asd_ha, sector_addr, 1) != 0) 1268 return FAIL_ERASE_FLASH; 1269 1270 sector_addr += FLASH_SECTOR_SIZE; 1271 } 1272 1273 return 0; 1274} 1275 1276int asd_check_flash_type(struct asd_ha_struct *asd_ha) 1277{ 1278 u8 manuf_id; 1279 u8 dev_id; 1280 u8 sec_prot; 1281 u32 inc; 1282 u32 reg; 1283 int err; 1284 1285 /* get Flash memory base address */ 1286 reg = asd_ha->hw_prof.flash.bar; 1287 1288 /* Determine flash info */ 1289 err = asd_reset_flash(asd_ha); 1290 if (err) { 1291 ASD_DPRINTK("couldn't reset flash. err=%d\n", err); 1292 return err; 1293 } 1294 1295 asd_ha->hw_prof.flash.method = FLASH_METHOD_UNKNOWN; 1296 asd_ha->hw_prof.flash.manuf = FLASH_MANUF_ID_UNKNOWN; 1297 asd_ha->hw_prof.flash.dev_id = FLASH_DEV_ID_UNKNOWN; 1298 1299 /* Get flash info. This would most likely be AMD Am29LV family flash. 1300 * First try the sequence for word mode. It is the same as for 1301 * 008B (byte mode only), 160B (word mode) and 800D (word mode). 1302 */ 1303 inc = asd_ha->hw_prof.flash.wide ? 2 : 1; 1304 asd_write_reg_byte(asd_ha, reg + 0xAAA, 0xAA); 1305 asd_write_reg_byte(asd_ha, reg + 0x555, 0x55); 1306 asd_write_reg_byte(asd_ha, reg + 0xAAA, 0x90); 1307 manuf_id = asd_read_reg_byte(asd_ha, reg); 1308 dev_id = asd_read_reg_byte(asd_ha, reg + inc); 1309 sec_prot = asd_read_reg_byte(asd_ha, reg + inc + inc); 1310 /* Get out of autoselect mode. */ 1311 err = asd_reset_flash(asd_ha); 1312 if (err) { 1313 ASD_DPRINTK("couldn't reset flash. err=%d\n", err); 1314 return err; 1315 } 1316 ASD_DPRINTK("Flash MethodA manuf_id(0x%x) dev_id(0x%x) " 1317 "sec_prot(0x%x)\n", manuf_id, dev_id, sec_prot); 1318 err = asd_reset_flash(asd_ha); 1319 if (err != 0) 1320 return err; 1321 1322 switch (manuf_id) { 1323 case FLASH_MANUF_ID_AMD: 1324 switch (sec_prot) { 1325 case FLASH_DEV_ID_AM29LV800DT: 1326 case FLASH_DEV_ID_AM29LV640MT: 1327 case FLASH_DEV_ID_AM29F800B: 1328 asd_ha->hw_prof.flash.method = FLASH_METHOD_A; 1329 break; 1330 default: 1331 break; 1332 } 1333 break; 1334 case FLASH_MANUF_ID_ST: 1335 switch (sec_prot) { 1336 case FLASH_DEV_ID_STM29W800DT: 1337 case FLASH_DEV_ID_STM29LV640: 1338 asd_ha->hw_prof.flash.method = FLASH_METHOD_A; 1339 break; 1340 default: 1341 break; 1342 } 1343 break; 1344 case FLASH_MANUF_ID_FUJITSU: 1345 switch (sec_prot) { 1346 case FLASH_DEV_ID_MBM29LV800TE: 1347 case FLASH_DEV_ID_MBM29DL800TA: 1348 asd_ha->hw_prof.flash.method = FLASH_METHOD_A; 1349 break; 1350 } 1351 break; 1352 case FLASH_MANUF_ID_MACRONIX: 1353 switch (sec_prot) { 1354 case FLASH_DEV_ID_MX29LV800BT: 1355 asd_ha->hw_prof.flash.method = FLASH_METHOD_A; 1356 break; 1357 } 1358 break; 1359 } 1360 1361 if (asd_ha->hw_prof.flash.method == FLASH_METHOD_UNKNOWN) { 1362 err = asd_reset_flash(asd_ha); 1363 if (err) { 1364 ASD_DPRINTK("couldn't reset flash. err=%d\n", err); 1365 return err; 1366 } 1367 1368 /* Issue Unlock sequence for AM29LV008BT */ 1369 asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA); 1370 asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55); 1371 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x90); 1372 manuf_id = asd_read_reg_byte(asd_ha, reg); 1373 dev_id = asd_read_reg_byte(asd_ha, reg + inc); 1374 sec_prot = asd_read_reg_byte(asd_ha, reg + inc + inc); 1375 1376 ASD_DPRINTK("Flash MethodB manuf_id(0x%x) dev_id(0x%x) sec_prot" 1377 "(0x%x)\n", manuf_id, dev_id, sec_prot); 1378 1379 err = asd_reset_flash(asd_ha); 1380 if (err != 0) { 1381 ASD_DPRINTK("couldn't reset flash. err=%d\n", err); 1382 return err; 1383 } 1384 1385 switch (manuf_id) { 1386 case FLASH_MANUF_ID_AMD: 1387 switch (dev_id) { 1388 case FLASH_DEV_ID_AM29LV008BT: 1389 asd_ha->hw_prof.flash.method = FLASH_METHOD_B; 1390 break; 1391 default: 1392 break; 1393 } 1394 break; 1395 case FLASH_MANUF_ID_ST: 1396 switch (dev_id) { 1397 case FLASH_DEV_ID_STM29008: 1398 asd_ha->hw_prof.flash.method = FLASH_METHOD_B; 1399 break; 1400 default: 1401 break; 1402 } 1403 break; 1404 case FLASH_MANUF_ID_FUJITSU: 1405 switch (dev_id) { 1406 case FLASH_DEV_ID_MBM29LV008TA: 1407 asd_ha->hw_prof.flash.method = FLASH_METHOD_B; 1408 break; 1409 } 1410 break; 1411 case FLASH_MANUF_ID_INTEL: 1412 switch (dev_id) { 1413 case FLASH_DEV_ID_I28LV00TAT: 1414 asd_ha->hw_prof.flash.method = FLASH_METHOD_B; 1415 break; 1416 } 1417 break; 1418 case FLASH_MANUF_ID_MACRONIX: 1419 switch (dev_id) { 1420 case FLASH_DEV_ID_I28LV00TAT: 1421 asd_ha->hw_prof.flash.method = FLASH_METHOD_B; 1422 break; 1423 } 1424 break; 1425 default: 1426 return FAIL_FIND_FLASH_ID; 1427 } 1428 } 1429 1430 if (asd_ha->hw_prof.flash.method == FLASH_METHOD_UNKNOWN) 1431 return FAIL_FIND_FLASH_ID; 1432 1433 asd_ha->hw_prof.flash.manuf = manuf_id; 1434 asd_ha->hw_prof.flash.dev_id = dev_id; 1435 asd_ha->hw_prof.flash.sec_prot = sec_prot; 1436 return 0; 1437} 1438