1#ifndef DRIVERS_PCI_H 2#define DRIVERS_PCI_H 3 4#include <linux/workqueue.h> 5 6#define PCI_CFG_SPACE_SIZE 256 7#define PCI_CFG_SPACE_EXP_SIZE 4096 8 9/* Functions internal to the PCI core code */ 10 11extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env); 12extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); 13extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 14#ifndef CONFIG_DMI 15static inline void pci_create_firmware_label_files(struct pci_dev *pdev) 16{ return; } 17static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) 18{ return; } 19#else 20extern void pci_create_firmware_label_files(struct pci_dev *pdev); 21extern void pci_remove_firmware_label_files(struct pci_dev *pdev); 22#endif 23extern void pci_cleanup_rom(struct pci_dev *dev); 24#ifdef HAVE_PCI_MMAP 25enum pci_mmap_api { 26 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ 27 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ 28}; 29extern int pci_mmap_fits(struct pci_dev *pdev, int resno, 30 struct vm_area_struct *vmai, 31 enum pci_mmap_api mmap_api); 32#endif 33int pci_probe_reset_function(struct pci_dev *dev); 34 35/** 36 * struct pci_platform_pm_ops - Firmware PM callbacks 37 * 38 * @is_manageable: returns 'true' if given device is power manageable by the 39 * platform firmware 40 * 41 * @set_state: invokes the platform firmware to set the device's power state 42 * 43 * @choose_state: returns PCI power state of given device preferred by the 44 * platform; to be used during system-wide transitions from a 45 * sleeping state to the working state and vice versa 46 * 47 * @can_wakeup: returns 'true' if given device is capable of waking up the 48 * system from a sleeping state 49 * 50 * @sleep_wake: enables/disables the system wake up capability of given device 51 * 52 * @run_wake: enables/disables the platform to generate run-time wake-up events 53 * for given device (the device's wake-up capability has to be 54 * enabled by @sleep_wake for this feature to work) 55 * 56 * If given platform is generally capable of power managing PCI devices, all of 57 * these callbacks are mandatory. 58 */ 59struct pci_platform_pm_ops { 60 bool (*is_manageable)(struct pci_dev *dev); 61 int (*set_state)(struct pci_dev *dev, pci_power_t state); 62 pci_power_t (*choose_state)(struct pci_dev *dev); 63 bool (*can_wakeup)(struct pci_dev *dev); 64 int (*sleep_wake)(struct pci_dev *dev, bool enable); 65 int (*run_wake)(struct pci_dev *dev, bool enable); 66}; 67 68extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops); 69extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 70extern void pci_disable_enabled_device(struct pci_dev *dev); 71extern bool pci_check_pme_status(struct pci_dev *dev); 72extern int pci_finish_runtime_suspend(struct pci_dev *dev); 73extern void pci_wakeup_event(struct pci_dev *dev); 74extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 75extern void pci_pme_wakeup_bus(struct pci_bus *bus); 76extern void pci_pm_init(struct pci_dev *dev); 77extern void platform_pci_wakeup_init(struct pci_dev *dev); 78extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); 79 80static inline bool pci_is_bridge(struct pci_dev *pci_dev) 81{ 82 return !!(pci_dev->subordinate); 83} 84 85extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); 86extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); 87extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); 88extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); 89extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); 90extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); 91 92struct pci_vpd_ops { 93 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 94 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 95 void (*release)(struct pci_dev *dev); 96}; 97 98struct pci_vpd { 99 unsigned int len; 100 const struct pci_vpd_ops *ops; 101 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 102}; 103 104extern int pci_vpd_pci22_init(struct pci_dev *dev); 105static inline void pci_vpd_release(struct pci_dev *dev) 106{ 107 if (dev->vpd) 108 dev->vpd->ops->release(dev); 109} 110 111/* PCI /proc functions */ 112#ifdef CONFIG_PROC_FS 113extern int pci_proc_attach_device(struct pci_dev *dev); 114extern int pci_proc_detach_device(struct pci_dev *dev); 115extern int pci_proc_detach_bus(struct pci_bus *bus); 116#else 117static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 118static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 119static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 120#endif 121 122/* Functions for PCI Hotplug drivers to use */ 123extern unsigned int pci_do_scan_bus(struct pci_bus *bus); 124 125#ifdef HAVE_PCI_LEGACY 126extern void pci_create_legacy_files(struct pci_bus *bus); 127extern void pci_remove_legacy_files(struct pci_bus *bus); 128#else 129static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 130static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 131#endif 132 133/* Lock for read/write access to pci device and bus lists */ 134extern struct rw_semaphore pci_bus_sem; 135 136extern unsigned int pci_pm_d3_delay; 137 138#ifdef CONFIG_PCI_MSI 139void pci_no_msi(void); 140extern void pci_msi_init_pci_dev(struct pci_dev *dev); 141#else 142static inline void pci_no_msi(void) { } 143static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } 144#endif 145 146#ifdef CONFIG_PCIEAER 147void pci_no_aer(void); 148bool pci_aer_available(void); 149#else 150static inline void pci_no_aer(void) { } 151static inline bool pci_aer_available(void) { return false; } 152#endif 153 154static inline int pci_no_d1d2(struct pci_dev *dev) 155{ 156 unsigned int parent_dstates = 0; 157 158 if (dev->bus->self) 159 parent_dstates = dev->bus->self->no_d1d2; 160 return (dev->no_d1d2 || parent_dstates); 161 162} 163extern struct device_attribute pci_dev_attrs[]; 164extern struct device_attribute dev_attr_cpuaffinity; 165extern struct device_attribute dev_attr_cpulistaffinity; 166#ifdef CONFIG_HOTPLUG 167extern struct bus_attribute pci_bus_attrs[]; 168#else 169#define pci_bus_attrs NULL 170#endif 171 172 173/** 174 * pci_match_one_device - Tell if a PCI device structure has a matching 175 * PCI device id structure 176 * @id: single PCI device id structure to match 177 * @dev: the PCI device structure to match against 178 * 179 * Returns the matching pci_device_id structure or %NULL if there is no match. 180 */ 181static inline const struct pci_device_id * 182pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 183{ 184 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 185 (id->device == PCI_ANY_ID || id->device == dev->device) && 186 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 187 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 188 !((id->class ^ dev->class) & id->class_mask)) 189 return id; 190 return NULL; 191} 192 193struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev); 194 195/* PCI slot sysfs helper code */ 196#define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 197 198extern struct kset *pci_slots_kset; 199 200struct pci_slot_attribute { 201 struct attribute attr; 202 ssize_t (*show)(struct pci_slot *, char *); 203 ssize_t (*store)(struct pci_slot *, const char *, size_t); 204}; 205#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 206 207enum pci_bar_type { 208 pci_bar_unknown, /* Standard PCI BAR probe */ 209 pci_bar_io, /* An io port BAR */ 210 pci_bar_mem32, /* A 32-bit memory BAR */ 211 pci_bar_mem64, /* A 64-bit memory BAR */ 212}; 213 214extern int pci_setup_device(struct pci_dev *dev); 215extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 216 struct resource *res, unsigned int reg); 217extern int pci_resource_bar(struct pci_dev *dev, int resno, 218 enum pci_bar_type *type); 219extern int pci_bus_add_child(struct pci_bus *bus); 220extern void pci_enable_ari(struct pci_dev *dev); 221/** 222 * pci_ari_enabled - query ARI forwarding status 223 * @bus: the PCI bus 224 * 225 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; 226 */ 227static inline int pci_ari_enabled(struct pci_bus *bus) 228{ 229 return bus->self && bus->self->ari_enabled; 230} 231 232#ifdef CONFIG_PCI_QUIRKS 233extern int pci_is_reassigndev(struct pci_dev *dev); 234resource_size_t pci_specified_resource_alignment(struct pci_dev *dev); 235extern void pci_disable_bridge_window(struct pci_dev *dev); 236#endif 237 238/* Single Root I/O Virtualization */ 239struct pci_sriov { 240 int pos; /* capability position */ 241 int nres; /* number of resources */ 242 u32 cap; /* SR-IOV Capabilities */ 243 u16 ctrl; /* SR-IOV Control */ 244 u16 total; /* total VFs associated with the PF */ 245 u16 initial; /* initial VFs associated with the PF */ 246 u16 nr_virtfn; /* number of VFs available */ 247 u16 offset; /* first VF Routing ID offset */ 248 u16 stride; /* following VF stride */ 249 u32 pgsz; /* page size for BAR alignment */ 250 u8 link; /* Function Dependency Link */ 251 struct pci_dev *dev; /* lowest numbered PF */ 252 struct pci_dev *self; /* this PF */ 253 struct mutex lock; /* lock for VF bus */ 254 struct work_struct mtask; /* VF Migration task */ 255 u8 __iomem *mstate; /* VF Migration State Array */ 256}; 257 258/* Address Translation Service */ 259struct pci_ats { 260 int pos; /* capability position */ 261 int stu; /* Smallest Translation Unit */ 262 int qdep; /* Invalidate Queue Depth */ 263 int ref_cnt; /* Physical Function reference count */ 264 unsigned int is_enabled:1; /* Enable bit is set */ 265}; 266 267#ifdef CONFIG_PCI_IOV 268extern int pci_iov_init(struct pci_dev *dev); 269extern void pci_iov_release(struct pci_dev *dev); 270extern int pci_iov_resource_bar(struct pci_dev *dev, int resno, 271 enum pci_bar_type *type); 272extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, 273 int resno); 274extern void pci_restore_iov_state(struct pci_dev *dev); 275extern int pci_iov_bus_range(struct pci_bus *bus); 276 277extern int pci_enable_ats(struct pci_dev *dev, int ps); 278extern void pci_disable_ats(struct pci_dev *dev); 279extern int pci_ats_queue_depth(struct pci_dev *dev); 280/** 281 * pci_ats_enabled - query the ATS status 282 * @dev: the PCI device 283 * 284 * Returns 1 if ATS capability is enabled, or 0 if not. 285 */ 286static inline int pci_ats_enabled(struct pci_dev *dev) 287{ 288 return dev->ats && dev->ats->is_enabled; 289} 290#else 291static inline int pci_iov_init(struct pci_dev *dev) 292{ 293 return -ENODEV; 294} 295static inline void pci_iov_release(struct pci_dev *dev) 296 297{ 298} 299static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, 300 enum pci_bar_type *type) 301{ 302 return 0; 303} 304static inline void pci_restore_iov_state(struct pci_dev *dev) 305{ 306} 307static inline int pci_iov_bus_range(struct pci_bus *bus) 308{ 309 return 0; 310} 311 312static inline int pci_enable_ats(struct pci_dev *dev, int ps) 313{ 314 return -ENODEV; 315} 316static inline void pci_disable_ats(struct pci_dev *dev) 317{ 318} 319static inline int pci_ats_queue_depth(struct pci_dev *dev) 320{ 321 return -ENODEV; 322} 323static inline int pci_ats_enabled(struct pci_dev *dev) 324{ 325 return 0; 326} 327#endif /* CONFIG_PCI_IOV */ 328 329static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, 330 struct resource *res) 331{ 332#ifdef CONFIG_PCI_IOV 333 int resno = res - dev->resource; 334 335 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) 336 return pci_sriov_resource_alignment(dev, resno); 337#endif 338 return resource_alignment(res); 339} 340 341extern void pci_enable_acs(struct pci_dev *dev); 342 343struct pci_dev_reset_methods { 344 u16 vendor; 345 u16 device; 346 int (*reset)(struct pci_dev *dev, int probe); 347}; 348 349#ifdef CONFIG_PCI_QUIRKS 350extern int pci_dev_specific_reset(struct pci_dev *dev, int probe); 351#else 352static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) 353{ 354 return -ENOTTY; 355} 356#endif 357 358#endif /* DRIVERS_PCI_H */ 359