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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/wireless/prism54/
1/*
2 *  Copyright (C) 2002 Intersil Americas Inc.
3 *  Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
4 *  Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
5 *  Copyright (C) 2003 Aurelien Alleaume <slts@free.fr>
6 *
7 *  This program is free software; you can redistribute it and/or modify
8 *  it under the terms of the GNU General Public License as published by
9 *  the Free Software Foundation; either version 2 of the License
10 *
11 *  This program is distributed in the hope that it will be useful,
12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 *  GNU General Public License for more details.
15 *
16 *  You should have received a copy of the GNU General Public License
17 *  along with this program; if not, write to the Free Software
18 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19 *
20 */
21
22#ifndef _ISLPCI_DEV_H
23#define _ISLPCI_DEV_H
24
25#include <linux/netdevice.h>
26#include <linux/wireless.h>
27#include <net/iw_handler.h>
28#include <linux/list.h>
29#include <linux/mutex.h>
30
31#include "isl_38xx.h"
32#include "isl_oid.h"
33#include "islpci_mgt.h"
34
35/* some states might not be superflous and may be removed when
36   design is finalized (hvr) */
37typedef enum {
38	PRV_STATE_OFF = 0,	/* this means hw_unavailable is != 0 */
39	PRV_STATE_PREBOOT,	/* we are in a pre-boot state (empty RAM) */
40	PRV_STATE_BOOT,		/* boot state (fw upload, run fw) */
41	PRV_STATE_POSTBOOT,	/* after boot state, need reset now */
42	PRV_STATE_PREINIT,	/* pre-init state */
43	PRV_STATE_INIT,		/* init state (restore MIB backup to device) */
44	PRV_STATE_READY,	/* driver&device are in operational state */
45	PRV_STATE_SLEEP		/* device in sleep mode */
46} islpci_state_t;
47
48/* ACL using MAC address */
49struct mac_entry {
50   struct list_head _list;
51   char addr[ETH_ALEN];
52};
53
54struct islpci_acl {
55   enum { MAC_POLICY_OPEN=0, MAC_POLICY_ACCEPT=1, MAC_POLICY_REJECT=2 } policy;
56   struct list_head mac_list;  /* a list of mac_entry */
57   int size;   /* size of queue */
58   struct mutex lock;   /* accessed in ioctls and trap_work */
59};
60
61struct islpci_membuf {
62	int size;                   /* size of memory */
63	void *mem;                  /* address of memory as seen by CPU */
64	dma_addr_t pci_addr;        /* address of memory as seen by device */
65};
66
67#define MAX_BSS_WPA_IE_COUNT 64
68#define MAX_WPA_IE_LEN 64
69struct islpci_bss_wpa_ie {
70	struct list_head list;
71	unsigned long last_update;
72	u8 bssid[ETH_ALEN];
73	u8 wpa_ie[MAX_WPA_IE_LEN];
74	size_t wpa_ie_len;
75
76};
77
78typedef struct {
79	spinlock_t slock;	/* generic spinlock; */
80
81	u32 priv_oid;
82
83	/* our mib cache */
84	u32 iw_mode;
85        struct rw_semaphore mib_sem;
86	void **mib;
87	char nickname[IW_ESSID_MAX_SIZE+1];
88
89	/* Take care of the wireless stats */
90	struct work_struct stats_work;
91	struct mutex stats_lock;
92	/* remember when we last updated the stats */
93	unsigned long stats_timestamp;
94	/* The first is accessed under semaphore locking.
95	 * The second is the clean one we return to iwconfig.
96	 */
97	struct iw_statistics local_iwstatistics;
98	struct iw_statistics iwstatistics;
99
100	struct iw_spy_data spy_data; /* iwspy support */
101
102	struct iw_public_data wireless_data;
103
104	int monitor_type; /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_PRISM */
105
106	struct islpci_acl acl;
107
108	/* PCI bus allocation & configuration members */
109	struct pci_dev *pdev;	/* PCI structure information */
110	char firmware[33];
111
112	void __iomem *device_base;	/* ioremapped device base address */
113
114	/* consistent DMA region */
115	void *driver_mem_address;	/* base DMA address */
116	dma_addr_t device_host_address;	/* base DMA address (bus address) */
117	dma_addr_t device_psm_buffer;	/* host memory for PSM buffering (bus address) */
118
119	/* our network_device structure  */
120	struct net_device *ndev;
121
122	/* device queue interface members */
123	struct isl38xx_cb *control_block;	/* device control block
124							   (== driver_mem_address!) */
125
126	/* Each queue has three indexes:
127	 *   free/index_mgmt/data_rx/tx (called index, see below),
128	 *   driver_curr_frag, and device_curr_frag (in the control block)
129	 * All indexes are ever-increasing, but interpreted modulo the
130	 * device queue size when used.
131	 *   index <= device_curr_frag <= driver_curr_frag  at all times
132	 * For rx queues, [index, device_curr_frag) contains fragments
133	 * that the interrupt processing needs to handle (owned by driver).
134	 * [device_curr_frag, driver_curr_frag) is the free space in the
135	 * rx queue, waiting for data (owned by device).  The driver
136	 * increments driver_curr_frag to indicate to the device that more
137	 * buffers are available.
138	 * If device_curr_frag == driver_curr_frag, no more rx buffers are
139	 * available, and the rx DMA engine of the device is halted.
140	 * For tx queues, [index, device_curr_frag) contains fragments
141	 * where tx is done; they need to be freed (owned by driver).
142	 * [device_curr_frag, driver_curr_frag) contains the frames
143	 * that are being transferred (owned by device).  The driver
144	 * increments driver_curr_frag to indicate that more tx work
145	 * needs to be done.
146	 */
147	u32 index_mgmt_rx;              /* real index mgmt rx queue */
148	u32 index_mgmt_tx;              /* read index mgmt tx queue */
149	u32 free_data_rx;	/* free pointer data rx queue */
150	u32 free_data_tx;	/* free pointer data tx queue */
151	u32 data_low_tx_full;	/* full detected flag */
152
153	/* frame memory buffers for the device queues */
154	struct islpci_membuf mgmt_tx[ISL38XX_CB_MGMT_QSIZE];
155	struct islpci_membuf mgmt_rx[ISL38XX_CB_MGMT_QSIZE];
156	struct sk_buff *data_low_tx[ISL38XX_CB_TX_QSIZE];
157	struct sk_buff *data_low_rx[ISL38XX_CB_RX_QSIZE];
158	dma_addr_t pci_map_tx_address[ISL38XX_CB_TX_QSIZE];
159	dma_addr_t pci_map_rx_address[ISL38XX_CB_RX_QSIZE];
160
161	/* wait for a reset interrupt */
162	wait_queue_head_t reset_done;
163
164	/* used by islpci_mgt_transaction */
165	struct mutex mgmt_lock; /* serialize access to mailbox and wqueue */
166	struct islpci_mgmtframe *mgmt_received;	  /* mbox for incoming frame */
167	wait_queue_head_t mgmt_wqueue;            /* waitqueue for mbox */
168
169	/* state machine */
170	islpci_state_t state;
171	int state_off;		/* enumeration of off-state, if 0 then
172				 * we're not in any off-state */
173
174	/* WPA stuff */
175	int wpa; /* WPA mode enabled */
176	struct list_head bss_wpa_list;
177	int num_bss_wpa;
178	struct mutex wpa_lock;
179	u8 wpa_ie[MAX_WPA_IE_LEN];
180	size_t wpa_ie_len;
181
182	struct work_struct reset_task;
183	int reset_task_pending;
184} islpci_private;
185
186static inline islpci_state_t
187islpci_get_state(islpci_private *priv)
188{
189	/* lock */
190	return priv->state;
191	/* unlock */
192}
193
194islpci_state_t islpci_set_state(islpci_private *priv, islpci_state_t new_state);
195
196#define ISLPCI_TX_TIMEOUT               (2*HZ)
197
198irqreturn_t islpci_interrupt(int, void *);
199
200int prism54_post_setup(islpci_private *, int);
201int islpci_reset(islpci_private *, int);
202
203static inline void
204islpci_trigger(islpci_private *priv)
205{
206	isl38xx_trigger_device(islpci_get_state(priv) == PRV_STATE_SLEEP,
207			       priv->device_base);
208}
209
210int islpci_free_memory(islpci_private *);
211struct net_device *islpci_setup(struct pci_dev *);
212
213#define DRV_NAME	"prism54"
214#define DRV_VERSION	"1.2"
215
216#endif				/* _ISLPCI_DEV_H */
217