1/* 2 * Copyright (C) 2003 - 2009 NetXen, Inc. 3 * Copyright (C) 2009 - QLogic Corporation. 4 * All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, 19 * MA 02111-1307, USA. 20 * 21 * The full GNU General Public License is included in this distribution 22 * in the file called "COPYING". 23 * 24 */ 25 26#include <linux/netdevice.h> 27#include <linux/delay.h> 28#include <linux/slab.h> 29#include "netxen_nic.h" 30#include "netxen_nic_hw.h" 31 32struct crb_addr_pair { 33 u32 addr; 34 u32 data; 35}; 36 37#define NETXEN_MAX_CRB_XFORM 60 38static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; 39#define NETXEN_ADDR_ERROR (0xffffffff) 40 41#define crb_addr_transform(name) \ 42 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ 43 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20 44 45#define NETXEN_NIC_XDMA_RESET 0x8000ff 46 47static void 48netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 49 struct nx_host_rds_ring *rds_ring); 50static int netxen_p3_has_mn(struct netxen_adapter *adapter); 51 52static void crb_addr_transform_setup(void) 53{ 54 crb_addr_transform(XDMA); 55 crb_addr_transform(TIMR); 56 crb_addr_transform(SRE); 57 crb_addr_transform(SQN3); 58 crb_addr_transform(SQN2); 59 crb_addr_transform(SQN1); 60 crb_addr_transform(SQN0); 61 crb_addr_transform(SQS3); 62 crb_addr_transform(SQS2); 63 crb_addr_transform(SQS1); 64 crb_addr_transform(SQS0); 65 crb_addr_transform(RPMX7); 66 crb_addr_transform(RPMX6); 67 crb_addr_transform(RPMX5); 68 crb_addr_transform(RPMX4); 69 crb_addr_transform(RPMX3); 70 crb_addr_transform(RPMX2); 71 crb_addr_transform(RPMX1); 72 crb_addr_transform(RPMX0); 73 crb_addr_transform(ROMUSB); 74 crb_addr_transform(SN); 75 crb_addr_transform(QMN); 76 crb_addr_transform(QMS); 77 crb_addr_transform(PGNI); 78 crb_addr_transform(PGND); 79 crb_addr_transform(PGN3); 80 crb_addr_transform(PGN2); 81 crb_addr_transform(PGN1); 82 crb_addr_transform(PGN0); 83 crb_addr_transform(PGSI); 84 crb_addr_transform(PGSD); 85 crb_addr_transform(PGS3); 86 crb_addr_transform(PGS2); 87 crb_addr_transform(PGS1); 88 crb_addr_transform(PGS0); 89 crb_addr_transform(PS); 90 crb_addr_transform(PH); 91 crb_addr_transform(NIU); 92 crb_addr_transform(I2Q); 93 crb_addr_transform(EG); 94 crb_addr_transform(MN); 95 crb_addr_transform(MS); 96 crb_addr_transform(CAS2); 97 crb_addr_transform(CAS1); 98 crb_addr_transform(CAS0); 99 crb_addr_transform(CAM); 100 crb_addr_transform(C2C1); 101 crb_addr_transform(C2C0); 102 crb_addr_transform(SMB); 103 crb_addr_transform(OCM0); 104 crb_addr_transform(I2C0); 105} 106 107void netxen_release_rx_buffers(struct netxen_adapter *adapter) 108{ 109 struct netxen_recv_context *recv_ctx; 110 struct nx_host_rds_ring *rds_ring; 111 struct netxen_rx_buffer *rx_buf; 112 int i, ring; 113 114 recv_ctx = &adapter->recv_ctx; 115 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 116 rds_ring = &recv_ctx->rds_rings[ring]; 117 for (i = 0; i < rds_ring->num_desc; ++i) { 118 rx_buf = &(rds_ring->rx_buf_arr[i]); 119 if (rx_buf->state == NETXEN_BUFFER_FREE) 120 continue; 121 pci_unmap_single(adapter->pdev, 122 rx_buf->dma, 123 rds_ring->dma_size, 124 PCI_DMA_FROMDEVICE); 125 if (rx_buf->skb != NULL) 126 dev_kfree_skb_any(rx_buf->skb); 127 } 128 } 129} 130 131void netxen_release_tx_buffers(struct netxen_adapter *adapter) 132{ 133 struct netxen_cmd_buffer *cmd_buf; 134 struct netxen_skb_frag *buffrag; 135 int i, j; 136 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 137 138 cmd_buf = tx_ring->cmd_buf_arr; 139 for (i = 0; i < tx_ring->num_desc; i++) { 140 buffrag = cmd_buf->frag_array; 141 if (buffrag->dma) { 142 pci_unmap_single(adapter->pdev, buffrag->dma, 143 buffrag->length, PCI_DMA_TODEVICE); 144 buffrag->dma = 0ULL; 145 } 146 for (j = 0; j < cmd_buf->frag_count; j++) { 147 buffrag++; 148 if (buffrag->dma) { 149 pci_unmap_page(adapter->pdev, buffrag->dma, 150 buffrag->length, 151 PCI_DMA_TODEVICE); 152 buffrag->dma = 0ULL; 153 } 154 } 155 if (cmd_buf->skb) { 156 dev_kfree_skb_any(cmd_buf->skb); 157 cmd_buf->skb = NULL; 158 } 159 cmd_buf++; 160 } 161} 162 163void netxen_free_sw_resources(struct netxen_adapter *adapter) 164{ 165 struct netxen_recv_context *recv_ctx; 166 struct nx_host_rds_ring *rds_ring; 167 struct nx_host_tx_ring *tx_ring; 168 int ring; 169 170 recv_ctx = &adapter->recv_ctx; 171 172 if (recv_ctx->rds_rings == NULL) 173 goto skip_rds; 174 175 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 176 rds_ring = &recv_ctx->rds_rings[ring]; 177 vfree(rds_ring->rx_buf_arr); 178 rds_ring->rx_buf_arr = NULL; 179 } 180 kfree(recv_ctx->rds_rings); 181 182skip_rds: 183 if (adapter->tx_ring == NULL) 184 return; 185 186 tx_ring = adapter->tx_ring; 187 vfree(tx_ring->cmd_buf_arr); 188 kfree(tx_ring); 189 adapter->tx_ring = NULL; 190} 191 192int netxen_alloc_sw_resources(struct netxen_adapter *adapter) 193{ 194 struct netxen_recv_context *recv_ctx; 195 struct nx_host_rds_ring *rds_ring; 196 struct nx_host_sds_ring *sds_ring; 197 struct nx_host_tx_ring *tx_ring; 198 struct netxen_rx_buffer *rx_buf; 199 int ring, i, size; 200 201 struct netxen_cmd_buffer *cmd_buf_arr; 202 struct net_device *netdev = adapter->netdev; 203 struct pci_dev *pdev = adapter->pdev; 204 205 size = sizeof(struct nx_host_tx_ring); 206 tx_ring = kzalloc(size, GFP_KERNEL); 207 if (tx_ring == NULL) { 208 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n", 209 netdev->name); 210 return -ENOMEM; 211 } 212 adapter->tx_ring = tx_ring; 213 214 tx_ring->num_desc = adapter->num_txd; 215 tx_ring->txq = netdev_get_tx_queue(netdev, 0); 216 217 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring)); 218 if (cmd_buf_arr == NULL) { 219 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n", 220 netdev->name); 221 goto err_out; 222 } 223 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring)); 224 tx_ring->cmd_buf_arr = cmd_buf_arr; 225 226 recv_ctx = &adapter->recv_ctx; 227 228 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring); 229 rds_ring = kzalloc(size, GFP_KERNEL); 230 if (rds_ring == NULL) { 231 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n", 232 netdev->name); 233 goto err_out; 234 } 235 recv_ctx->rds_rings = rds_ring; 236 237 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 238 rds_ring = &recv_ctx->rds_rings[ring]; 239 switch (ring) { 240 case RCV_RING_NORMAL: 241 rds_ring->num_desc = adapter->num_rxd; 242 if (adapter->ahw.cut_through) { 243 rds_ring->dma_size = 244 NX_CT_DEFAULT_RX_BUF_LEN; 245 rds_ring->skb_size = 246 NX_CT_DEFAULT_RX_BUF_LEN; 247 } else { 248 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 249 rds_ring->dma_size = 250 NX_P3_RX_BUF_MAX_LEN; 251 else 252 rds_ring->dma_size = 253 NX_P2_RX_BUF_MAX_LEN; 254 rds_ring->skb_size = 255 rds_ring->dma_size + NET_IP_ALIGN; 256 } 257 break; 258 259 case RCV_RING_JUMBO: 260 rds_ring->num_desc = adapter->num_jumbo_rxd; 261 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 262 rds_ring->dma_size = 263 NX_P3_RX_JUMBO_BUF_MAX_LEN; 264 else 265 rds_ring->dma_size = 266 NX_P2_RX_JUMBO_BUF_MAX_LEN; 267 268 if (adapter->capabilities & NX_CAP0_HW_LRO) 269 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA; 270 271 rds_ring->skb_size = 272 rds_ring->dma_size + NET_IP_ALIGN; 273 break; 274 275 case RCV_RING_LRO: 276 rds_ring->num_desc = adapter->num_lro_rxd; 277 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH; 278 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; 279 break; 280 281 } 282 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *) 283 vmalloc(RCV_BUFF_RINGSIZE(rds_ring)); 284 if (rds_ring->rx_buf_arr == NULL) { 285 printk(KERN_ERR "%s: Failed to allocate " 286 "rx buffer ring %d\n", 287 netdev->name, ring); 288 /* free whatever was already allocated */ 289 goto err_out; 290 } 291 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring)); 292 INIT_LIST_HEAD(&rds_ring->free_list); 293 /* 294 * Now go through all of them, set reference handles 295 * and put them in the queues. 296 */ 297 rx_buf = rds_ring->rx_buf_arr; 298 for (i = 0; i < rds_ring->num_desc; i++) { 299 list_add_tail(&rx_buf->list, 300 &rds_ring->free_list); 301 rx_buf->ref_handle = i; 302 rx_buf->state = NETXEN_BUFFER_FREE; 303 rx_buf++; 304 } 305 spin_lock_init(&rds_ring->lock); 306 } 307 308 for (ring = 0; ring < adapter->max_sds_rings; ring++) { 309 sds_ring = &recv_ctx->sds_rings[ring]; 310 sds_ring->irq = adapter->msix_entries[ring].vector; 311 sds_ring->adapter = adapter; 312 sds_ring->num_desc = adapter->num_rxd; 313 314 for (i = 0; i < NUM_RCV_DESC_RINGS; i++) 315 INIT_LIST_HEAD(&sds_ring->free_list[i]); 316 } 317 318 return 0; 319 320err_out: 321 netxen_free_sw_resources(adapter); 322 return -ENOMEM; 323} 324 325/* 326 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB 327 * address to external PCI CRB address. 328 */ 329static u32 netxen_decode_crb_addr(u32 addr) 330{ 331 int i; 332 u32 base_addr, offset, pci_base; 333 334 crb_addr_transform_setup(); 335 336 pci_base = NETXEN_ADDR_ERROR; 337 base_addr = addr & 0xfff00000; 338 offset = addr & 0x000fffff; 339 340 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { 341 if (crb_addr_xform[i] == base_addr) { 342 pci_base = i << 20; 343 break; 344 } 345 } 346 if (pci_base == NETXEN_ADDR_ERROR) 347 return pci_base; 348 else 349 return (pci_base + offset); 350} 351 352#define NETXEN_MAX_ROM_WAIT_USEC 100 353 354static int netxen_wait_rom_done(struct netxen_adapter *adapter) 355{ 356 long timeout = 0; 357 long done = 0; 358 359 cond_resched(); 360 361 while (done == 0) { 362 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS); 363 done &= 2; 364 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) { 365 dev_err(&adapter->pdev->dev, 366 "Timeout reached waiting for rom done"); 367 return -EIO; 368 } 369 udelay(1); 370 } 371 return 0; 372} 373 374static int do_rom_fast_read(struct netxen_adapter *adapter, 375 int addr, int *valp) 376{ 377 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); 378 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 379 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); 380 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); 381 if (netxen_wait_rom_done(adapter)) { 382 printk("Error waiting for rom done\n"); 383 return -EIO; 384 } 385 /* reset abyte_cnt and dummy_byte_cnt */ 386 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); 387 udelay(10); 388 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); 389 390 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA); 391 return 0; 392} 393 394static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 395 u8 *bytes, size_t size) 396{ 397 int addridx; 398 int ret = 0; 399 400 for (addridx = addr; addridx < (addr + size); addridx += 4) { 401 int v; 402 ret = do_rom_fast_read(adapter, addridx, &v); 403 if (ret != 0) 404 break; 405 *(__le32 *)bytes = cpu_to_le32(v); 406 bytes += 4; 407 } 408 409 return ret; 410} 411 412int 413netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, 414 u8 *bytes, size_t size) 415{ 416 int ret; 417 418 ret = netxen_rom_lock(adapter); 419 if (ret < 0) 420 return ret; 421 422 ret = do_rom_fast_read_words(adapter, addr, bytes, size); 423 424 netxen_rom_unlock(adapter); 425 return ret; 426} 427 428int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) 429{ 430 int ret; 431 432 if (netxen_rom_lock(adapter) != 0) 433 return -EIO; 434 435 ret = do_rom_fast_read(adapter, addr, valp); 436 netxen_rom_unlock(adapter); 437 return ret; 438} 439 440#define NETXEN_BOARDTYPE 0x4008 441#define NETXEN_BOARDNUM 0x400c 442#define NETXEN_CHIPNUM 0x4010 443 444int netxen_pinit_from_rom(struct netxen_adapter *adapter) 445{ 446 int addr, val; 447 int i, n, init_delay = 0; 448 struct crb_addr_pair *buf; 449 unsigned offset; 450 u32 off; 451 452 /* resetall */ 453 netxen_rom_lock(adapter); 454 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff); 455 netxen_rom_unlock(adapter); 456 457 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 458 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 459 (n != 0xcafecafe) || 460 netxen_rom_fast_read(adapter, 4, &n) != 0) { 461 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 462 "n: %08x\n", netxen_nic_driver_name, n); 463 return -EIO; 464 } 465 offset = n & 0xffffU; 466 n = (n >> 16) & 0xffffU; 467 } else { 468 if (netxen_rom_fast_read(adapter, 0, &n) != 0 || 469 !(n & 0x80000000)) { 470 printk(KERN_ERR "%s: ERROR Reading crb_init area: " 471 "n: %08x\n", netxen_nic_driver_name, n); 472 return -EIO; 473 } 474 offset = 1; 475 n &= ~0x80000000; 476 } 477 478 if (n >= 1024) { 479 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not" 480 " initialized.\n", __func__, n); 481 return -EIO; 482 } 483 484 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); 485 if (buf == NULL) { 486 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n", 487 netxen_nic_driver_name); 488 return -ENOMEM; 489 } 490 491 for (i = 0; i < n; i++) { 492 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || 493 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { 494 kfree(buf); 495 return -EIO; 496 } 497 498 buf[i].addr = addr; 499 buf[i].data = val; 500 501 } 502 503 for (i = 0; i < n; i++) { 504 505 off = netxen_decode_crb_addr(buf[i].addr); 506 if (off == NETXEN_ADDR_ERROR) { 507 printk(KERN_ERR"CRB init value out of range %x\n", 508 buf[i].addr); 509 continue; 510 } 511 off += NETXEN_PCI_CRBSPACE; 512 513 if (off & 1) 514 continue; 515 516 /* skipping cold reboot MAGIC */ 517 if (off == NETXEN_CAM_RAM(0x1fc)) 518 continue; 519 520 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 521 if (off == (NETXEN_CRB_I2C0 + 0x1c)) 522 continue; 523 /* do not reset PCI */ 524 if (off == (ROMUSB_GLB + 0xbc)) 525 continue; 526 if (off == (ROMUSB_GLB + 0xa8)) 527 continue; 528 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ 529 continue; 530 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ 531 continue; 532 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ 533 continue; 534 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET) 535 continue; 536 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) && 537 !NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 538 buf[i].data = 0x1020; 539 /* skip the function enable register */ 540 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION)) 541 continue; 542 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2)) 543 continue; 544 if ((off & 0x0ff00000) == NETXEN_CRB_SMB) 545 continue; 546 } 547 548 init_delay = 1; 549 /* After writing this register, HW needs time for CRB */ 550 /* to quiet down (else crb_window returns 0xffffffff) */ 551 if (off == NETXEN_ROMUSB_GLB_SW_RESET) { 552 init_delay = 1000; 553 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 554 /* hold xdma in reset also */ 555 buf[i].data = NETXEN_NIC_XDMA_RESET; 556 buf[i].data = 0x8000ff; 557 } 558 } 559 560 NXWR32(adapter, off, buf[i].data); 561 562 msleep(init_delay); 563 } 564 kfree(buf); 565 566 /* disable_peg_cache_all */ 567 568 /* unreset_net_cache */ 569 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 570 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET); 571 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f)); 572 } 573 574 /* p2dn replyCount */ 575 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); 576 /* disable_peg_cache 0 */ 577 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8); 578 /* disable_peg_cache 1 */ 579 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8); 580 581 /* peg_clr_all */ 582 583 /* peg_clr 0 */ 584 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0); 585 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0); 586 /* peg_clr 1 */ 587 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0); 588 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0); 589 /* peg_clr 2 */ 590 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0); 591 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0); 592 /* peg_clr 3 */ 593 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0); 594 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0); 595 return 0; 596} 597 598static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section) 599{ 600 uint32_t i; 601 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 602 __le32 entries = cpu_to_le32(directory->num_entries); 603 604 for (i = 0; i < entries; i++) { 605 606 __le32 offs = cpu_to_le32(directory->findex) + 607 (i * cpu_to_le32(directory->entry_size)); 608 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8)); 609 610 if (tab_type == section) 611 return (struct uni_table_desc *) &unirom[offs]; 612 } 613 614 return NULL; 615} 616 617#define QLCNIC_FILEHEADER_SIZE (14 * 4) 618 619static int 620netxen_nic_validate_header(struct netxen_adapter *adapter) 621 { 622 const u8 *unirom = adapter->fw->data; 623 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; 624 u32 fw_file_size = adapter->fw->size; 625 u32 tab_size; 626 __le32 entries; 627 __le32 entry_size; 628 629 if (fw_file_size < QLCNIC_FILEHEADER_SIZE) 630 return -EINVAL; 631 632 entries = cpu_to_le32(directory->num_entries); 633 entry_size = cpu_to_le32(directory->entry_size); 634 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size); 635 636 if (fw_file_size < tab_size) 637 return -EINVAL; 638 639 return 0; 640} 641 642static int 643netxen_nic_validate_bootld(struct netxen_adapter *adapter) 644{ 645 struct uni_table_desc *tab_desc; 646 struct uni_data_desc *descr; 647 const u8 *unirom = adapter->fw->data; 648 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 649 NX_UNI_BOOTLD_IDX_OFF)); 650 u32 offs; 651 u32 tab_size; 652 u32 data_size; 653 654 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD); 655 656 if (!tab_desc) 657 return -EINVAL; 658 659 tab_size = cpu_to_le32(tab_desc->findex) + 660 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 661 662 if (adapter->fw->size < tab_size) 663 return -EINVAL; 664 665 offs = cpu_to_le32(tab_desc->findex) + 666 (cpu_to_le32(tab_desc->entry_size) * (idx)); 667 descr = (struct uni_data_desc *)&unirom[offs]; 668 669 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 670 671 if (adapter->fw->size < data_size) 672 return -EINVAL; 673 674 return 0; 675} 676 677static int 678netxen_nic_validate_fw(struct netxen_adapter *adapter) 679{ 680 struct uni_table_desc *tab_desc; 681 struct uni_data_desc *descr; 682 const u8 *unirom = adapter->fw->data; 683 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 684 NX_UNI_FIRMWARE_IDX_OFF)); 685 u32 offs; 686 u32 tab_size; 687 u32 data_size; 688 689 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW); 690 691 if (!tab_desc) 692 return -EINVAL; 693 694 tab_size = cpu_to_le32(tab_desc->findex) + 695 (cpu_to_le32(tab_desc->entry_size) * (idx + 1)); 696 697 if (adapter->fw->size < tab_size) 698 return -EINVAL; 699 700 offs = cpu_to_le32(tab_desc->findex) + 701 (cpu_to_le32(tab_desc->entry_size) * (idx)); 702 descr = (struct uni_data_desc *)&unirom[offs]; 703 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size); 704 705 if (adapter->fw->size < data_size) 706 return -EINVAL; 707 708 return 0; 709} 710 711 712static int 713netxen_nic_validate_product_offs(struct netxen_adapter *adapter) 714{ 715 struct uni_table_desc *ptab_descr; 716 const u8 *unirom = adapter->fw->data; 717 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ? 718 1 : netxen_p3_has_mn(adapter); 719 __le32 entries; 720 __le32 entry_size; 721 u32 tab_size; 722 u32 i; 723 724 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL); 725 if (ptab_descr == NULL) 726 return -EINVAL; 727 728 entries = cpu_to_le32(ptab_descr->num_entries); 729 entry_size = cpu_to_le32(ptab_descr->entry_size); 730 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size); 731 732 if (adapter->fw->size < tab_size) 733 return -EINVAL; 734 735nomn: 736 for (i = 0; i < entries; i++) { 737 738 __le32 flags, file_chiprev, offs; 739 u8 chiprev = adapter->ahw.revision_id; 740 uint32_t flagbit; 741 742 offs = cpu_to_le32(ptab_descr->findex) + 743 (i * cpu_to_le32(ptab_descr->entry_size)); 744 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF)); 745 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] + 746 NX_UNI_CHIP_REV_OFF)); 747 748 flagbit = mn_present ? 1 : 2; 749 750 if ((chiprev == file_chiprev) && 751 ((1ULL << flagbit) & flags)) { 752 adapter->file_prd_off = offs; 753 return 0; 754 } 755 } 756 757 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 758 mn_present = 0; 759 goto nomn; 760 } 761 762 return -EINVAL; 763} 764 765static int 766netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter) 767{ 768 if (netxen_nic_validate_header(adapter)) { 769 dev_err(&adapter->pdev->dev, 770 "unified image: header validation failed\n"); 771 return -EINVAL; 772 } 773 774 if (netxen_nic_validate_product_offs(adapter)) { 775 dev_err(&adapter->pdev->dev, 776 "unified image: product validation failed\n"); 777 return -EINVAL; 778 } 779 780 if (netxen_nic_validate_bootld(adapter)) { 781 dev_err(&adapter->pdev->dev, 782 "unified image: bootld validation failed\n"); 783 return -EINVAL; 784 } 785 786 if (netxen_nic_validate_fw(adapter)) { 787 dev_err(&adapter->pdev->dev, 788 "unified image: firmware validation failed\n"); 789 return -EINVAL; 790 } 791 792 return 0; 793} 794 795static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter, 796 u32 section, u32 idx_offset) 797{ 798 const u8 *unirom = adapter->fw->data; 799 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + 800 idx_offset)); 801 struct uni_table_desc *tab_desc; 802 __le32 offs; 803 804 tab_desc = nx_get_table_desc(unirom, section); 805 806 if (tab_desc == NULL) 807 return NULL; 808 809 offs = cpu_to_le32(tab_desc->findex) + 810 (cpu_to_le32(tab_desc->entry_size) * idx); 811 812 return (struct uni_data_desc *)&unirom[offs]; 813} 814 815static u8 * 816nx_get_bootld_offs(struct netxen_adapter *adapter) 817{ 818 u32 offs = NETXEN_BOOTLD_START; 819 820 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 821 offs = cpu_to_le32((nx_get_data_desc(adapter, 822 NX_UNI_DIR_SECT_BOOTLD, 823 NX_UNI_BOOTLD_IDX_OFF))->findex); 824 825 return (u8 *)&adapter->fw->data[offs]; 826} 827 828static u8 * 829nx_get_fw_offs(struct netxen_adapter *adapter) 830{ 831 u32 offs = NETXEN_IMAGE_START; 832 833 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 834 offs = cpu_to_le32((nx_get_data_desc(adapter, 835 NX_UNI_DIR_SECT_FW, 836 NX_UNI_FIRMWARE_IDX_OFF))->findex); 837 838 return (u8 *)&adapter->fw->data[offs]; 839} 840 841static __le32 842nx_get_fw_size(struct netxen_adapter *adapter) 843{ 844 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) 845 return cpu_to_le32((nx_get_data_desc(adapter, 846 NX_UNI_DIR_SECT_FW, 847 NX_UNI_FIRMWARE_IDX_OFF))->size); 848 else 849 return cpu_to_le32( 850 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]); 851} 852 853static __le32 854nx_get_fw_version(struct netxen_adapter *adapter) 855{ 856 struct uni_data_desc *fw_data_desc; 857 const struct firmware *fw = adapter->fw; 858 __le32 major, minor, sub; 859 const u8 *ver_str; 860 int i, ret = 0; 861 862 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 863 864 fw_data_desc = nx_get_data_desc(adapter, 865 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF); 866 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) + 867 cpu_to_le32(fw_data_desc->size) - 17; 868 869 for (i = 0; i < 12; i++) { 870 if (!strncmp(&ver_str[i], "REV=", 4)) { 871 ret = sscanf(&ver_str[i+4], "%u.%u.%u ", 872 &major, &minor, &sub); 873 break; 874 } 875 } 876 877 if (ret != 3) 878 return 0; 879 880 return major + (minor << 8) + (sub << 16); 881 882 } else 883 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]); 884} 885 886static __le32 887nx_get_bios_version(struct netxen_adapter *adapter) 888{ 889 const struct firmware *fw = adapter->fw; 890 __le32 bios_ver, prd_off = adapter->file_prd_off; 891 892 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) { 893 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off]) 894 + NX_UNI_BIOS_VERSION_OFF)); 895 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + 896 (bios_ver >> 24); 897 } else 898 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]); 899 900} 901 902int 903netxen_need_fw_reset(struct netxen_adapter *adapter) 904{ 905 u32 count, old_count; 906 u32 val, version, major, minor, build; 907 int i, timeout; 908 u8 fw_type; 909 910 /* NX2031 firmware doesn't support heartbit */ 911 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 912 return 1; 913 914 if (adapter->need_fw_reset) 915 return 1; 916 917 /* last attempt had failed */ 918 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) 919 return 1; 920 921 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 922 923 for (i = 0; i < 10; i++) { 924 925 timeout = msleep_interruptible(200); 926 if (timeout) { 927 NXWR32(adapter, CRB_CMDPEG_STATE, 928 PHAN_INITIALIZE_FAILED); 929 return -EINTR; 930 } 931 932 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 933 if (count != old_count) 934 break; 935 } 936 937 /* firmware is dead */ 938 if (count == old_count) 939 return 1; 940 941 /* check if we have got newer or different file firmware */ 942 if (adapter->fw) { 943 944 val = nx_get_fw_version(adapter); 945 946 version = NETXEN_DECODE_VERSION(val); 947 948 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR); 949 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR); 950 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB); 951 952 if (version > NETXEN_VERSION_CODE(major, minor, build)) 953 return 1; 954 955 if (version == NETXEN_VERSION_CODE(major, minor, build) && 956 adapter->fw_type != NX_UNIFIED_ROMIMAGE) { 957 958 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL); 959 fw_type = (val & 0x4) ? 960 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE; 961 962 if (adapter->fw_type != fw_type) 963 return 1; 964 } 965 } 966 967 return 0; 968} 969 970static char *fw_name[] = { 971 NX_P2_MN_ROMIMAGE_NAME, 972 NX_P3_CT_ROMIMAGE_NAME, 973 NX_P3_MN_ROMIMAGE_NAME, 974 NX_UNIFIED_ROMIMAGE_NAME, 975 NX_FLASH_ROMIMAGE_NAME, 976}; 977 978int 979netxen_load_firmware(struct netxen_adapter *adapter) 980{ 981 u64 *ptr64; 982 u32 i, flashaddr, size; 983 const struct firmware *fw = adapter->fw; 984 struct pci_dev *pdev = adapter->pdev; 985 986 dev_info(&pdev->dev, "loading firmware from %s\n", 987 fw_name[adapter->fw_type]); 988 989 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 990 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1); 991 992 if (fw) { 993 __le64 data; 994 995 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 996 997 ptr64 = (u64 *)nx_get_bootld_offs(adapter); 998 flashaddr = NETXEN_BOOTLD_START; 999 1000 for (i = 0; i < size; i++) { 1001 data = cpu_to_le64(ptr64[i]); 1002 1003 if (adapter->pci_mem_write(adapter, flashaddr, data)) 1004 return -EIO; 1005 1006 flashaddr += 8; 1007 } 1008 1009 size = (__force u32)nx_get_fw_size(adapter) / 8; 1010 1011 ptr64 = (u64 *)nx_get_fw_offs(adapter); 1012 flashaddr = NETXEN_IMAGE_START; 1013 1014 for (i = 0; i < size; i++) { 1015 data = cpu_to_le64(ptr64[i]); 1016 1017 if (adapter->pci_mem_write(adapter, 1018 flashaddr, data)) 1019 return -EIO; 1020 1021 flashaddr += 8; 1022 } 1023 1024 size = (__force u32)nx_get_fw_size(adapter) % 8; 1025 if (size) { 1026 data = cpu_to_le64(ptr64[i]); 1027 1028 if (adapter->pci_mem_write(adapter, 1029 flashaddr, data)) 1030 return -EIO; 1031 } 1032 1033 } else { 1034 u64 data; 1035 u32 hi, lo; 1036 1037 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8; 1038 flashaddr = NETXEN_BOOTLD_START; 1039 1040 for (i = 0; i < size; i++) { 1041 if (netxen_rom_fast_read(adapter, 1042 flashaddr, (int *)&lo) != 0) 1043 return -EIO; 1044 if (netxen_rom_fast_read(adapter, 1045 flashaddr + 4, (int *)&hi) != 0) 1046 return -EIO; 1047 1048 /* hi, lo are already in host endian byteorder */ 1049 data = (((u64)hi << 32) | lo); 1050 1051 if (adapter->pci_mem_write(adapter, 1052 flashaddr, data)) 1053 return -EIO; 1054 1055 flashaddr += 8; 1056 } 1057 } 1058 msleep(1); 1059 1060 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) { 1061 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020); 1062 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e); 1063 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1064 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d); 1065 else { 1066 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff); 1067 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0); 1068 } 1069 1070 return 0; 1071} 1072 1073static int 1074netxen_validate_firmware(struct netxen_adapter *adapter) 1075{ 1076 __le32 val; 1077 u32 ver, min_ver, bios; 1078 struct pci_dev *pdev = adapter->pdev; 1079 const struct firmware *fw = adapter->fw; 1080 u8 fw_type = adapter->fw_type; 1081 1082 if (fw_type == NX_UNIFIED_ROMIMAGE) { 1083 if (netxen_nic_validate_unified_romimage(adapter)) 1084 return -EINVAL; 1085 } else { 1086 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]); 1087 if ((__force u32)val != NETXEN_BDINFO_MAGIC) 1088 return -EINVAL; 1089 1090 if (fw->size < NX_FW_MIN_SIZE) 1091 return -EINVAL; 1092 } 1093 1094 val = nx_get_fw_version(adapter); 1095 1096 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) 1097 min_ver = NETXEN_VERSION_CODE(4, 0, 216); 1098 else 1099 min_ver = NETXEN_VERSION_CODE(3, 4, 216); 1100 1101 ver = NETXEN_DECODE_VERSION(val); 1102 1103 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) { 1104 dev_err(&pdev->dev, 1105 "%s: firmware version %d.%d.%d unsupported\n", 1106 fw_name[fw_type], _major(ver), _minor(ver), _build(ver)); 1107 return -EINVAL; 1108 } 1109 1110 val = nx_get_bios_version(adapter); 1111 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios); 1112 if ((__force u32)val != bios) { 1113 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", 1114 fw_name[fw_type]); 1115 return -EINVAL; 1116 } 1117 1118 /* check if flashed firmware is newer */ 1119 if (netxen_rom_fast_read(adapter, 1120 NX_FW_VERSION_OFFSET, (int *)&val)) 1121 return -EIO; 1122 val = NETXEN_DECODE_VERSION(val); 1123 if (val > ver) { 1124 dev_info(&pdev->dev, "%s: firmware is older than flash\n", 1125 fw_name[fw_type]); 1126 return -EINVAL; 1127 } 1128 1129 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); 1130 return 0; 1131} 1132 1133static void 1134nx_get_next_fwtype(struct netxen_adapter *adapter) 1135{ 1136 u8 fw_type; 1137 1138 switch (adapter->fw_type) { 1139 case NX_UNKNOWN_ROMIMAGE: 1140 fw_type = NX_UNIFIED_ROMIMAGE; 1141 break; 1142 1143 case NX_UNIFIED_ROMIMAGE: 1144 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) 1145 fw_type = NX_FLASH_ROMIMAGE; 1146 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1147 fw_type = NX_P2_MN_ROMIMAGE; 1148 else if (netxen_p3_has_mn(adapter)) 1149 fw_type = NX_P3_MN_ROMIMAGE; 1150 else 1151 fw_type = NX_P3_CT_ROMIMAGE; 1152 break; 1153 1154 case NX_P3_MN_ROMIMAGE: 1155 fw_type = NX_P3_CT_ROMIMAGE; 1156 break; 1157 1158 case NX_P2_MN_ROMIMAGE: 1159 case NX_P3_CT_ROMIMAGE: 1160 default: 1161 fw_type = NX_FLASH_ROMIMAGE; 1162 break; 1163 } 1164 1165 adapter->fw_type = fw_type; 1166} 1167 1168static int 1169netxen_p3_has_mn(struct netxen_adapter *adapter) 1170{ 1171 u32 capability, flashed_ver; 1172 capability = 0; 1173 1174 /* NX2031 always had MN */ 1175 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1176 return 1; 1177 1178 netxen_rom_fast_read(adapter, 1179 NX_FW_VERSION_OFFSET, (int *)&flashed_ver); 1180 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver); 1181 1182 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) { 1183 1184 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY); 1185 if (capability & NX_PEG_TUNE_MN_PRESENT) 1186 return 1; 1187 } 1188 return 0; 1189} 1190 1191void netxen_request_firmware(struct netxen_adapter *adapter) 1192{ 1193 struct pci_dev *pdev = adapter->pdev; 1194 int rc = 0; 1195 1196 adapter->fw_type = NX_UNKNOWN_ROMIMAGE; 1197 1198next: 1199 nx_get_next_fwtype(adapter); 1200 1201 if (adapter->fw_type == NX_FLASH_ROMIMAGE) { 1202 adapter->fw = NULL; 1203 } else { 1204 rc = request_firmware(&adapter->fw, 1205 fw_name[adapter->fw_type], &pdev->dev); 1206 if (rc != 0) 1207 goto next; 1208 1209 rc = netxen_validate_firmware(adapter); 1210 if (rc != 0) { 1211 release_firmware(adapter->fw); 1212 msleep(1); 1213 goto next; 1214 } 1215 } 1216} 1217 1218 1219void 1220netxen_release_firmware(struct netxen_adapter *adapter) 1221{ 1222 if (adapter->fw) 1223 release_firmware(adapter->fw); 1224 adapter->fw = NULL; 1225} 1226 1227int netxen_init_dummy_dma(struct netxen_adapter *adapter) 1228{ 1229 u64 addr; 1230 u32 hi, lo; 1231 1232 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1233 return 0; 1234 1235 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev, 1236 NETXEN_HOST_DUMMY_DMA_SIZE, 1237 &adapter->dummy_dma.phys_addr); 1238 if (adapter->dummy_dma.addr == NULL) { 1239 dev_err(&adapter->pdev->dev, 1240 "ERROR: Could not allocate dummy DMA memory\n"); 1241 return -ENOMEM; 1242 } 1243 1244 addr = (uint64_t) adapter->dummy_dma.phys_addr; 1245 hi = (addr >> 32) & 0xffffffff; 1246 lo = addr & 0xffffffff; 1247 1248 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi); 1249 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo); 1250 1251 return 0; 1252} 1253 1254/* 1255 * NetXen DMA watchdog control: 1256 * 1257 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive 1258 * Bit 1 : disable_request => 1 req disable dma watchdog 1259 * Bit 2 : enable_request => 1 req enable dma watchdog 1260 * Bit 3-31 : unused 1261 */ 1262void netxen_free_dummy_dma(struct netxen_adapter *adapter) 1263{ 1264 int i = 100; 1265 u32 ctrl; 1266 1267 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1268 return; 1269 1270 if (!adapter->dummy_dma.addr) 1271 return; 1272 1273 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1274 if ((ctrl & 0x1) != 0) { 1275 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2)); 1276 1277 while ((ctrl & 0x1) != 0) { 1278 1279 msleep(50); 1280 1281 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL); 1282 1283 if (--i == 0) 1284 break; 1285 }; 1286 } 1287 1288 if (i) { 1289 pci_free_consistent(adapter->pdev, 1290 NETXEN_HOST_DUMMY_DMA_SIZE, 1291 adapter->dummy_dma.addr, 1292 adapter->dummy_dma.phys_addr); 1293 adapter->dummy_dma.addr = NULL; 1294 } else 1295 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n"); 1296} 1297 1298int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) 1299{ 1300 u32 val = 0; 1301 int retries = 60; 1302 1303 if (pegtune_val) 1304 return 0; 1305 1306 do { 1307 val = NXRD32(adapter, CRB_CMDPEG_STATE); 1308 1309 switch (val) { 1310 case PHAN_INITIALIZE_COMPLETE: 1311 case PHAN_INITIALIZE_ACK: 1312 return 0; 1313 case PHAN_INITIALIZE_FAILED: 1314 goto out_err; 1315 default: 1316 break; 1317 } 1318 1319 msleep(500); 1320 1321 } while (--retries); 1322 1323 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); 1324 1325out_err: 1326 dev_warn(&adapter->pdev->dev, "firmware init failed\n"); 1327 return -EIO; 1328} 1329 1330static int 1331netxen_receive_peg_ready(struct netxen_adapter *adapter) 1332{ 1333 u32 val = 0; 1334 int retries = 2000; 1335 1336 do { 1337 val = NXRD32(adapter, CRB_RCVPEG_STATE); 1338 1339 if (val == PHAN_PEG_RCV_INITIALIZED) 1340 return 0; 1341 1342 msleep(10); 1343 1344 } while (--retries); 1345 1346 if (!retries) { 1347 printk(KERN_ERR "Receive Peg initialization not " 1348 "complete, state: 0x%x.\n", val); 1349 return -EIO; 1350 } 1351 1352 return 0; 1353} 1354 1355int netxen_init_firmware(struct netxen_adapter *adapter) 1356{ 1357 int err; 1358 1359 err = netxen_receive_peg_ready(adapter); 1360 if (err) 1361 return err; 1362 1363 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT); 1364 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE); 1365 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK); 1366 1367 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) 1368 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC); 1369 1370 return err; 1371} 1372 1373static void 1374netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg) 1375{ 1376 u32 cable_OUI; 1377 u16 cable_len; 1378 u16 link_speed; 1379 u8 link_status, module, duplex, autoneg; 1380 struct net_device *netdev = adapter->netdev; 1381 1382 adapter->has_link_events = 1; 1383 1384 cable_OUI = msg->body[1] & 0xffffffff; 1385 cable_len = (msg->body[1] >> 32) & 0xffff; 1386 link_speed = (msg->body[1] >> 48) & 0xffff; 1387 1388 link_status = msg->body[2] & 0xff; 1389 duplex = (msg->body[2] >> 16) & 0xff; 1390 autoneg = (msg->body[2] >> 24) & 0xff; 1391 1392 module = (msg->body[2] >> 8) & 0xff; 1393 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) { 1394 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n", 1395 netdev->name, cable_OUI, cable_len); 1396 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) { 1397 printk(KERN_INFO "%s: unsupported cable length %d\n", 1398 netdev->name, cable_len); 1399 } 1400 1401 netxen_advert_link_change(adapter, link_status); 1402 1403 /* update link parameters */ 1404 if (duplex == LINKEVENT_FULL_DUPLEX) 1405 adapter->link_duplex = DUPLEX_FULL; 1406 else 1407 adapter->link_duplex = DUPLEX_HALF; 1408 adapter->module_type = module; 1409 adapter->link_autoneg = autoneg; 1410 adapter->link_speed = link_speed; 1411} 1412 1413static void 1414netxen_handle_fw_message(int desc_cnt, int index, 1415 struct nx_host_sds_ring *sds_ring) 1416{ 1417 nx_fw_msg_t msg; 1418 struct status_desc *desc; 1419 int i = 0, opcode; 1420 1421 while (desc_cnt > 0 && i < 8) { 1422 desc = &sds_ring->desc_head[index]; 1423 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]); 1424 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]); 1425 1426 index = get_next_index(index, sds_ring->num_desc); 1427 desc_cnt--; 1428 } 1429 1430 opcode = netxen_get_nic_msg_opcode(msg.body[0]); 1431 switch (opcode) { 1432 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE: 1433 netxen_handle_linkevent(sds_ring->adapter, &msg); 1434 break; 1435 default: 1436 break; 1437 } 1438} 1439 1440static int 1441netxen_alloc_rx_skb(struct netxen_adapter *adapter, 1442 struct nx_host_rds_ring *rds_ring, 1443 struct netxen_rx_buffer *buffer) 1444{ 1445 struct sk_buff *skb; 1446 dma_addr_t dma; 1447 struct pci_dev *pdev = adapter->pdev; 1448 1449 buffer->skb = dev_alloc_skb(rds_ring->skb_size); 1450 if (!buffer->skb) 1451 return 1; 1452 1453 skb = buffer->skb; 1454 1455 if (!adapter->ahw.cut_through) 1456 skb_reserve(skb, 2); 1457 1458 dma = pci_map_single(pdev, skb->data, 1459 rds_ring->dma_size, PCI_DMA_FROMDEVICE); 1460 1461 if (pci_dma_mapping_error(pdev, dma)) { 1462 dev_kfree_skb_any(skb); 1463 buffer->skb = NULL; 1464 return 1; 1465 } 1466 1467 buffer->skb = skb; 1468 buffer->dma = dma; 1469 buffer->state = NETXEN_BUFFER_BUSY; 1470 1471 return 0; 1472} 1473 1474static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter, 1475 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum) 1476{ 1477 struct netxen_rx_buffer *buffer; 1478 struct sk_buff *skb; 1479 1480 buffer = &rds_ring->rx_buf_arr[index]; 1481 1482 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size, 1483 PCI_DMA_FROMDEVICE); 1484 1485 skb = buffer->skb; 1486 if (!skb) 1487 goto no_skb; 1488 1489 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) { 1490 adapter->stats.csummed++; 1491 skb->ip_summed = CHECKSUM_UNNECESSARY; 1492 } else 1493 skb->ip_summed = CHECKSUM_NONE; 1494 1495 skb->dev = adapter->netdev; 1496 1497 buffer->skb = NULL; 1498no_skb: 1499 buffer->state = NETXEN_BUFFER_FREE; 1500 return skb; 1501} 1502 1503static struct netxen_rx_buffer * 1504netxen_process_rcv(struct netxen_adapter *adapter, 1505 struct nx_host_sds_ring *sds_ring, 1506 int ring, u64 sts_data0) 1507{ 1508 struct net_device *netdev = adapter->netdev; 1509 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1510 struct netxen_rx_buffer *buffer; 1511 struct sk_buff *skb; 1512 struct nx_host_rds_ring *rds_ring; 1513 int index, length, cksum, pkt_offset; 1514 1515 if (unlikely(ring >= adapter->max_rds_rings)) 1516 return NULL; 1517 1518 rds_ring = &recv_ctx->rds_rings[ring]; 1519 1520 index = netxen_get_sts_refhandle(sts_data0); 1521 if (unlikely(index >= rds_ring->num_desc)) 1522 return NULL; 1523 1524 buffer = &rds_ring->rx_buf_arr[index]; 1525 1526 length = netxen_get_sts_totallength(sts_data0); 1527 cksum = netxen_get_sts_status(sts_data0); 1528 pkt_offset = netxen_get_sts_pkt_offset(sts_data0); 1529 1530 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum); 1531 if (!skb) 1532 return buffer; 1533 1534 if (length > rds_ring->skb_size) 1535 skb_put(skb, rds_ring->skb_size); 1536 else 1537 skb_put(skb, length); 1538 1539 1540 if (pkt_offset) 1541 skb_pull(skb, pkt_offset); 1542 1543 skb->protocol = eth_type_trans(skb, netdev); 1544 1545 napi_gro_receive(&sds_ring->napi, skb); 1546 1547 adapter->stats.rx_pkts++; 1548 adapter->stats.rxbytes += length; 1549 1550 return buffer; 1551} 1552 1553#define TCP_HDR_SIZE 20 1554#define TCP_TS_OPTION_SIZE 12 1555#define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE) 1556 1557static struct netxen_rx_buffer * 1558netxen_process_lro(struct netxen_adapter *adapter, 1559 struct nx_host_sds_ring *sds_ring, 1560 int ring, u64 sts_data0, u64 sts_data1) 1561{ 1562 struct net_device *netdev = adapter->netdev; 1563 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; 1564 struct netxen_rx_buffer *buffer; 1565 struct sk_buff *skb; 1566 struct nx_host_rds_ring *rds_ring; 1567 struct iphdr *iph; 1568 struct tcphdr *th; 1569 bool push, timestamp; 1570 int l2_hdr_offset, l4_hdr_offset; 1571 int index; 1572 u16 lro_length, length, data_offset; 1573 u32 seq_number; 1574 1575 if (unlikely(ring > adapter->max_rds_rings)) 1576 return NULL; 1577 1578 rds_ring = &recv_ctx->rds_rings[ring]; 1579 1580 index = netxen_get_lro_sts_refhandle(sts_data0); 1581 if (unlikely(index > rds_ring->num_desc)) 1582 return NULL; 1583 1584 buffer = &rds_ring->rx_buf_arr[index]; 1585 1586 timestamp = netxen_get_lro_sts_timestamp(sts_data0); 1587 lro_length = netxen_get_lro_sts_length(sts_data0); 1588 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0); 1589 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0); 1590 push = netxen_get_lro_sts_push_flag(sts_data0); 1591 seq_number = netxen_get_lro_sts_seq_number(sts_data1); 1592 1593 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK); 1594 if (!skb) 1595 return buffer; 1596 1597 if (timestamp) 1598 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE; 1599 else 1600 data_offset = l4_hdr_offset + TCP_HDR_SIZE; 1601 1602 skb_put(skb, lro_length + data_offset); 1603 1604 skb_pull(skb, l2_hdr_offset); 1605 skb->protocol = eth_type_trans(skb, netdev); 1606 1607 iph = (struct iphdr *)skb->data; 1608 th = (struct tcphdr *)(skb->data + (iph->ihl << 2)); 1609 1610 length = (iph->ihl << 2) + (th->doff << 2) + lro_length; 1611 iph->tot_len = htons(length); 1612 iph->check = 0; 1613 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl); 1614 th->psh = push; 1615 th->seq = htonl(seq_number); 1616 1617 length = skb->len; 1618 1619 netif_receive_skb(skb); 1620 1621 adapter->stats.lro_pkts++; 1622 adapter->stats.rxbytes += length; 1623 1624 return buffer; 1625} 1626 1627#define netxen_merge_rx_buffers(list, head) \ 1628 do { list_splice_tail_init(list, head); } while (0); 1629 1630int 1631netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max) 1632{ 1633 struct netxen_adapter *adapter = sds_ring->adapter; 1634 1635 struct list_head *cur; 1636 1637 struct status_desc *desc; 1638 struct netxen_rx_buffer *rxbuf; 1639 1640 u32 consumer = sds_ring->consumer; 1641 1642 int count = 0; 1643 u64 sts_data0, sts_data1; 1644 int opcode, ring = 0, desc_cnt; 1645 1646 while (count < max) { 1647 desc = &sds_ring->desc_head[consumer]; 1648 sts_data0 = le64_to_cpu(desc->status_desc_data[0]); 1649 1650 if (!(sts_data0 & STATUS_OWNER_HOST)) 1651 break; 1652 1653 desc_cnt = netxen_get_sts_desc_cnt(sts_data0); 1654 1655 opcode = netxen_get_sts_opcode(sts_data0); 1656 1657 switch (opcode) { 1658 case NETXEN_NIC_RXPKT_DESC: 1659 case NETXEN_OLD_RXPKT_DESC: 1660 case NETXEN_NIC_SYN_OFFLOAD: 1661 ring = netxen_get_sts_type(sts_data0); 1662 rxbuf = netxen_process_rcv(adapter, sds_ring, 1663 ring, sts_data0); 1664 break; 1665 case NETXEN_NIC_LRO_DESC: 1666 ring = netxen_get_lro_sts_type(sts_data0); 1667 sts_data1 = le64_to_cpu(desc->status_desc_data[1]); 1668 rxbuf = netxen_process_lro(adapter, sds_ring, 1669 ring, sts_data0, sts_data1); 1670 break; 1671 case NETXEN_NIC_RESPONSE_DESC: 1672 netxen_handle_fw_message(desc_cnt, consumer, sds_ring); 1673 default: 1674 goto skip; 1675 } 1676 1677 WARN_ON(desc_cnt > 1); 1678 1679 if (rxbuf) 1680 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]); 1681 1682skip: 1683 for (; desc_cnt > 0; desc_cnt--) { 1684 desc = &sds_ring->desc_head[consumer]; 1685 desc->status_desc_data[0] = 1686 cpu_to_le64(STATUS_OWNER_PHANTOM); 1687 consumer = get_next_index(consumer, sds_ring->num_desc); 1688 } 1689 count++; 1690 } 1691 1692 for (ring = 0; ring < adapter->max_rds_rings; ring++) { 1693 struct nx_host_rds_ring *rds_ring = 1694 &adapter->recv_ctx.rds_rings[ring]; 1695 1696 if (!list_empty(&sds_ring->free_list[ring])) { 1697 list_for_each(cur, &sds_ring->free_list[ring]) { 1698 rxbuf = list_entry(cur, 1699 struct netxen_rx_buffer, list); 1700 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf); 1701 } 1702 spin_lock(&rds_ring->lock); 1703 netxen_merge_rx_buffers(&sds_ring->free_list[ring], 1704 &rds_ring->free_list); 1705 spin_unlock(&rds_ring->lock); 1706 } 1707 1708 netxen_post_rx_buffers_nodb(adapter, rds_ring); 1709 } 1710 1711 if (count) { 1712 sds_ring->consumer = consumer; 1713 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer); 1714 } 1715 1716 return count; 1717} 1718 1719/* Process Command status ring */ 1720int netxen_process_cmd_ring(struct netxen_adapter *adapter) 1721{ 1722 u32 sw_consumer, hw_consumer; 1723 int count = 0, i; 1724 struct netxen_cmd_buffer *buffer; 1725 struct pci_dev *pdev = adapter->pdev; 1726 struct net_device *netdev = adapter->netdev; 1727 struct netxen_skb_frag *frag; 1728 int done = 0; 1729 struct nx_host_tx_ring *tx_ring = adapter->tx_ring; 1730 1731 if (!spin_trylock(&adapter->tx_clean_lock)) 1732 return 1; 1733 1734 sw_consumer = tx_ring->sw_consumer; 1735 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1736 1737 while (sw_consumer != hw_consumer) { 1738 buffer = &tx_ring->cmd_buf_arr[sw_consumer]; 1739 if (buffer->skb) { 1740 frag = &buffer->frag_array[0]; 1741 pci_unmap_single(pdev, frag->dma, frag->length, 1742 PCI_DMA_TODEVICE); 1743 frag->dma = 0ULL; 1744 for (i = 1; i < buffer->frag_count; i++) { 1745 frag++; /* Get the next frag */ 1746 pci_unmap_page(pdev, frag->dma, frag->length, 1747 PCI_DMA_TODEVICE); 1748 frag->dma = 0ULL; 1749 } 1750 1751 adapter->stats.xmitfinished++; 1752 dev_kfree_skb_any(buffer->skb); 1753 buffer->skb = NULL; 1754 } 1755 1756 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc); 1757 if (++count >= MAX_STATUS_HANDLE) 1758 break; 1759 } 1760 1761 if (count && netif_running(netdev)) { 1762 tx_ring->sw_consumer = sw_consumer; 1763 1764 smp_mb(); 1765 1766 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) { 1767 __netif_tx_lock(tx_ring->txq, smp_processor_id()); 1768 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH) { 1769 netif_wake_queue(netdev); 1770 adapter->tx_timeo_cnt = 0; 1771 } 1772 __netif_tx_unlock(tx_ring->txq); 1773 } 1774 } 1775 /* 1776 * If everything is freed up to consumer then check if the ring is full 1777 * If the ring is full then check if more needs to be freed and 1778 * schedule the call back again. 1779 * 1780 * This happens when there are 2 CPUs. One could be freeing and the 1781 * other filling it. If the ring is full when we get out of here and 1782 * the card has already interrupted the host then the host can miss the 1783 * interrupt. 1784 * 1785 * There is still a possible race condition and the host could miss an 1786 * interrupt. The card has to take care of this. 1787 */ 1788 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer)); 1789 done = (sw_consumer == hw_consumer); 1790 spin_unlock(&adapter->tx_clean_lock); 1791 1792 return (done); 1793} 1794 1795void 1796netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid, 1797 struct nx_host_rds_ring *rds_ring) 1798{ 1799 struct rcv_desc *pdesc; 1800 struct netxen_rx_buffer *buffer; 1801 int producer, count = 0; 1802 netxen_ctx_msg msg = 0; 1803 struct list_head *head; 1804 1805 producer = rds_ring->producer; 1806 1807 head = &rds_ring->free_list; 1808 while (!list_empty(head)) { 1809 1810 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1811 1812 if (!buffer->skb) { 1813 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1814 break; 1815 } 1816 1817 count++; 1818 list_del(&buffer->list); 1819 1820 /* make a rcv descriptor */ 1821 pdesc = &rds_ring->desc_head[producer]; 1822 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1823 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1824 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1825 1826 producer = get_next_index(producer, rds_ring->num_desc); 1827 } 1828 1829 if (count) { 1830 rds_ring->producer = producer; 1831 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1832 (producer-1) & (rds_ring->num_desc-1)); 1833 1834 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 1835 /* 1836 * Write a doorbell msg to tell phanmon of change in 1837 * receive ring producer 1838 * Only for firmware version < 4.0.0 1839 */ 1840 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID); 1841 netxen_set_msg_privid(msg); 1842 netxen_set_msg_count(msg, 1843 ((producer - 1) & 1844 (rds_ring->num_desc - 1))); 1845 netxen_set_msg_ctxid(msg, adapter->portnum); 1846 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid)); 1847 NXWRIO(adapter, DB_NORMALIZE(adapter, 1848 NETXEN_RCV_PRODUCER_OFFSET), msg); 1849 } 1850 } 1851} 1852 1853static void 1854netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 1855 struct nx_host_rds_ring *rds_ring) 1856{ 1857 struct rcv_desc *pdesc; 1858 struct netxen_rx_buffer *buffer; 1859 int producer, count = 0; 1860 struct list_head *head; 1861 1862 if (!spin_trylock(&rds_ring->lock)) 1863 return; 1864 1865 producer = rds_ring->producer; 1866 1867 head = &rds_ring->free_list; 1868 while (!list_empty(head)) { 1869 1870 buffer = list_entry(head->next, struct netxen_rx_buffer, list); 1871 1872 if (!buffer->skb) { 1873 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer)) 1874 break; 1875 } 1876 1877 count++; 1878 list_del(&buffer->list); 1879 1880 /* make a rcv descriptor */ 1881 pdesc = &rds_ring->desc_head[producer]; 1882 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1883 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); 1884 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1885 1886 producer = get_next_index(producer, rds_ring->num_desc); 1887 } 1888 1889 if (count) { 1890 rds_ring->producer = producer; 1891 NXWRIO(adapter, rds_ring->crb_rcv_producer, 1892 (producer - 1) & (rds_ring->num_desc - 1)); 1893 } 1894 spin_unlock(&rds_ring->lock); 1895} 1896 1897void netxen_nic_clear_stats(struct netxen_adapter *adapter) 1898{ 1899 memset(&adapter->stats, 0, sizeof(adapter->stats)); 1900} 1901