1/* drivers/net/ks8851.c 2 * 3 * Copyright 2009 Simtec Electronics 4 * http://www.simtec.co.uk/ 5 * Ben Dooks <ben@simtec.co.uk> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 13 14#define DEBUG 15 16#include <linux/module.h> 17#include <linux/kernel.h> 18#include <linux/netdevice.h> 19#include <linux/etherdevice.h> 20#include <linux/ethtool.h> 21#include <linux/cache.h> 22#include <linux/crc32.h> 23#include <linux/mii.h> 24 25#include <linux/spi/spi.h> 26 27#include "ks8851.h" 28 29/** 30 * struct ks8851_rxctrl - KS8851 driver rx control 31 * @mchash: Multicast hash-table data. 32 * @rxcr1: KS_RXCR1 register setting 33 * @rxcr2: KS_RXCR2 register setting 34 * 35 * Representation of the settings needs to control the receive filtering 36 * such as the multicast hash-filter and the receive register settings. This 37 * is used to make the job of working out if the receive settings change and 38 * then issuing the new settings to the worker that will send the necessary 39 * commands. 40 */ 41struct ks8851_rxctrl { 42 u16 mchash[4]; 43 u16 rxcr1; 44 u16 rxcr2; 45}; 46 47/** 48 * union ks8851_tx_hdr - tx header data 49 * @txb: The header as bytes 50 * @txw: The header as 16bit, little-endian words 51 * 52 * A dual representation of the tx header data to allow 53 * access to individual bytes, and to allow 16bit accesses 54 * with 16bit alignment. 55 */ 56union ks8851_tx_hdr { 57 u8 txb[6]; 58 __le16 txw[3]; 59}; 60 61/** 62 * struct ks8851_net - KS8851 driver private data 63 * @netdev: The network device we're bound to 64 * @spidev: The spi device we're bound to. 65 * @lock: Lock to ensure that the device is not accessed when busy. 66 * @statelock: Lock on this structure for tx list. 67 * @mii: The MII state information for the mii calls. 68 * @rxctrl: RX settings for @rxctrl_work. 69 * @tx_work: Work queue for tx packets 70 * @irq_work: Work queue for servicing interrupts 71 * @rxctrl_work: Work queue for updating RX mode and multicast lists 72 * @txq: Queue of packets for transmission. 73 * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1. 74 * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2. 75 * @txh: Space for generating packet TX header in DMA-able data 76 * @rxd: Space for receiving SPI data, in DMA-able space. 77 * @txd: Space for transmitting SPI data, in DMA-able space. 78 * @msg_enable: The message flags controlling driver output (see ethtool). 79 * @fid: Incrementing frame id tag. 80 * @rc_ier: Cached copy of KS_IER. 81 * @rc_ccr: Cached copy of KS_CCR. 82 * @rc_rxqcr: Cached copy of KS_RXQCR. 83 * @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom 84 * 85 * The @lock ensures that the chip is protected when certain operations are 86 * in progress. When the read or write packet transfer is in progress, most 87 * of the chip registers are not ccessible until the transfer is finished and 88 * the DMA has been de-asserted. 89 * 90 * The @statelock is used to protect information in the structure which may 91 * need to be accessed via several sources, such as the network driver layer 92 * or one of the work queues. 93 * 94 * We align the buffers we may use for rx/tx to ensure that if the SPI driver 95 * wants to DMA map them, it will not have any problems with data the driver 96 * modifies. 97 */ 98struct ks8851_net { 99 struct net_device *netdev; 100 struct spi_device *spidev; 101 struct mutex lock; 102 spinlock_t statelock; 103 104 union ks8851_tx_hdr txh ____cacheline_aligned; 105 u8 rxd[8]; 106 u8 txd[8]; 107 108 u32 msg_enable ____cacheline_aligned; 109 u16 tx_space; 110 u8 fid; 111 112 u16 rc_ier; 113 u16 rc_rxqcr; 114 u16 rc_ccr; 115 u16 eeprom_size; 116 117 struct mii_if_info mii; 118 struct ks8851_rxctrl rxctrl; 119 120 struct work_struct tx_work; 121 struct work_struct irq_work; 122 struct work_struct rxctrl_work; 123 124 struct sk_buff_head txq; 125 126 struct spi_message spi_msg1; 127 struct spi_message spi_msg2; 128 struct spi_transfer spi_xfer1; 129 struct spi_transfer spi_xfer2[2]; 130}; 131 132static int msg_enable; 133 134/* shift for byte-enable data */ 135#define BYTE_EN(_x) ((_x) << 2) 136 137/* turn register number and byte-enable mask into data for start of packet */ 138#define MK_OP(_byteen, _reg) (BYTE_EN(_byteen) | (_reg) << (8+2) | (_reg) >> 6) 139 140/* SPI register read/write calls. 141 * 142 * All these calls issue SPI transactions to access the chip's registers. They 143 * all require that the necessary lock is held to prevent accesses when the 144 * chip is busy transfering packet data (RX/TX FIFO accesses). 145 */ 146 147/** 148 * ks8851_wrreg16 - write 16bit register value to chip 149 * @ks: The chip state 150 * @reg: The register address 151 * @val: The value to write 152 * 153 * Issue a write to put the value @val into the register specified in @reg. 154 */ 155static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val) 156{ 157 struct spi_transfer *xfer = &ks->spi_xfer1; 158 struct spi_message *msg = &ks->spi_msg1; 159 __le16 txb[2]; 160 int ret; 161 162 txb[0] = cpu_to_le16(MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR); 163 txb[1] = cpu_to_le16(val); 164 165 xfer->tx_buf = txb; 166 xfer->rx_buf = NULL; 167 xfer->len = 4; 168 169 ret = spi_sync(ks->spidev, msg); 170 if (ret < 0) 171 netdev_err(ks->netdev, "spi_sync() failed\n"); 172} 173 174/** 175 * ks8851_wrreg8 - write 8bit register value to chip 176 * @ks: The chip state 177 * @reg: The register address 178 * @val: The value to write 179 * 180 * Issue a write to put the value @val into the register specified in @reg. 181 */ 182static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val) 183{ 184 struct spi_transfer *xfer = &ks->spi_xfer1; 185 struct spi_message *msg = &ks->spi_msg1; 186 __le16 txb[2]; 187 int ret; 188 int bit; 189 190 bit = 1 << (reg & 3); 191 192 txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR); 193 txb[1] = val; 194 195 xfer->tx_buf = txb; 196 xfer->rx_buf = NULL; 197 xfer->len = 3; 198 199 ret = spi_sync(ks->spidev, msg); 200 if (ret < 0) 201 netdev_err(ks->netdev, "spi_sync() failed\n"); 202} 203 204/** 205 * ks8851_rx_1msg - select whether to use one or two messages for spi read 206 * @ks: The device structure 207 * 208 * Return whether to generate a single message with a tx and rx buffer 209 * supplied to spi_sync(), or alternatively send the tx and rx buffers 210 * as separate messages. 211 * 212 * Depending on the hardware in use, a single message may be more efficient 213 * on interrupts or work done by the driver. 214 * 215 * This currently always returns true until we add some per-device data passed 216 * from the platform code to specify which mode is better. 217 */ 218static inline bool ks8851_rx_1msg(struct ks8851_net *ks) 219{ 220 return true; 221} 222 223/** 224 * ks8851_rdreg - issue read register command and return the data 225 * @ks: The device state 226 * @op: The register address and byte enables in message format. 227 * @rxb: The RX buffer to return the result into 228 * @rxl: The length of data expected. 229 * 230 * This is the low level read call that issues the necessary spi message(s) 231 * to read data from the register specified in @op. 232 */ 233static void ks8851_rdreg(struct ks8851_net *ks, unsigned op, 234 u8 *rxb, unsigned rxl) 235{ 236 struct spi_transfer *xfer; 237 struct spi_message *msg; 238 __le16 *txb = (__le16 *)ks->txd; 239 u8 *trx = ks->rxd; 240 int ret; 241 242 txb[0] = cpu_to_le16(op | KS_SPIOP_RD); 243 244 if (ks8851_rx_1msg(ks)) { 245 msg = &ks->spi_msg1; 246 xfer = &ks->spi_xfer1; 247 248 xfer->tx_buf = txb; 249 xfer->rx_buf = trx; 250 xfer->len = rxl + 2; 251 } else { 252 msg = &ks->spi_msg2; 253 xfer = ks->spi_xfer2; 254 255 xfer->tx_buf = txb; 256 xfer->rx_buf = NULL; 257 xfer->len = 2; 258 259 xfer++; 260 xfer->tx_buf = NULL; 261 xfer->rx_buf = trx; 262 xfer->len = rxl; 263 } 264 265 ret = spi_sync(ks->spidev, msg); 266 if (ret < 0) 267 netdev_err(ks->netdev, "read: spi_sync() failed\n"); 268 else if (ks8851_rx_1msg(ks)) 269 memcpy(rxb, trx + 2, rxl); 270 else 271 memcpy(rxb, trx, rxl); 272} 273 274/** 275 * ks8851_rdreg8 - read 8 bit register from device 276 * @ks: The chip information 277 * @reg: The register address 278 * 279 * Read a 8bit register from the chip, returning the result 280*/ 281static unsigned ks8851_rdreg8(struct ks8851_net *ks, unsigned reg) 282{ 283 u8 rxb[1]; 284 285 ks8851_rdreg(ks, MK_OP(1 << (reg & 3), reg), rxb, 1); 286 return rxb[0]; 287} 288 289/** 290 * ks8851_rdreg16 - read 16 bit register from device 291 * @ks: The chip information 292 * @reg: The register address 293 * 294 * Read a 16bit register from the chip, returning the result 295*/ 296static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg) 297{ 298 __le16 rx = 0; 299 300 ks8851_rdreg(ks, MK_OP(reg & 2 ? 0xC : 0x3, reg), (u8 *)&rx, 2); 301 return le16_to_cpu(rx); 302} 303 304/** 305 * ks8851_rdreg32 - read 32 bit register from device 306 * @ks: The chip information 307 * @reg: The register address 308 * 309 * Read a 32bit register from the chip. 310 * 311 * Note, this read requires the address be aligned to 4 bytes. 312*/ 313static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg) 314{ 315 __le32 rx = 0; 316 317 WARN_ON(reg & 3); 318 319 ks8851_rdreg(ks, MK_OP(0xf, reg), (u8 *)&rx, 4); 320 return le32_to_cpu(rx); 321} 322 323/** 324 * ks8851_soft_reset - issue one of the soft reset to the device 325 * @ks: The device state. 326 * @op: The bit(s) to set in the GRR 327 * 328 * Issue the relevant soft-reset command to the device's GRR register 329 * specified by @op. 330 * 331 * Note, the delays are in there as a caution to ensure that the reset 332 * has time to take effect and then complete. Since the datasheet does 333 * not currently specify the exact sequence, we have chosen something 334 * that seems to work with our device. 335 */ 336static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op) 337{ 338 ks8851_wrreg16(ks, KS_GRR, op); 339 mdelay(1); /* wait a short time to effect reset */ 340 ks8851_wrreg16(ks, KS_GRR, 0); 341 mdelay(1); /* wait for condition to clear */ 342} 343 344/** 345 * ks8851_write_mac_addr - write mac address to device registers 346 * @dev: The network device 347 * 348 * Update the KS8851 MAC address registers from the address in @dev. 349 * 350 * This call assumes that the chip is not running, so there is no need to 351 * shutdown the RXQ process whilst setting this. 352*/ 353static int ks8851_write_mac_addr(struct net_device *dev) 354{ 355 struct ks8851_net *ks = netdev_priv(dev); 356 int i; 357 358 mutex_lock(&ks->lock); 359 360 for (i = 0; i < ETH_ALEN; i++) 361 ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]); 362 363 mutex_unlock(&ks->lock); 364 365 return 0; 366} 367 368/** 369 * ks8851_init_mac - initialise the mac address 370 * @ks: The device structure 371 * 372 * Get or create the initial mac address for the device and then set that 373 * into the station address register. Currently we assume that the device 374 * does not have a valid mac address in it, and so we use random_ether_addr() 375 * to create a new one. 376 * 377 * In future, the driver should check to see if the device has an EEPROM 378 * attached and whether that has a valid ethernet address in it. 379 */ 380static void ks8851_init_mac(struct ks8851_net *ks) 381{ 382 struct net_device *dev = ks->netdev; 383 384 random_ether_addr(dev->dev_addr); 385 ks8851_write_mac_addr(dev); 386} 387 388/** 389 * ks8851_irq - device interrupt handler 390 * @irq: Interrupt number passed from the IRQ hnalder. 391 * @pw: The private word passed to register_irq(), our struct ks8851_net. 392 * 393 * Disable the interrupt from happening again until we've processed the 394 * current status by scheduling ks8851_irq_work(). 395 */ 396static irqreturn_t ks8851_irq(int irq, void *pw) 397{ 398 struct ks8851_net *ks = pw; 399 400 disable_irq_nosync(irq); 401 schedule_work(&ks->irq_work); 402 return IRQ_HANDLED; 403} 404 405/** 406 * ks8851_rdfifo - read data from the receive fifo 407 * @ks: The device state. 408 * @buff: The buffer address 409 * @len: The length of the data to read 410 * 411 * Issue an RXQ FIFO read command and read the @len amount of data from 412 * the FIFO into the buffer specified by @buff. 413 */ 414static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len) 415{ 416 struct spi_transfer *xfer = ks->spi_xfer2; 417 struct spi_message *msg = &ks->spi_msg2; 418 u8 txb[1]; 419 int ret; 420 421 netif_dbg(ks, rx_status, ks->netdev, 422 "%s: %d@%p\n", __func__, len, buff); 423 424 /* set the operation we're issuing */ 425 txb[0] = KS_SPIOP_RXFIFO; 426 427 xfer->tx_buf = txb; 428 xfer->rx_buf = NULL; 429 xfer->len = 1; 430 431 xfer++; 432 xfer->rx_buf = buff; 433 xfer->tx_buf = NULL; 434 xfer->len = len; 435 436 ret = spi_sync(ks->spidev, msg); 437 if (ret < 0) 438 netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__); 439} 440 441/** 442 * ks8851_dbg_dumpkkt - dump initial packet contents to debug 443 * @ks: The device state 444 * @rxpkt: The data for the received packet 445 * 446 * Dump the initial data from the packet to dev_dbg(). 447*/ 448static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt) 449{ 450 netdev_dbg(ks->netdev, 451 "pkt %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n", 452 rxpkt[4], rxpkt[5], rxpkt[6], rxpkt[7], 453 rxpkt[8], rxpkt[9], rxpkt[10], rxpkt[11], 454 rxpkt[12], rxpkt[13], rxpkt[14], rxpkt[15]); 455} 456 457/** 458 * ks8851_rx_pkts - receive packets from the host 459 * @ks: The device information. 460 * 461 * This is called from the IRQ work queue when the system detects that there 462 * are packets in the receive queue. Find out how many packets there are and 463 * read them from the FIFO. 464 */ 465static void ks8851_rx_pkts(struct ks8851_net *ks) 466{ 467 struct sk_buff *skb; 468 unsigned rxfc; 469 unsigned rxlen; 470 unsigned rxstat; 471 u32 rxh; 472 u8 *rxpkt; 473 474 rxfc = ks8851_rdreg8(ks, KS_RXFC); 475 476 netif_dbg(ks, rx_status, ks->netdev, 477 "%s: %d packets\n", __func__, rxfc); 478 479 /* Currently we're issuing a read per packet, but we could possibly 480 * improve the code by issuing a single read, getting the receive 481 * header, allocating the packet and then reading the packet data 482 * out in one go. 483 * 484 * This form of operation would require us to hold the SPI bus' 485 * chipselect low during the entie transaction to avoid any 486 * reset to the data stream comming from the chip. 487 */ 488 489 for (; rxfc != 0; rxfc--) { 490 rxh = ks8851_rdreg32(ks, KS_RXFHSR); 491 rxstat = rxh & 0xffff; 492 rxlen = rxh >> 16; 493 494 netif_dbg(ks, rx_status, ks->netdev, 495 "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen); 496 497 /* the length of the packet includes the 32bit CRC */ 498 499 /* set dma read address */ 500 ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00); 501 502 /* start the packet dma process, and set auto-dequeue rx */ 503 ks8851_wrreg16(ks, KS_RXQCR, 504 ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE); 505 506 if (rxlen > 4) { 507 unsigned int rxalign; 508 509 rxlen -= 4; 510 rxalign = ALIGN(rxlen, 4); 511 skb = netdev_alloc_skb_ip_align(ks->netdev, rxalign); 512 if (skb) { 513 514 /* 4 bytes of status header + 4 bytes of 515 * garbage: we put them before ethernet 516 * header, so that they are copied, 517 * but ignored. 518 */ 519 520 rxpkt = skb_put(skb, rxlen) - 8; 521 522 ks8851_rdfifo(ks, rxpkt, rxalign + 8); 523 524 if (netif_msg_pktdata(ks)) 525 ks8851_dbg_dumpkkt(ks, rxpkt); 526 527 skb->protocol = eth_type_trans(skb, ks->netdev); 528 netif_rx(skb); 529 530 ks->netdev->stats.rx_packets++; 531 ks->netdev->stats.rx_bytes += rxlen; 532 } 533 } 534 535 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); 536 } 537} 538 539/** 540 * ks8851_irq_work - work queue handler for dealing with interrupt requests 541 * @work: The work structure that was scheduled by schedule_work() 542 * 543 * This is the handler invoked when the ks8851_irq() is called to find out 544 * what happened, as we cannot allow ourselves to sleep whilst waiting for 545 * anything other process has the chip's lock. 546 * 547 * Read the interrupt status, work out what needs to be done and then clear 548 * any of the interrupts that are not needed. 549 */ 550static void ks8851_irq_work(struct work_struct *work) 551{ 552 struct ks8851_net *ks = container_of(work, struct ks8851_net, irq_work); 553 unsigned status; 554 unsigned handled = 0; 555 556 mutex_lock(&ks->lock); 557 558 status = ks8851_rdreg16(ks, KS_ISR); 559 560 netif_dbg(ks, intr, ks->netdev, 561 "%s: status 0x%04x\n", __func__, status); 562 563 if (status & IRQ_LCI) { 564 /* should do something about checking link status */ 565 handled |= IRQ_LCI; 566 } 567 568 if (status & IRQ_LDI) { 569 u16 pmecr = ks8851_rdreg16(ks, KS_PMECR); 570 pmecr &= ~PMECR_WKEVT_MASK; 571 ks8851_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK); 572 573 handled |= IRQ_LDI; 574 } 575 576 if (status & IRQ_RXPSI) 577 handled |= IRQ_RXPSI; 578 579 if (status & IRQ_TXI) { 580 handled |= IRQ_TXI; 581 582 /* no lock here, tx queue should have been stopped */ 583 584 /* update our idea of how much tx space is available to the 585 * system */ 586 ks->tx_space = ks8851_rdreg16(ks, KS_TXMIR); 587 588 netif_dbg(ks, intr, ks->netdev, 589 "%s: txspace %d\n", __func__, ks->tx_space); 590 } 591 592 if (status & IRQ_RXI) 593 handled |= IRQ_RXI; 594 595 if (status & IRQ_SPIBEI) { 596 dev_err(&ks->spidev->dev, "%s: spi bus error\n", __func__); 597 handled |= IRQ_SPIBEI; 598 } 599 600 ks8851_wrreg16(ks, KS_ISR, handled); 601 602 if (status & IRQ_RXI) { 603 /* the datasheet says to disable the rx interrupt during 604 * packet read-out, however we're masking the interrupt 605 * from the device so do not bother masking just the RX 606 * from the device. */ 607 608 ks8851_rx_pkts(ks); 609 } 610 611 /* if something stopped the rx process, probably due to wanting 612 * to change the rx settings, then do something about restarting 613 * it. */ 614 if (status & IRQ_RXPSI) { 615 struct ks8851_rxctrl *rxc = &ks->rxctrl; 616 617 /* update the multicast hash table */ 618 ks8851_wrreg16(ks, KS_MAHTR0, rxc->mchash[0]); 619 ks8851_wrreg16(ks, KS_MAHTR1, rxc->mchash[1]); 620 ks8851_wrreg16(ks, KS_MAHTR2, rxc->mchash[2]); 621 ks8851_wrreg16(ks, KS_MAHTR3, rxc->mchash[3]); 622 623 ks8851_wrreg16(ks, KS_RXCR2, rxc->rxcr2); 624 ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1); 625 } 626 627 mutex_unlock(&ks->lock); 628 629 if (status & IRQ_TXI) 630 netif_wake_queue(ks->netdev); 631 632 enable_irq(ks->netdev->irq); 633} 634 635/** 636 * calc_txlen - calculate size of message to send packet 637 * @len: Lenght of data 638 * 639 * Returns the size of the TXFIFO message needed to send 640 * this packet. 641 */ 642static inline unsigned calc_txlen(unsigned len) 643{ 644 return ALIGN(len + 4, 4); 645} 646 647/** 648 * ks8851_wrpkt - write packet to TX FIFO 649 * @ks: The device state. 650 * @txp: The sk_buff to transmit. 651 * @irq: IRQ on completion of the packet. 652 * 653 * Send the @txp to the chip. This means creating the relevant packet header 654 * specifying the length of the packet and the other information the chip 655 * needs, such as IRQ on completion. Send the header and the packet data to 656 * the device. 657 */ 658static void ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq) 659{ 660 struct spi_transfer *xfer = ks->spi_xfer2; 661 struct spi_message *msg = &ks->spi_msg2; 662 unsigned fid = 0; 663 int ret; 664 665 netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n", 666 __func__, txp, txp->len, txp->data, irq); 667 668 fid = ks->fid++; 669 fid &= TXFR_TXFID_MASK; 670 671 if (irq) 672 fid |= TXFR_TXIC; /* irq on completion */ 673 674 /* start header at txb[1] to align txw entries */ 675 ks->txh.txb[1] = KS_SPIOP_TXFIFO; 676 ks->txh.txw[1] = cpu_to_le16(fid); 677 ks->txh.txw[2] = cpu_to_le16(txp->len); 678 679 xfer->tx_buf = &ks->txh.txb[1]; 680 xfer->rx_buf = NULL; 681 xfer->len = 5; 682 683 xfer++; 684 xfer->tx_buf = txp->data; 685 xfer->rx_buf = NULL; 686 xfer->len = ALIGN(txp->len, 4); 687 688 ret = spi_sync(ks->spidev, msg); 689 if (ret < 0) 690 netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__); 691} 692 693/** 694 * ks8851_done_tx - update and then free skbuff after transmitting 695 * @ks: The device state 696 * @txb: The buffer transmitted 697 */ 698static void ks8851_done_tx(struct ks8851_net *ks, struct sk_buff *txb) 699{ 700 struct net_device *dev = ks->netdev; 701 702 dev->stats.tx_bytes += txb->len; 703 dev->stats.tx_packets++; 704 705 dev_kfree_skb(txb); 706} 707 708/** 709 * ks8851_tx_work - process tx packet(s) 710 * @work: The work strucutre what was scheduled. 711 * 712 * This is called when a number of packets have been scheduled for 713 * transmission and need to be sent to the device. 714 */ 715static void ks8851_tx_work(struct work_struct *work) 716{ 717 struct ks8851_net *ks = container_of(work, struct ks8851_net, tx_work); 718 struct sk_buff *txb; 719 bool last = skb_queue_empty(&ks->txq); 720 721 mutex_lock(&ks->lock); 722 723 while (!last) { 724 txb = skb_dequeue(&ks->txq); 725 last = skb_queue_empty(&ks->txq); 726 727 if (txb != NULL) { 728 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA); 729 ks8851_wrpkt(ks, txb, last); 730 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); 731 ks8851_wrreg16(ks, KS_TXQCR, TXQCR_METFE); 732 733 ks8851_done_tx(ks, txb); 734 } 735 } 736 737 mutex_unlock(&ks->lock); 738} 739 740/** 741 * ks8851_set_powermode - set power mode of the device 742 * @ks: The device state 743 * @pwrmode: The power mode value to write to KS_PMECR. 744 * 745 * Change the power mode of the chip. 746 */ 747static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode) 748{ 749 unsigned pmecr; 750 751 netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode); 752 753 pmecr = ks8851_rdreg16(ks, KS_PMECR); 754 pmecr &= ~PMECR_PM_MASK; 755 pmecr |= pwrmode; 756 757 ks8851_wrreg16(ks, KS_PMECR, pmecr); 758} 759 760/** 761 * ks8851_net_open - open network device 762 * @dev: The network device being opened. 763 * 764 * Called when the network device is marked active, such as a user executing 765 * 'ifconfig up' on the device. 766 */ 767static int ks8851_net_open(struct net_device *dev) 768{ 769 struct ks8851_net *ks = netdev_priv(dev); 770 771 /* lock the card, even if we may not actually be doing anything 772 * else at the moment */ 773 mutex_lock(&ks->lock); 774 775 netif_dbg(ks, ifup, ks->netdev, "opening\n"); 776 777 /* bring chip out of any power saving mode it was in */ 778 ks8851_set_powermode(ks, PMECR_PM_NORMAL); 779 780 /* issue a soft reset to the RX/TX QMU to put it into a known 781 * state. */ 782 ks8851_soft_reset(ks, GRR_QMU); 783 784 /* setup transmission parameters */ 785 786 ks8851_wrreg16(ks, KS_TXCR, (TXCR_TXE | /* enable transmit process */ 787 TXCR_TXPE | /* pad to min length */ 788 TXCR_TXCRC | /* add CRC */ 789 TXCR_TXFCE)); /* enable flow control */ 790 791 /* auto-increment tx data, reset tx pointer */ 792 ks8851_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI); 793 794 /* setup receiver control */ 795 796 ks8851_wrreg16(ks, KS_RXCR1, (RXCR1_RXPAFMA | /* from mac filter */ 797 RXCR1_RXFCE | /* enable flow control */ 798 RXCR1_RXBE | /* broadcast enable */ 799 RXCR1_RXUE | /* unicast enable */ 800 RXCR1_RXE)); /* enable rx block */ 801 802 /* transfer entire frames out in one go */ 803 ks8851_wrreg16(ks, KS_RXCR2, RXCR2_SRDBL_FRAME); 804 805 /* set receive counter timeouts */ 806 ks8851_wrreg16(ks, KS_RXDTTR, 1000); /* 1ms after first frame to IRQ */ 807 ks8851_wrreg16(ks, KS_RXDBCTR, 4096); /* >4Kbytes in buffer to IRQ */ 808 ks8851_wrreg16(ks, KS_RXFCTR, 10); /* 10 frames to IRQ */ 809 810 ks->rc_rxqcr = (RXQCR_RXFCTE | /* IRQ on frame count exceeded */ 811 RXQCR_RXDBCTE | /* IRQ on byte count exceeded */ 812 RXQCR_RXDTTE); /* IRQ on time exceeded */ 813 814 ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); 815 816 /* clear then enable interrupts */ 817 818#define STD_IRQ (IRQ_LCI | /* Link Change */ \ 819 IRQ_TXI | /* TX done */ \ 820 IRQ_RXI | /* RX done */ \ 821 IRQ_SPIBEI | /* SPI bus error */ \ 822 IRQ_TXPSI | /* TX process stop */ \ 823 IRQ_RXPSI) /* RX process stop */ 824 825 ks->rc_ier = STD_IRQ; 826 ks8851_wrreg16(ks, KS_ISR, STD_IRQ); 827 ks8851_wrreg16(ks, KS_IER, STD_IRQ); 828 829 netif_start_queue(ks->netdev); 830 831 netif_dbg(ks, ifup, ks->netdev, "network device up\n"); 832 833 mutex_unlock(&ks->lock); 834 return 0; 835} 836 837/** 838 * ks8851_net_stop - close network device 839 * @dev: The device being closed. 840 * 841 * Called to close down a network device which has been active. Cancell any 842 * work, shutdown the RX and TX process and then place the chip into a low 843 * power state whilst it is not being used. 844 */ 845static int ks8851_net_stop(struct net_device *dev) 846{ 847 struct ks8851_net *ks = netdev_priv(dev); 848 849 netif_info(ks, ifdown, dev, "shutting down\n"); 850 851 netif_stop_queue(dev); 852 853 mutex_lock(&ks->lock); 854 855 /* stop any outstanding work */ 856 flush_work(&ks->irq_work); 857 flush_work(&ks->tx_work); 858 flush_work(&ks->rxctrl_work); 859 860 /* turn off the IRQs and ack any outstanding */ 861 ks8851_wrreg16(ks, KS_IER, 0x0000); 862 ks8851_wrreg16(ks, KS_ISR, 0xffff); 863 864 /* shutdown RX process */ 865 ks8851_wrreg16(ks, KS_RXCR1, 0x0000); 866 867 /* shutdown TX process */ 868 ks8851_wrreg16(ks, KS_TXCR, 0x0000); 869 870 /* set powermode to soft power down to save power */ 871 ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN); 872 873 /* ensure any queued tx buffers are dumped */ 874 while (!skb_queue_empty(&ks->txq)) { 875 struct sk_buff *txb = skb_dequeue(&ks->txq); 876 877 netif_dbg(ks, ifdown, ks->netdev, 878 "%s: freeing txb %p\n", __func__, txb); 879 880 dev_kfree_skb(txb); 881 } 882 883 mutex_unlock(&ks->lock); 884 return 0; 885} 886 887/** 888 * ks8851_start_xmit - transmit packet 889 * @skb: The buffer to transmit 890 * @dev: The device used to transmit the packet. 891 * 892 * Called by the network layer to transmit the @skb. Queue the packet for 893 * the device and schedule the necessary work to transmit the packet when 894 * it is free. 895 * 896 * We do this to firstly avoid sleeping with the network device locked, 897 * and secondly so we can round up more than one packet to transmit which 898 * means we can try and avoid generating too many transmit done interrupts. 899 */ 900static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb, 901 struct net_device *dev) 902{ 903 struct ks8851_net *ks = netdev_priv(dev); 904 unsigned needed = calc_txlen(skb->len); 905 netdev_tx_t ret = NETDEV_TX_OK; 906 907 netif_dbg(ks, tx_queued, ks->netdev, 908 "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data); 909 910 spin_lock(&ks->statelock); 911 912 if (needed > ks->tx_space) { 913 netif_stop_queue(dev); 914 ret = NETDEV_TX_BUSY; 915 } else { 916 ks->tx_space -= needed; 917 skb_queue_tail(&ks->txq, skb); 918 } 919 920 spin_unlock(&ks->statelock); 921 schedule_work(&ks->tx_work); 922 923 return ret; 924} 925 926/** 927 * ks8851_rxctrl_work - work handler to change rx mode 928 * @work: The work structure this belongs to. 929 * 930 * Lock the device and issue the necessary changes to the receive mode from 931 * the network device layer. This is done so that we can do this without 932 * having to sleep whilst holding the network device lock. 933 * 934 * Since the recommendation from Micrel is that the RXQ is shutdown whilst the 935 * receive parameters are programmed, we issue a write to disable the RXQ and 936 * then wait for the interrupt handler to be triggered once the RXQ shutdown is 937 * complete. The interrupt handler then writes the new values into the chip. 938 */ 939static void ks8851_rxctrl_work(struct work_struct *work) 940{ 941 struct ks8851_net *ks = container_of(work, struct ks8851_net, rxctrl_work); 942 943 mutex_lock(&ks->lock); 944 945 /* need to shutdown RXQ before modifying filter parameters */ 946 ks8851_wrreg16(ks, KS_RXCR1, 0x00); 947 948 mutex_unlock(&ks->lock); 949} 950 951static void ks8851_set_rx_mode(struct net_device *dev) 952{ 953 struct ks8851_net *ks = netdev_priv(dev); 954 struct ks8851_rxctrl rxctrl; 955 956 memset(&rxctrl, 0, sizeof(rxctrl)); 957 958 if (dev->flags & IFF_PROMISC) { 959 /* interface to receive everything */ 960 961 rxctrl.rxcr1 = RXCR1_RXAE | RXCR1_RXINVF; 962 } else if (dev->flags & IFF_ALLMULTI) { 963 /* accept all multicast packets */ 964 965 rxctrl.rxcr1 = (RXCR1_RXME | RXCR1_RXAE | 966 RXCR1_RXPAFMA | RXCR1_RXMAFMA); 967 } else if (dev->flags & IFF_MULTICAST && !netdev_mc_empty(dev)) { 968 struct netdev_hw_addr *ha; 969 u32 crc; 970 971 /* accept some multicast */ 972 973 netdev_for_each_mc_addr(ha, dev) { 974 crc = ether_crc(ETH_ALEN, ha->addr); 975 crc >>= (32 - 6); /* get top six bits */ 976 977 rxctrl.mchash[crc >> 4] |= (1 << (crc & 0xf)); 978 } 979 980 rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA; 981 } else { 982 /* just accept broadcast / unicast */ 983 rxctrl.rxcr1 = RXCR1_RXPAFMA; 984 } 985 986 rxctrl.rxcr1 |= (RXCR1_RXUE | /* unicast enable */ 987 RXCR1_RXBE | /* broadcast enable */ 988 RXCR1_RXE | /* RX process enable */ 989 RXCR1_RXFCE); /* enable flow control */ 990 991 rxctrl.rxcr2 |= RXCR2_SRDBL_FRAME; 992 993 /* schedule work to do the actual set of the data if needed */ 994 995 spin_lock(&ks->statelock); 996 997 if (memcmp(&rxctrl, &ks->rxctrl, sizeof(rxctrl)) != 0) { 998 memcpy(&ks->rxctrl, &rxctrl, sizeof(ks->rxctrl)); 999 schedule_work(&ks->rxctrl_work); 1000 } 1001 1002 spin_unlock(&ks->statelock); 1003} 1004 1005static int ks8851_set_mac_address(struct net_device *dev, void *addr) 1006{ 1007 struct sockaddr *sa = addr; 1008 1009 if (netif_running(dev)) 1010 return -EBUSY; 1011 1012 if (!is_valid_ether_addr(sa->sa_data)) 1013 return -EADDRNOTAVAIL; 1014 1015 memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN); 1016 return ks8851_write_mac_addr(dev); 1017} 1018 1019static int ks8851_net_ioctl(struct net_device *dev, struct ifreq *req, int cmd) 1020{ 1021 struct ks8851_net *ks = netdev_priv(dev); 1022 1023 if (!netif_running(dev)) 1024 return -EINVAL; 1025 1026 return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL); 1027} 1028 1029static const struct net_device_ops ks8851_netdev_ops = { 1030 .ndo_open = ks8851_net_open, 1031 .ndo_stop = ks8851_net_stop, 1032 .ndo_do_ioctl = ks8851_net_ioctl, 1033 .ndo_start_xmit = ks8851_start_xmit, 1034 .ndo_set_mac_address = ks8851_set_mac_address, 1035 .ndo_set_rx_mode = ks8851_set_rx_mode, 1036 .ndo_change_mtu = eth_change_mtu, 1037 .ndo_validate_addr = eth_validate_addr, 1038}; 1039 1040/* Companion eeprom access */ 1041 1042enum { /* EEPROM programming states */ 1043 EEPROM_CONTROL, 1044 EEPROM_ADDRESS, 1045 EEPROM_DATA, 1046 EEPROM_COMPLETE 1047}; 1048 1049/** 1050 * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM 1051 * @dev: The network device the PHY is on. 1052 * @addr: EEPROM address to read 1053 * 1054 * eeprom_size: used to define the data coding length. Can be changed 1055 * through debug-fs. 1056 * 1057 * Programs a read on the EEPROM using ks8851 EEPROM SW access feature. 1058 * Warning: The READ feature is not supported on ks8851 revision 0. 1059 * 1060 * Rough programming model: 1061 * - on period start: set clock high and read value on bus 1062 * - on period / 2: set clock low and program value on bus 1063 * - start on period / 2 1064 */ 1065unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr) 1066{ 1067 struct ks8851_net *ks = netdev_priv(dev); 1068 int eepcr; 1069 int ctrl = EEPROM_OP_READ; 1070 int state = EEPROM_CONTROL; 1071 int bit_count = EEPROM_OP_LEN - 1; 1072 unsigned int data = 0; 1073 int dummy; 1074 unsigned int addr_len; 1075 1076 addr_len = (ks->eeprom_size == 128) ? 6 : 8; 1077 1078 /* start transaction: chip select high, authorize write */ 1079 mutex_lock(&ks->lock); 1080 eepcr = EEPCR_EESA | EEPCR_EESRWA; 1081 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1082 eepcr |= EEPCR_EECS; 1083 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1084 mutex_unlock(&ks->lock); 1085 1086 while (state != EEPROM_COMPLETE) { 1087 /* falling clock period starts... */ 1088 /* set EED_IO pin for control and address */ 1089 eepcr &= ~EEPCR_EEDO; 1090 switch (state) { 1091 case EEPROM_CONTROL: 1092 eepcr |= ((ctrl >> bit_count) & 1) << 2; 1093 if (bit_count-- <= 0) { 1094 bit_count = addr_len - 1; 1095 state = EEPROM_ADDRESS; 1096 } 1097 break; 1098 case EEPROM_ADDRESS: 1099 eepcr |= ((addr >> bit_count) & 1) << 2; 1100 bit_count--; 1101 break; 1102 case EEPROM_DATA: 1103 /* Change to receive mode */ 1104 eepcr &= ~EEPCR_EESRWA; 1105 break; 1106 } 1107 1108 /* lower clock */ 1109 eepcr &= ~EEPCR_EESCK; 1110 1111 mutex_lock(&ks->lock); 1112 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1113 mutex_unlock(&ks->lock); 1114 1115 /* waitread period / 2 */ 1116 udelay(EEPROM_SK_PERIOD / 2); 1117 1118 /* rising clock period starts... */ 1119 1120 /* raise clock */ 1121 mutex_lock(&ks->lock); 1122 eepcr |= EEPCR_EESCK; 1123 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1124 mutex_unlock(&ks->lock); 1125 1126 /* Manage read */ 1127 switch (state) { 1128 case EEPROM_ADDRESS: 1129 if (bit_count < 0) { 1130 bit_count = EEPROM_DATA_LEN - 1; 1131 state = EEPROM_DATA; 1132 } 1133 break; 1134 case EEPROM_DATA: 1135 mutex_lock(&ks->lock); 1136 dummy = ks8851_rdreg16(ks, KS_EEPCR); 1137 mutex_unlock(&ks->lock); 1138 data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count; 1139 if (bit_count-- <= 0) 1140 state = EEPROM_COMPLETE; 1141 break; 1142 } 1143 1144 /* wait period / 2 */ 1145 udelay(EEPROM_SK_PERIOD / 2); 1146 } 1147 1148 /* close transaction */ 1149 mutex_lock(&ks->lock); 1150 eepcr &= ~EEPCR_EECS; 1151 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1152 eepcr = 0; 1153 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1154 mutex_unlock(&ks->lock); 1155 1156 return data; 1157} 1158 1159/** 1160 * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM 1161 * @dev: The network device the PHY is on. 1162 * @op: operand (can be WRITE, EWEN, EWDS) 1163 * @addr: EEPROM address to write 1164 * @data: data to write 1165 * 1166 * eeprom_size: used to define the data coding length. Can be changed 1167 * through debug-fs. 1168 * 1169 * Programs a write on the EEPROM using ks8851 EEPROM SW access feature. 1170 * 1171 * Note that a write enable is required before writing data. 1172 * 1173 * Rough programming model: 1174 * - on period start: set clock high 1175 * - on period / 2: set clock low and program value on bus 1176 * - start on period / 2 1177 */ 1178void ks8851_eeprom_write(struct net_device *dev, unsigned int op, 1179 unsigned int addr, unsigned int data) 1180{ 1181 struct ks8851_net *ks = netdev_priv(dev); 1182 int eepcr; 1183 int state = EEPROM_CONTROL; 1184 int bit_count = EEPROM_OP_LEN - 1; 1185 unsigned int addr_len; 1186 1187 addr_len = (ks->eeprom_size == 128) ? 6 : 8; 1188 1189 switch (op) { 1190 case EEPROM_OP_EWEN: 1191 addr = 0x30; 1192 break; 1193 case EEPROM_OP_EWDS: 1194 addr = 0; 1195 break; 1196 } 1197 1198 /* start transaction: chip select high, authorize write */ 1199 mutex_lock(&ks->lock); 1200 eepcr = EEPCR_EESA | EEPCR_EESRWA; 1201 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1202 eepcr |= EEPCR_EECS; 1203 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1204 mutex_unlock(&ks->lock); 1205 1206 while (state != EEPROM_COMPLETE) { 1207 /* falling clock period starts... */ 1208 /* set EED_IO pin for control and address */ 1209 eepcr &= ~EEPCR_EEDO; 1210 switch (state) { 1211 case EEPROM_CONTROL: 1212 eepcr |= ((op >> bit_count) & 1) << 2; 1213 if (bit_count-- <= 0) { 1214 bit_count = addr_len - 1; 1215 state = EEPROM_ADDRESS; 1216 } 1217 break; 1218 case EEPROM_ADDRESS: 1219 eepcr |= ((addr >> bit_count) & 1) << 2; 1220 if (bit_count-- <= 0) { 1221 if (op == EEPROM_OP_WRITE) { 1222 bit_count = EEPROM_DATA_LEN - 1; 1223 state = EEPROM_DATA; 1224 } else { 1225 state = EEPROM_COMPLETE; 1226 } 1227 } 1228 break; 1229 case EEPROM_DATA: 1230 eepcr |= ((data >> bit_count) & 1) << 2; 1231 if (bit_count-- <= 0) 1232 state = EEPROM_COMPLETE; 1233 break; 1234 } 1235 1236 /* lower clock */ 1237 eepcr &= ~EEPCR_EESCK; 1238 1239 mutex_lock(&ks->lock); 1240 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1241 mutex_unlock(&ks->lock); 1242 1243 /* wait period / 2 */ 1244 udelay(EEPROM_SK_PERIOD / 2); 1245 1246 /* rising clock period starts... */ 1247 1248 /* raise clock */ 1249 eepcr |= EEPCR_EESCK; 1250 mutex_lock(&ks->lock); 1251 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1252 mutex_unlock(&ks->lock); 1253 1254 /* wait period / 2 */ 1255 udelay(EEPROM_SK_PERIOD / 2); 1256 } 1257 1258 /* close transaction */ 1259 mutex_lock(&ks->lock); 1260 eepcr &= ~EEPCR_EECS; 1261 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1262 eepcr = 0; 1263 ks8851_wrreg16(ks, KS_EEPCR, eepcr); 1264 mutex_unlock(&ks->lock); 1265 1266} 1267 1268/* ethtool support */ 1269 1270static void ks8851_get_drvinfo(struct net_device *dev, 1271 struct ethtool_drvinfo *di) 1272{ 1273 strlcpy(di->driver, "KS8851", sizeof(di->driver)); 1274 strlcpy(di->version, "1.00", sizeof(di->version)); 1275 strlcpy(di->bus_info, dev_name(dev->dev.parent), sizeof(di->bus_info)); 1276} 1277 1278static u32 ks8851_get_msglevel(struct net_device *dev) 1279{ 1280 struct ks8851_net *ks = netdev_priv(dev); 1281 return ks->msg_enable; 1282} 1283 1284static void ks8851_set_msglevel(struct net_device *dev, u32 to) 1285{ 1286 struct ks8851_net *ks = netdev_priv(dev); 1287 ks->msg_enable = to; 1288} 1289 1290static int ks8851_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) 1291{ 1292 struct ks8851_net *ks = netdev_priv(dev); 1293 return mii_ethtool_gset(&ks->mii, cmd); 1294} 1295 1296static int ks8851_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) 1297{ 1298 struct ks8851_net *ks = netdev_priv(dev); 1299 return mii_ethtool_sset(&ks->mii, cmd); 1300} 1301 1302static u32 ks8851_get_link(struct net_device *dev) 1303{ 1304 struct ks8851_net *ks = netdev_priv(dev); 1305 return mii_link_ok(&ks->mii); 1306} 1307 1308static int ks8851_nway_reset(struct net_device *dev) 1309{ 1310 struct ks8851_net *ks = netdev_priv(dev); 1311 return mii_nway_restart(&ks->mii); 1312} 1313 1314static int ks8851_get_eeprom_len(struct net_device *dev) 1315{ 1316 struct ks8851_net *ks = netdev_priv(dev); 1317 return ks->eeprom_size; 1318} 1319 1320static int ks8851_get_eeprom(struct net_device *dev, 1321 struct ethtool_eeprom *eeprom, u8 *bytes) 1322{ 1323 struct ks8851_net *ks = netdev_priv(dev); 1324 u16 *eeprom_buff; 1325 int first_word; 1326 int last_word; 1327 int ret_val = 0; 1328 u16 i; 1329 1330 if (eeprom->len == 0) 1331 return -EINVAL; 1332 1333 if (eeprom->len > ks->eeprom_size) 1334 return -EINVAL; 1335 1336 eeprom->magic = ks8851_rdreg16(ks, KS_CIDER); 1337 1338 first_word = eeprom->offset >> 1; 1339 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1340 1341 eeprom_buff = kmalloc(sizeof(u16) * 1342 (last_word - first_word + 1), GFP_KERNEL); 1343 if (!eeprom_buff) 1344 return -ENOMEM; 1345 1346 for (i = 0; i < last_word - first_word + 1; i++) 1347 eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1); 1348 1349 /* Device's eeprom is little-endian, word addressable */ 1350 for (i = 0; i < last_word - first_word + 1; i++) 1351 le16_to_cpus(&eeprom_buff[i]); 1352 1353 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); 1354 kfree(eeprom_buff); 1355 1356 return ret_val; 1357} 1358 1359static int ks8851_set_eeprom(struct net_device *dev, 1360 struct ethtool_eeprom *eeprom, u8 *bytes) 1361{ 1362 struct ks8851_net *ks = netdev_priv(dev); 1363 u16 *eeprom_buff; 1364 void *ptr; 1365 int max_len; 1366 int first_word; 1367 int last_word; 1368 int ret_val = 0; 1369 u16 i; 1370 1371 if (eeprom->len == 0) 1372 return -EOPNOTSUPP; 1373 1374 if (eeprom->len > ks->eeprom_size) 1375 return -EINVAL; 1376 1377 if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER)) 1378 return -EFAULT; 1379 1380 first_word = eeprom->offset >> 1; 1381 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1382 max_len = (last_word - first_word + 1) * 2; 1383 eeprom_buff = kmalloc(max_len, GFP_KERNEL); 1384 if (!eeprom_buff) 1385 return -ENOMEM; 1386 1387 ptr = (void *)eeprom_buff; 1388 1389 if (eeprom->offset & 1) { 1390 /* need read/modify/write of first changed EEPROM word */ 1391 /* only the second byte of the word is being modified */ 1392 eeprom_buff[0] = ks8851_eeprom_read(dev, first_word); 1393 ptr++; 1394 } 1395 if ((eeprom->offset + eeprom->len) & 1) 1396 /* need read/modify/write of last changed EEPROM word */ 1397 /* only the first byte of the word is being modified */ 1398 eeprom_buff[last_word - first_word] = 1399 ks8851_eeprom_read(dev, last_word); 1400 1401 1402 /* Device's eeprom is little-endian, word addressable */ 1403 le16_to_cpus(&eeprom_buff[0]); 1404 le16_to_cpus(&eeprom_buff[last_word - first_word]); 1405 1406 memcpy(ptr, bytes, eeprom->len); 1407 1408 for (i = 0; i < last_word - first_word + 1; i++) 1409 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]); 1410 1411 ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0); 1412 1413 for (i = 0; i < last_word - first_word + 1; i++) { 1414 ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i, 1415 eeprom_buff[i]); 1416 mdelay(EEPROM_WRITE_TIME); 1417 } 1418 1419 ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0); 1420 1421 kfree(eeprom_buff); 1422 return ret_val; 1423} 1424 1425static const struct ethtool_ops ks8851_ethtool_ops = { 1426 .get_drvinfo = ks8851_get_drvinfo, 1427 .get_msglevel = ks8851_get_msglevel, 1428 .set_msglevel = ks8851_set_msglevel, 1429 .get_settings = ks8851_get_settings, 1430 .set_settings = ks8851_set_settings, 1431 .get_link = ks8851_get_link, 1432 .nway_reset = ks8851_nway_reset, 1433 .get_eeprom_len = ks8851_get_eeprom_len, 1434 .get_eeprom = ks8851_get_eeprom, 1435 .set_eeprom = ks8851_set_eeprom, 1436}; 1437 1438/* MII interface controls */ 1439 1440/** 1441 * ks8851_phy_reg - convert MII register into a KS8851 register 1442 * @reg: MII register number. 1443 * 1444 * Return the KS8851 register number for the corresponding MII PHY register 1445 * if possible. Return zero if the MII register has no direct mapping to the 1446 * KS8851 register set. 1447 */ 1448static int ks8851_phy_reg(int reg) 1449{ 1450 switch (reg) { 1451 case MII_BMCR: 1452 return KS_P1MBCR; 1453 case MII_BMSR: 1454 return KS_P1MBSR; 1455 case MII_PHYSID1: 1456 return KS_PHY1ILR; 1457 case MII_PHYSID2: 1458 return KS_PHY1IHR; 1459 case MII_ADVERTISE: 1460 return KS_P1ANAR; 1461 case MII_LPA: 1462 return KS_P1ANLPR; 1463 } 1464 1465 return 0x0; 1466} 1467 1468/** 1469 * ks8851_phy_read - MII interface PHY register read. 1470 * @dev: The network device the PHY is on. 1471 * @phy_addr: Address of PHY (ignored as we only have one) 1472 * @reg: The register to read. 1473 * 1474 * This call reads data from the PHY register specified in @reg. Since the 1475 * device does not support all the MII registers, the non-existant values 1476 * are always returned as zero. 1477 * 1478 * We return zero for unsupported registers as the MII code does not check 1479 * the value returned for any error status, and simply returns it to the 1480 * caller. The mii-tool that the driver was tested with takes any -ve error 1481 * as real PHY capabilities, thus displaying incorrect data to the user. 1482 */ 1483static int ks8851_phy_read(struct net_device *dev, int phy_addr, int reg) 1484{ 1485 struct ks8851_net *ks = netdev_priv(dev); 1486 int ksreg; 1487 int result; 1488 1489 ksreg = ks8851_phy_reg(reg); 1490 if (!ksreg) 1491 return 0x0; /* no error return allowed, so use zero */ 1492 1493 mutex_lock(&ks->lock); 1494 result = ks8851_rdreg16(ks, ksreg); 1495 mutex_unlock(&ks->lock); 1496 1497 return result; 1498} 1499 1500static void ks8851_phy_write(struct net_device *dev, 1501 int phy, int reg, int value) 1502{ 1503 struct ks8851_net *ks = netdev_priv(dev); 1504 int ksreg; 1505 1506 ksreg = ks8851_phy_reg(reg); 1507 if (ksreg) { 1508 mutex_lock(&ks->lock); 1509 ks8851_wrreg16(ks, ksreg, value); 1510 mutex_unlock(&ks->lock); 1511 } 1512} 1513 1514/** 1515 * ks8851_read_selftest - read the selftest memory info. 1516 * @ks: The device state 1517 * 1518 * Read and check the TX/RX memory selftest information. 1519 */ 1520static int ks8851_read_selftest(struct ks8851_net *ks) 1521{ 1522 unsigned both_done = MBIR_TXMBF | MBIR_RXMBF; 1523 int ret = 0; 1524 unsigned rd; 1525 1526 rd = ks8851_rdreg16(ks, KS_MBIR); 1527 1528 if ((rd & both_done) != both_done) { 1529 netdev_warn(ks->netdev, "Memory selftest not finished\n"); 1530 return 0; 1531 } 1532 1533 if (rd & MBIR_TXMBFA) { 1534 netdev_err(ks->netdev, "TX memory selftest fail\n"); 1535 ret |= 1; 1536 } 1537 1538 if (rd & MBIR_RXMBFA) { 1539 netdev_err(ks->netdev, "RX memory selftest fail\n"); 1540 ret |= 2; 1541 } 1542 1543 return 0; 1544} 1545 1546/* driver bus management functions */ 1547 1548static int __devinit ks8851_probe(struct spi_device *spi) 1549{ 1550 struct net_device *ndev; 1551 struct ks8851_net *ks; 1552 int ret; 1553 1554 ndev = alloc_etherdev(sizeof(struct ks8851_net)); 1555 if (!ndev) { 1556 dev_err(&spi->dev, "failed to alloc ethernet device\n"); 1557 return -ENOMEM; 1558 } 1559 1560 spi->bits_per_word = 8; 1561 1562 ks = netdev_priv(ndev); 1563 1564 ks->netdev = ndev; 1565 ks->spidev = spi; 1566 ks->tx_space = 6144; 1567 1568 mutex_init(&ks->lock); 1569 spin_lock_init(&ks->statelock); 1570 1571 INIT_WORK(&ks->tx_work, ks8851_tx_work); 1572 INIT_WORK(&ks->irq_work, ks8851_irq_work); 1573 INIT_WORK(&ks->rxctrl_work, ks8851_rxctrl_work); 1574 1575 /* initialise pre-made spi transfer messages */ 1576 1577 spi_message_init(&ks->spi_msg1); 1578 spi_message_add_tail(&ks->spi_xfer1, &ks->spi_msg1); 1579 1580 spi_message_init(&ks->spi_msg2); 1581 spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2); 1582 spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2); 1583 1584 /* setup mii state */ 1585 ks->mii.dev = ndev; 1586 ks->mii.phy_id = 1, 1587 ks->mii.phy_id_mask = 1; 1588 ks->mii.reg_num_mask = 0xf; 1589 ks->mii.mdio_read = ks8851_phy_read; 1590 ks->mii.mdio_write = ks8851_phy_write; 1591 1592 dev_info(&spi->dev, "message enable is %d\n", msg_enable); 1593 1594 /* set the default message enable */ 1595 ks->msg_enable = netif_msg_init(msg_enable, (NETIF_MSG_DRV | 1596 NETIF_MSG_PROBE | 1597 NETIF_MSG_LINK)); 1598 1599 skb_queue_head_init(&ks->txq); 1600 1601 SET_ETHTOOL_OPS(ndev, &ks8851_ethtool_ops); 1602 SET_NETDEV_DEV(ndev, &spi->dev); 1603 1604 dev_set_drvdata(&spi->dev, ks); 1605 1606 ndev->if_port = IF_PORT_100BASET; 1607 ndev->netdev_ops = &ks8851_netdev_ops; 1608 ndev->irq = spi->irq; 1609 1610 /* issue a global soft reset to reset the device. */ 1611 ks8851_soft_reset(ks, GRR_GSR); 1612 1613 /* simple check for a valid chip being connected to the bus */ 1614 1615 if ((ks8851_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) { 1616 dev_err(&spi->dev, "failed to read device ID\n"); 1617 ret = -ENODEV; 1618 goto err_id; 1619 } 1620 1621 /* cache the contents of the CCR register for EEPROM, etc. */ 1622 ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR); 1623 1624 if (ks->rc_ccr & CCR_EEPROM) 1625 ks->eeprom_size = 128; 1626 else 1627 ks->eeprom_size = 0; 1628 1629 ks8851_read_selftest(ks); 1630 ks8851_init_mac(ks); 1631 1632 ret = request_irq(spi->irq, ks8851_irq, IRQF_TRIGGER_LOW, 1633 ndev->name, ks); 1634 if (ret < 0) { 1635 dev_err(&spi->dev, "failed to get irq\n"); 1636 goto err_irq; 1637 } 1638 1639 ret = register_netdev(ndev); 1640 if (ret) { 1641 dev_err(&spi->dev, "failed to register network device\n"); 1642 goto err_netdev; 1643 } 1644 1645 netdev_info(ndev, "revision %d, MAC %pM, IRQ %d\n", 1646 CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)), 1647 ndev->dev_addr, ndev->irq); 1648 1649 return 0; 1650 1651 1652err_netdev: 1653 free_irq(ndev->irq, ndev); 1654 1655err_id: 1656err_irq: 1657 free_netdev(ndev); 1658 return ret; 1659} 1660 1661static int __devexit ks8851_remove(struct spi_device *spi) 1662{ 1663 struct ks8851_net *priv = dev_get_drvdata(&spi->dev); 1664 1665 if (netif_msg_drv(priv)) 1666 dev_info(&spi->dev, "remove\n"); 1667 1668 unregister_netdev(priv->netdev); 1669 free_irq(spi->irq, priv); 1670 free_netdev(priv->netdev); 1671 1672 return 0; 1673} 1674 1675static struct spi_driver ks8851_driver = { 1676 .driver = { 1677 .name = "ks8851", 1678 .owner = THIS_MODULE, 1679 }, 1680 .probe = ks8851_probe, 1681 .remove = __devexit_p(ks8851_remove), 1682}; 1683 1684static int __init ks8851_init(void) 1685{ 1686 return spi_register_driver(&ks8851_driver); 1687} 1688 1689static void __exit ks8851_exit(void) 1690{ 1691 spi_unregister_driver(&ks8851_driver); 1692} 1693 1694module_init(ks8851_init); 1695module_exit(ks8851_exit); 1696 1697MODULE_DESCRIPTION("KS8851 Network driver"); 1698MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 1699MODULE_LICENSE("GPL"); 1700 1701module_param_named(message, msg_enable, int, 0); 1702MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)"); 1703MODULE_ALIAS("spi:ks8851"); 1704