1#ifndef GRETH_H 2#define GRETH_H 3 4#include <linux/phy.h> 5 6/* Register bits and masks */ 7#define GRETH_RESET 0x40 8#define GRETH_MII_BUSY 0x8 9#define GRETH_MII_NVALID 0x10 10 11#define GRETH_CTRL_FD 0x10 12#define GRETH_CTRL_PR 0x20 13#define GRETH_CTRL_SP 0x80 14#define GRETH_CTRL_GB 0x100 15#define GRETH_CTRL_PSTATIEN 0x400 16#define GRETH_CTRL_MCEN 0x800 17#define GRETH_CTRL_DISDUPLEX 0x1000 18#define GRETH_STATUS_PHYSTAT 0x100 19 20#define GRETH_BD_EN 0x800 21#define GRETH_BD_WR 0x1000 22#define GRETH_BD_IE 0x2000 23#define GRETH_BD_LEN 0x7FF 24 25#define GRETH_TXEN 0x1 26#define GRETH_INT_TX 0x8 27#define GRETH_TXI 0x4 28#define GRETH_TXBD_STATUS 0x0001C000 29#define GRETH_TXBD_MORE 0x20000 30#define GRETH_TXBD_IPCS 0x40000 31#define GRETH_TXBD_TCPCS 0x80000 32#define GRETH_TXBD_UDPCS 0x100000 33#define GRETH_TXBD_CSALL (GRETH_TXBD_IPCS | GRETH_TXBD_TCPCS | GRETH_TXBD_UDPCS) 34#define GRETH_TXBD_ERR_LC 0x10000 35#define GRETH_TXBD_ERR_UE 0x4000 36#define GRETH_TXBD_ERR_AL 0x8000 37 38#define GRETH_INT_RX 0x4 39#define GRETH_RXEN 0x2 40#define GRETH_RXI 0x8 41#define GRETH_RXBD_STATUS 0xFFFFC000 42#define GRETH_RXBD_ERR_AE 0x4000 43#define GRETH_RXBD_ERR_FT 0x8000 44#define GRETH_RXBD_ERR_CRC 0x10000 45#define GRETH_RXBD_ERR_OE 0x20000 46#define GRETH_RXBD_ERR_LE 0x40000 47#define GRETH_RXBD_IP 0x80000 48#define GRETH_RXBD_IP_CSERR 0x100000 49#define GRETH_RXBD_UDP 0x200000 50#define GRETH_RXBD_UDP_CSERR 0x400000 51#define GRETH_RXBD_TCP 0x800000 52#define GRETH_RXBD_TCP_CSERR 0x1000000 53#define GRETH_RXBD_IP_FRAG 0x2000000 54#define GRETH_RXBD_MCAST 0x4000000 55 56/* Descriptor parameters */ 57#define GRETH_TXBD_NUM 128 58#define GRETH_TXBD_NUM_MASK (GRETH_TXBD_NUM-1) 59#define GRETH_TX_BUF_SIZE 2048 60#define GRETH_RXBD_NUM 128 61#define GRETH_RXBD_NUM_MASK (GRETH_RXBD_NUM-1) 62#define GRETH_RX_BUF_SIZE 2048 63 64/* Buffers per page */ 65#define GRETH_RX_BUF_PPGAE (PAGE_SIZE/GRETH_RX_BUF_SIZE) 66#define GRETH_TX_BUF_PPGAE (PAGE_SIZE/GRETH_TX_BUF_SIZE) 67 68/* How many pages are needed for buffers */ 69#define GRETH_RX_BUF_PAGE_NUM (GRETH_RXBD_NUM/GRETH_RX_BUF_PPGAE) 70#define GRETH_TX_BUF_PAGE_NUM (GRETH_TXBD_NUM/GRETH_TX_BUF_PPGAE) 71 72/* Buffer size. 73 * Gbit MAC uses tagged maximum frame size which is 1518 excluding CRC. 74 * Set to 1520 to make all buffers word aligned for non-gbit MAC. 75 */ 76#define MAX_FRAME_SIZE 1520 77 78/* Flags */ 79#define GRETH_FLAG_RX_CSUM 0x1 80 81/* GRETH APB registers */ 82struct greth_regs { 83 u32 control; 84 u32 status; 85 u32 esa_msb; 86 u32 esa_lsb; 87 u32 mdio; 88 u32 tx_desc_p; 89 u32 rx_desc_p; 90 u32 edclip; 91 u32 hash_msb; 92 u32 hash_lsb; 93}; 94 95/* GRETH buffer descriptor */ 96struct greth_bd { 97 u32 stat; 98 u32 addr; 99}; 100 101struct greth_private { 102 struct sk_buff *rx_skbuff[GRETH_RXBD_NUM]; 103 struct sk_buff *tx_skbuff[GRETH_TXBD_NUM]; 104 105 unsigned char *tx_bufs[GRETH_TXBD_NUM]; 106 unsigned char *rx_bufs[GRETH_RXBD_NUM]; 107 108 u16 tx_next; 109 u16 tx_last; 110 u16 tx_free; 111 u16 rx_cur; 112 113 struct greth_regs *regs; /* Address of controller registers. */ 114 struct greth_bd *rx_bd_base; /* Address of Rx BDs. */ 115 struct greth_bd *tx_bd_base; /* Address of Tx BDs. */ 116 dma_addr_t rx_bd_base_phys; 117 dma_addr_t tx_bd_base_phys; 118 119 int irq; 120 121 struct device *dev; /* Pointer to platform_device->dev */ 122 struct net_device *netdev; 123 struct napi_struct napi; 124 spinlock_t devlock; 125 126 struct phy_device *phy; 127 struct mii_bus *mdio; 128 int mdio_irqs[PHY_MAX_ADDR]; 129 unsigned int link; 130 unsigned int speed; 131 unsigned int duplex; 132 133 u32 msg_enable; 134 u32 flags; 135 136 u8 phyaddr; 137 u8 multicast; 138 u8 gbit_mac; 139 u8 mdio_int_en; 140 u8 edcl; 141}; 142 143#endif 144