1/* 2 * Copyright (C) 2008 Marvell Semiconductors, All Rights Reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9#ifndef __MVSDIO_H 10#define __MVSDIO_H 11 12/* 13 * Clock rates 14 */ 15 16#define MVSD_CLOCKRATE_MAX 50000000 17#define MVSD_BASE_DIV_MAX 0x7ff 18 19 20/* 21 * Register offsets 22 */ 23 24#define MVSD_SYS_ADDR_LOW 0x000 25#define MVSD_SYS_ADDR_HI 0x004 26#define MVSD_BLK_SIZE 0x008 27#define MVSD_BLK_COUNT 0x00c 28#define MVSD_ARG_LOW 0x010 29#define MVSD_ARG_HI 0x014 30#define MVSD_XFER_MODE 0x018 31#define MVSD_CMD 0x01c 32#define MVSD_RSP(i) (0x020 + ((i)<<2)) 33#define MVSD_RSP0 0x020 34#define MVSD_RSP1 0x024 35#define MVSD_RSP2 0x028 36#define MVSD_RSP3 0x02c 37#define MVSD_RSP4 0x030 38#define MVSD_RSP5 0x034 39#define MVSD_RSP6 0x038 40#define MVSD_RSP7 0x03c 41#define MVSD_FIFO 0x040 42#define MVSD_RSP_CRC7 0x044 43#define MVSD_HW_STATE 0x048 44#define MVSD_HOST_CTRL 0x050 45#define MVSD_BLK_GAP_CTRL 0x054 46#define MVSD_CLK_CTRL 0x058 47#define MVSD_SW_RESET 0x05c 48#define MVSD_NOR_INTR_STATUS 0x060 49#define MVSD_ERR_INTR_STATUS 0x064 50#define MVSD_NOR_STATUS_EN 0x068 51#define MVSD_ERR_STATUS_EN 0x06c 52#define MVSD_NOR_INTR_EN 0x070 53#define MVSD_ERR_INTR_EN 0x074 54#define MVSD_AUTOCMD12_ERR_STATUS 0x078 55#define MVSD_CURR_BYTE_LEFT 0x07c 56#define MVSD_CURR_BLK_LEFT 0x080 57#define MVSD_AUTOCMD12_ARG_LOW 0x084 58#define MVSD_AUTOCMD12_ARG_HI 0x088 59#define MVSD_AUTOCMD12_CMD 0x08c 60#define MVSD_AUTO_RSP(i) (0x090 + ((i)<<2)) 61#define MVSD_AUTO_RSP0 0x090 62#define MVSD_AUTO_RSP1 0x094 63#define MVSD_AUTO_RSP2 0x098 64#define MVSD_CLK_DIV 0x128 65 66#define MVSD_WINDOW_CTRL(i) (0x108 + ((i) << 3)) 67#define MVSD_WINDOW_BASE(i) (0x10c + ((i) << 3)) 68 69 70/* 71 * MVSD_CMD 72 */ 73 74#define MVSD_CMD_RSP_NONE (0 << 0) 75#define MVSD_CMD_RSP_136 (1 << 0) 76#define MVSD_CMD_RSP_48 (2 << 0) 77#define MVSD_CMD_RSP_48BUSY (3 << 0) 78 79#define MVSD_CMD_CHECK_DATACRC16 (1 << 2) 80#define MVSD_CMD_CHECK_CMDCRC (1 << 3) 81#define MVSD_CMD_INDX_CHECK (1 << 4) 82#define MVSD_CMD_DATA_PRESENT (1 << 5) 83#define MVSD_UNEXPECTED_RESP (1 << 7) 84#define MVSD_CMD_INDEX(x) ((x) << 8) 85 86 87/* 88 * MVSD_AUTOCMD12_CMD 89 */ 90 91#define MVSD_AUTOCMD12_BUSY (1 << 0) 92#define MVSD_AUTOCMD12_INDX_CHECK (1 << 1) 93#define MVSD_AUTOCMD12_INDEX(x) ((x) << 8) 94 95/* 96 * MVSD_XFER_MODE 97 */ 98 99#define MVSD_XFER_MODE_WR_DATA_START (1 << 0) 100#define MVSD_XFER_MODE_HW_WR_DATA_EN (1 << 1) 101#define MVSD_XFER_MODE_AUTO_CMD12 (1 << 2) 102#define MVSD_XFER_MODE_INT_CHK_EN (1 << 3) 103#define MVSD_XFER_MODE_TO_HOST (1 << 4) 104#define MVSD_XFER_MODE_STOP_CLK (1 << 5) 105#define MVSD_XFER_MODE_PIO (1 << 6) 106 107 108/* 109 * MVSD_HOST_CTRL 110 */ 111 112#define MVSD_HOST_CTRL_PUSH_PULL_EN (1 << 0) 113 114#define MVSD_HOST_CTRL_CARD_TYPE_MEM_ONLY (0 << 1) 115#define MVSD_HOST_CTRL_CARD_TYPE_IO_ONLY (1 << 1) 116#define MVSD_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO (2 << 1) 117#define MVSD_HOST_CTRL_CARD_TYPE_IO_MMC (3 << 1) 118#define MVSD_HOST_CTRL_CARD_TYPE_MASK (3 << 1) 119 120#define MVSD_HOST_CTRL_BIG_ENDIAN (1 << 3) 121#define MVSD_HOST_CTRL_LSB_FIRST (1 << 4) 122#define MVSD_HOST_CTRL_DATA_WIDTH_4_BITS (1 << 9) 123#define MVSD_HOST_CTRL_HI_SPEED_EN (1 << 10) 124 125#define MVSD_HOST_CTRL_TMOUT_MAX 0xf 126#define MVSD_HOST_CTRL_TMOUT_MASK (0xf << 11) 127#define MVSD_HOST_CTRL_TMOUT(x) ((x) << 11) 128#define MVSD_HOST_CTRL_TMOUT_EN (1 << 15) 129 130 131/* 132 * MVSD_SW_RESET 133 */ 134 135#define MVSD_SW_RESET_NOW (1 << 8) 136 137 138/* 139 * Normal interrupt status bits 140 */ 141 142#define MVSD_NOR_CMD_DONE (1 << 0) 143#define MVSD_NOR_XFER_DONE (1 << 1) 144#define MVSD_NOR_BLK_GAP_EVT (1 << 2) 145#define MVSD_NOR_DMA_DONE (1 << 3) 146#define MVSD_NOR_TX_AVAIL (1 << 4) 147#define MVSD_NOR_RX_READY (1 << 5) 148#define MVSD_NOR_CARD_INT (1 << 8) 149#define MVSD_NOR_READ_WAIT_ON (1 << 9) 150#define MVSD_NOR_RX_FIFO_8W (1 << 10) 151#define MVSD_NOR_TX_FIFO_8W (1 << 11) 152#define MVSD_NOR_SUSPEND_ON (1 << 12) 153#define MVSD_NOR_AUTOCMD12_DONE (1 << 13) 154#define MVSD_NOR_UNEXP_RSP (1 << 14) 155#define MVSD_NOR_ERROR (1 << 15) 156 157 158/* 159 * Error status bits 160 */ 161 162#define MVSD_ERR_CMD_TIMEOUT (1 << 0) 163#define MVSD_ERR_CMD_CRC (1 << 1) 164#define MVSD_ERR_CMD_ENDBIT (1 << 2) 165#define MVSD_ERR_CMD_INDEX (1 << 3) 166#define MVSD_ERR_DATA_TIMEOUT (1 << 4) 167#define MVSD_ERR_DATA_CRC (1 << 5) 168#define MVSD_ERR_DATA_ENDBIT (1 << 6) 169#define MVSD_ERR_AUTOCMD12 (1 << 8) 170#define MVSD_ERR_CMD_STARTBIT (1 << 9) 171#define MVSD_ERR_XFER_SIZE (1 << 10) 172#define MVSD_ERR_RESP_T_BIT (1 << 11) 173#define MVSD_ERR_CRC_ENDBIT (1 << 12) 174#define MVSD_ERR_CRC_STARTBIT (1 << 13) 175#define MVSD_ERR_CRC_STATUS (1 << 14) 176 177 178/* 179 * CMD12 error status bits 180 */ 181 182#define MVSD_AUTOCMD12_ERR_NOTEXE (1 << 0) 183#define MVSD_AUTOCMD12_ERR_TIMEOUT (1 << 1) 184#define MVSD_AUTOCMD12_ERR_CRC (1 << 2) 185#define MVSD_AUTOCMD12_ERR_ENDBIT (1 << 3) 186#define MVSD_AUTOCMD12_ERR_INDEX (1 << 4) 187#define MVSD_AUTOCMD12_ERR_RESP_T_BIT (1 << 5) 188#define MVSD_AUTOCMD12_ERR_RESP_STARTBIT (1 << 6) 189 190#endif 191