1/* 2 * linux/drivers/mfd/ucb1x00-core.c 3 * 4 * Copyright (C) 2001 Russell King, All Rights Reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License. 9 * 10 * The UCB1x00 core driver provides basic services for handling IO, 11 * the ADC, interrupts, and accessing registers. It is designed 12 * such that everything goes through this layer, thereby providing 13 * a consistent locking methodology, as well as allowing the drivers 14 * to be used on other non-MCP-enabled hardware platforms. 15 * 16 * Note that all locks are private to this file. Nothing else may 17 * touch them. 18 */ 19#include <linux/module.h> 20#include <linux/kernel.h> 21#include <linux/sched.h> 22#include <linux/slab.h> 23#include <linux/init.h> 24#include <linux/errno.h> 25#include <linux/interrupt.h> 26#include <linux/device.h> 27#include <linux/mutex.h> 28#include <linux/mfd/ucb1x00.h> 29#include <linux/gpio.h> 30#include <linux/semaphore.h> 31 32#include <mach/dma.h> 33#include <mach/hardware.h> 34 35static DEFINE_MUTEX(ucb1x00_mutex); 36static LIST_HEAD(ucb1x00_drivers); 37static LIST_HEAD(ucb1x00_devices); 38 39/** 40 * ucb1x00_io_set_dir - set IO direction 41 * @ucb: UCB1x00 structure describing chip 42 * @in: bitfield of IO pins to be set as inputs 43 * @out: bitfield of IO pins to be set as outputs 44 * 45 * Set the IO direction of the ten general purpose IO pins on 46 * the UCB1x00 chip. The @in bitfield has priority over the 47 * @out bitfield, in that if you specify a pin as both input 48 * and output, it will end up as an input. 49 * 50 * ucb1x00_enable must have been called to enable the comms 51 * before using this function. 52 * 53 * This function takes a spinlock, disabling interrupts. 54 */ 55void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int in, unsigned int out) 56{ 57 unsigned long flags; 58 59 spin_lock_irqsave(&ucb->io_lock, flags); 60 ucb->io_dir |= out; 61 ucb->io_dir &= ~in; 62 63 ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); 64 spin_unlock_irqrestore(&ucb->io_lock, flags); 65} 66 67/** 68 * ucb1x00_io_write - set or clear IO outputs 69 * @ucb: UCB1x00 structure describing chip 70 * @set: bitfield of IO pins to set to logic '1' 71 * @clear: bitfield of IO pins to set to logic '0' 72 * 73 * Set the IO output state of the specified IO pins. The value 74 * is retained if the pins are subsequently configured as inputs. 75 * The @clear bitfield has priority over the @set bitfield - 76 * outputs will be cleared. 77 * 78 * ucb1x00_enable must have been called to enable the comms 79 * before using this function. 80 * 81 * This function takes a spinlock, disabling interrupts. 82 */ 83void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int set, unsigned int clear) 84{ 85 unsigned long flags; 86 87 spin_lock_irqsave(&ucb->io_lock, flags); 88 ucb->io_out |= set; 89 ucb->io_out &= ~clear; 90 91 ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out); 92 spin_unlock_irqrestore(&ucb->io_lock, flags); 93} 94 95/** 96 * ucb1x00_io_read - read the current state of the IO pins 97 * @ucb: UCB1x00 structure describing chip 98 * 99 * Return a bitfield describing the logic state of the ten 100 * general purpose IO pins. 101 * 102 * ucb1x00_enable must have been called to enable the comms 103 * before using this function. 104 * 105 * This function does not take any semaphores or spinlocks. 106 */ 107unsigned int ucb1x00_io_read(struct ucb1x00 *ucb) 108{ 109 return ucb1x00_reg_read(ucb, UCB_IO_DATA); 110} 111 112static void ucb1x00_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 113{ 114 struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); 115 unsigned long flags; 116 117 spin_lock_irqsave(&ucb->io_lock, flags); 118 if (value) 119 ucb->io_out |= 1 << offset; 120 else 121 ucb->io_out &= ~(1 << offset); 122 123 ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out); 124 spin_unlock_irqrestore(&ucb->io_lock, flags); 125} 126 127static int ucb1x00_gpio_get(struct gpio_chip *chip, unsigned offset) 128{ 129 struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); 130 return ucb1x00_reg_read(ucb, UCB_IO_DATA) & (1 << offset); 131} 132 133static int ucb1x00_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 134{ 135 struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); 136 unsigned long flags; 137 138 spin_lock_irqsave(&ucb->io_lock, flags); 139 ucb->io_dir &= ~(1 << offset); 140 ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); 141 spin_unlock_irqrestore(&ucb->io_lock, flags); 142 143 return 0; 144} 145 146static int ucb1x00_gpio_direction_output(struct gpio_chip *chip, unsigned offset 147 , int value) 148{ 149 struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); 150 unsigned long flags; 151 152 spin_lock_irqsave(&ucb->io_lock, flags); 153 ucb->io_dir |= (1 << offset); 154 ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); 155 156 if (value) 157 ucb->io_out |= 1 << offset; 158 else 159 ucb->io_out &= ~(1 << offset); 160 ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out); 161 spin_unlock_irqrestore(&ucb->io_lock, flags); 162 163 return 0; 164} 165 166/* 167 * UCB1300 data sheet says we must: 168 * 1. enable ADC => 5us (including reference startup time) 169 * 2. select input => 51*tsibclk => 4.3us 170 * 3. start conversion => 102*tsibclk => 8.5us 171 * (tsibclk = 1/11981000) 172 * Period between SIB 128-bit frames = 10.7us 173 */ 174 175/** 176 * ucb1x00_adc_enable - enable the ADC converter 177 * @ucb: UCB1x00 structure describing chip 178 * 179 * Enable the ucb1x00 and ADC converter on the UCB1x00 for use. 180 * Any code wishing to use the ADC converter must call this 181 * function prior to using it. 182 * 183 * This function takes the ADC semaphore to prevent two or more 184 * concurrent uses, and therefore may sleep. As a result, it 185 * can only be called from process context, not interrupt 186 * context. 187 * 188 * You should release the ADC as soon as possible using 189 * ucb1x00_adc_disable. 190 */ 191void ucb1x00_adc_enable(struct ucb1x00 *ucb) 192{ 193 down(&ucb->adc_sem); 194 195 ucb->adc_cr |= UCB_ADC_ENA; 196 197 ucb1x00_enable(ucb); 198 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr); 199} 200 201/** 202 * ucb1x00_adc_read - read the specified ADC channel 203 * @ucb: UCB1x00 structure describing chip 204 * @adc_channel: ADC channel mask 205 * @sync: wait for syncronisation pulse. 206 * 207 * Start an ADC conversion and wait for the result. Note that 208 * synchronised ADC conversions (via the ADCSYNC pin) must wait 209 * until the trigger is asserted and the conversion is finished. 210 * 211 * This function currently spins waiting for the conversion to 212 * complete (2 frames max without sync). 213 * 214 * If called for a synchronised ADC conversion, it may sleep 215 * with the ADC semaphore held. 216 */ 217unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync) 218{ 219 unsigned int val; 220 221 if (sync) 222 adc_channel |= UCB_ADC_SYNC_ENA; 223 224 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel); 225 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START); 226 227 for (;;) { 228 val = ucb1x00_reg_read(ucb, UCB_ADC_DATA); 229 if (val & UCB_ADC_DAT_VAL) 230 break; 231 /* yield to other processes */ 232 set_current_state(TASK_INTERRUPTIBLE); 233 schedule_timeout(1); 234 } 235 236 return UCB_ADC_DAT(val); 237} 238 239/** 240 * ucb1x00_adc_disable - disable the ADC converter 241 * @ucb: UCB1x00 structure describing chip 242 * 243 * Disable the ADC converter and release the ADC semaphore. 244 */ 245void ucb1x00_adc_disable(struct ucb1x00 *ucb) 246{ 247 ucb->adc_cr &= ~UCB_ADC_ENA; 248 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr); 249 ucb1x00_disable(ucb); 250 251 up(&ucb->adc_sem); 252} 253 254/* 255 * UCB1x00 Interrupt handling. 256 * 257 * The UCB1x00 can generate interrupts when the SIBCLK is stopped. 258 * Since we need to read an internal register, we must re-enable 259 * SIBCLK to talk to the chip. We leave the clock running until 260 * we have finished processing all interrupts from the chip. 261 */ 262static irqreturn_t ucb1x00_irq(int irqnr, void *devid) 263{ 264 struct ucb1x00 *ucb = devid; 265 struct ucb1x00_irq *irq; 266 unsigned int isr, i; 267 268 ucb1x00_enable(ucb); 269 isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS); 270 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr); 271 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0); 272 273 for (i = 0, irq = ucb->irq_handler; i < 16 && isr; i++, isr >>= 1, irq++) 274 if (isr & 1 && irq->fn) 275 irq->fn(i, irq->devid); 276 ucb1x00_disable(ucb); 277 278 return IRQ_HANDLED; 279} 280 281/** 282 * ucb1x00_hook_irq - hook a UCB1x00 interrupt 283 * @ucb: UCB1x00 structure describing chip 284 * @idx: interrupt index 285 * @fn: function to call when interrupt is triggered 286 * @devid: device id to pass to interrupt handler 287 * 288 * Hook the specified interrupt. You can only register one handler 289 * for each interrupt source. The interrupt source is not enabled 290 * by this function; use ucb1x00_enable_irq instead. 291 * 292 * Interrupt handlers will be called with other interrupts enabled. 293 * 294 * Returns zero on success, or one of the following errors: 295 * -EINVAL if the interrupt index is invalid 296 * -EBUSY if the interrupt has already been hooked 297 */ 298int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid) 299{ 300 struct ucb1x00_irq *irq; 301 int ret = -EINVAL; 302 303 if (idx < 16) { 304 irq = ucb->irq_handler + idx; 305 ret = -EBUSY; 306 307 spin_lock_irq(&ucb->lock); 308 if (irq->fn == NULL) { 309 irq->devid = devid; 310 irq->fn = fn; 311 ret = 0; 312 } 313 spin_unlock_irq(&ucb->lock); 314 } 315 return ret; 316} 317 318/** 319 * ucb1x00_enable_irq - enable an UCB1x00 interrupt source 320 * @ucb: UCB1x00 structure describing chip 321 * @idx: interrupt index 322 * @edges: interrupt edges to enable 323 * 324 * Enable the specified interrupt to trigger on %UCB_RISING, 325 * %UCB_FALLING or both edges. The interrupt should have been 326 * hooked by ucb1x00_hook_irq. 327 */ 328void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges) 329{ 330 unsigned long flags; 331 332 if (idx < 16) { 333 spin_lock_irqsave(&ucb->lock, flags); 334 335 ucb1x00_enable(ucb); 336 if (edges & UCB_RISING) { 337 ucb->irq_ris_enbl |= 1 << idx; 338 ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl); 339 } 340 if (edges & UCB_FALLING) { 341 ucb->irq_fal_enbl |= 1 << idx; 342 ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl); 343 } 344 ucb1x00_disable(ucb); 345 spin_unlock_irqrestore(&ucb->lock, flags); 346 } 347} 348 349/** 350 * ucb1x00_disable_irq - disable an UCB1x00 interrupt source 351 * @ucb: UCB1x00 structure describing chip 352 * @edges: interrupt edges to disable 353 * 354 * Disable the specified interrupt triggering on the specified 355 * (%UCB_RISING, %UCB_FALLING or both) edges. 356 */ 357void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges) 358{ 359 unsigned long flags; 360 361 if (idx < 16) { 362 spin_lock_irqsave(&ucb->lock, flags); 363 364 ucb1x00_enable(ucb); 365 if (edges & UCB_RISING) { 366 ucb->irq_ris_enbl &= ~(1 << idx); 367 ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl); 368 } 369 if (edges & UCB_FALLING) { 370 ucb->irq_fal_enbl &= ~(1 << idx); 371 ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl); 372 } 373 ucb1x00_disable(ucb); 374 spin_unlock_irqrestore(&ucb->lock, flags); 375 } 376} 377 378/** 379 * ucb1x00_free_irq - disable and free the specified UCB1x00 interrupt 380 * @ucb: UCB1x00 structure describing chip 381 * @idx: interrupt index 382 * @devid: device id. 383 * 384 * Disable the interrupt source and remove the handler. devid must 385 * match the devid passed when hooking the interrupt. 386 * 387 * Returns zero on success, or one of the following errors: 388 * -EINVAL if the interrupt index is invalid 389 * -ENOENT if devid does not match 390 */ 391int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid) 392{ 393 struct ucb1x00_irq *irq; 394 int ret; 395 396 if (idx >= 16) 397 goto bad; 398 399 irq = ucb->irq_handler + idx; 400 ret = -ENOENT; 401 402 spin_lock_irq(&ucb->lock); 403 if (irq->devid == devid) { 404 ucb->irq_ris_enbl &= ~(1 << idx); 405 ucb->irq_fal_enbl &= ~(1 << idx); 406 407 ucb1x00_enable(ucb); 408 ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl); 409 ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl); 410 ucb1x00_disable(ucb); 411 412 irq->fn = NULL; 413 irq->devid = NULL; 414 ret = 0; 415 } 416 spin_unlock_irq(&ucb->lock); 417 return ret; 418 419bad: 420 printk(KERN_ERR "Freeing bad UCB1x00 irq %d\n", idx); 421 return -EINVAL; 422} 423 424static int ucb1x00_add_dev(struct ucb1x00 *ucb, struct ucb1x00_driver *drv) 425{ 426 struct ucb1x00_dev *dev; 427 int ret = -ENOMEM; 428 429 dev = kmalloc(sizeof(struct ucb1x00_dev), GFP_KERNEL); 430 if (dev) { 431 dev->ucb = ucb; 432 dev->drv = drv; 433 434 ret = drv->add(dev); 435 436 if (ret == 0) { 437 list_add(&dev->dev_node, &ucb->devs); 438 list_add(&dev->drv_node, &drv->devs); 439 } else { 440 kfree(dev); 441 } 442 } 443 return ret; 444} 445 446static void ucb1x00_remove_dev(struct ucb1x00_dev *dev) 447{ 448 dev->drv->remove(dev); 449 list_del(&dev->dev_node); 450 list_del(&dev->drv_node); 451 kfree(dev); 452} 453 454/* 455 * Try to probe our interrupt, rather than relying on lots of 456 * hard-coded machine dependencies. For reference, the expected 457 * IRQ mappings are: 458 * 459 * Machine Default IRQ 460 * adsbitsy IRQ_GPCIN4 461 * cerf IRQ_GPIO_UCB1200_IRQ 462 * flexanet IRQ_GPIO_GUI 463 * freebird IRQ_GPIO_FREEBIRD_UCB1300_IRQ 464 * graphicsclient ADS_EXT_IRQ(8) 465 * graphicsmaster ADS_EXT_IRQ(8) 466 * lart LART_IRQ_UCB1200 467 * omnimeter IRQ_GPIO23 468 * pfs168 IRQ_GPIO_UCB1300_IRQ 469 * simpad IRQ_GPIO_UCB1300_IRQ 470 * shannon SHANNON_IRQ_GPIO_IRQ_CODEC 471 * yopy IRQ_GPIO_UCB1200_IRQ 472 */ 473static int ucb1x00_detect_irq(struct ucb1x00 *ucb) 474{ 475 unsigned long mask; 476 477 mask = probe_irq_on(); 478 if (!mask) { 479 probe_irq_off(mask); 480 return NO_IRQ; 481 } 482 483 /* 484 * Enable the ADC interrupt. 485 */ 486 ucb1x00_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC); 487 ucb1x00_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC); 488 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff); 489 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0); 490 491 /* 492 * Cause an ADC interrupt. 493 */ 494 ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA); 495 ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); 496 497 /* 498 * Wait for the conversion to complete. 499 */ 500 while ((ucb1x00_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VAL) == 0); 501 ucb1x00_reg_write(ucb, UCB_ADC_CR, 0); 502 503 /* 504 * Disable and clear interrupt. 505 */ 506 ucb1x00_reg_write(ucb, UCB_IE_RIS, 0); 507 ucb1x00_reg_write(ucb, UCB_IE_FAL, 0); 508 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff); 509 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0); 510 511 /* 512 * Read triggered interrupt. 513 */ 514 return probe_irq_off(mask); 515} 516 517static void ucb1x00_release(struct device *dev) 518{ 519 struct ucb1x00 *ucb = classdev_to_ucb1x00(dev); 520 kfree(ucb); 521} 522 523static struct class ucb1x00_class = { 524 .name = "ucb1x00", 525 .dev_release = ucb1x00_release, 526}; 527 528static int ucb1x00_probe(struct mcp *mcp) 529{ 530 struct ucb1x00 *ucb; 531 struct ucb1x00_driver *drv; 532 unsigned int id; 533 int ret = -ENODEV; 534 int temp; 535 536 mcp_enable(mcp); 537 id = mcp_reg_read(mcp, UCB_ID); 538 539 if (id != UCB_ID_1200 && id != UCB_ID_1300 && id != UCB_ID_TC35143) { 540 printk(KERN_WARNING "UCB1x00 ID not found: %04x\n", id); 541 goto err_disable; 542 } 543 544 ucb = kzalloc(sizeof(struct ucb1x00), GFP_KERNEL); 545 ret = -ENOMEM; 546 if (!ucb) 547 goto err_disable; 548 549 550 ucb->dev.class = &ucb1x00_class; 551 ucb->dev.parent = &mcp->attached_device; 552 dev_set_name(&ucb->dev, "ucb1x00"); 553 554 spin_lock_init(&ucb->lock); 555 spin_lock_init(&ucb->io_lock); 556 sema_init(&ucb->adc_sem, 1); 557 558 ucb->id = id; 559 ucb->mcp = mcp; 560 ucb->irq = ucb1x00_detect_irq(ucb); 561 if (ucb->irq == NO_IRQ) { 562 printk(KERN_ERR "UCB1x00: IRQ probe failed\n"); 563 ret = -ENODEV; 564 goto err_free; 565 } 566 567 ucb->gpio.base = -1; 568 if (mcp->gpio_base != 0) { 569 ucb->gpio.label = dev_name(&ucb->dev); 570 ucb->gpio.base = mcp->gpio_base; 571 ucb->gpio.ngpio = 10; 572 ucb->gpio.set = ucb1x00_gpio_set; 573 ucb->gpio.get = ucb1x00_gpio_get; 574 ucb->gpio.direction_input = ucb1x00_gpio_direction_input; 575 ucb->gpio.direction_output = ucb1x00_gpio_direction_output; 576 ret = gpiochip_add(&ucb->gpio); 577 if (ret) 578 goto err_free; 579 } else 580 dev_info(&ucb->dev, "gpio_base not set so no gpiolib support"); 581 582 ret = request_irq(ucb->irq, ucb1x00_irq, IRQF_TRIGGER_RISING, 583 "UCB1x00", ucb); 584 if (ret) { 585 printk(KERN_ERR "ucb1x00: unable to grab irq%d: %d\n", 586 ucb->irq, ret); 587 goto err_gpio; 588 } 589 590 mcp_set_drvdata(mcp, ucb); 591 592 ret = device_register(&ucb->dev); 593 if (ret) 594 goto err_irq; 595 596 597 INIT_LIST_HEAD(&ucb->devs); 598 mutex_lock(&ucb1x00_mutex); 599 list_add(&ucb->node, &ucb1x00_devices); 600 list_for_each_entry(drv, &ucb1x00_drivers, node) { 601 ucb1x00_add_dev(ucb, drv); 602 } 603 mutex_unlock(&ucb1x00_mutex); 604 605 goto out; 606 607 err_irq: 608 free_irq(ucb->irq, ucb); 609 err_gpio: 610 if (ucb->gpio.base != -1) 611 temp = gpiochip_remove(&ucb->gpio); 612 err_free: 613 kfree(ucb); 614 err_disable: 615 mcp_disable(mcp); 616 out: 617 return ret; 618} 619 620static void ucb1x00_remove(struct mcp *mcp) 621{ 622 struct ucb1x00 *ucb = mcp_get_drvdata(mcp); 623 struct list_head *l, *n; 624 int ret; 625 626 mutex_lock(&ucb1x00_mutex); 627 list_del(&ucb->node); 628 list_for_each_safe(l, n, &ucb->devs) { 629 struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, dev_node); 630 ucb1x00_remove_dev(dev); 631 } 632 mutex_unlock(&ucb1x00_mutex); 633 634 if (ucb->gpio.base != -1) { 635 ret = gpiochip_remove(&ucb->gpio); 636 if (ret) 637 dev_err(&ucb->dev, "Can't remove gpio chip: %d\n", ret); 638 } 639 640 free_irq(ucb->irq, ucb); 641 device_unregister(&ucb->dev); 642} 643 644int ucb1x00_register_driver(struct ucb1x00_driver *drv) 645{ 646 struct ucb1x00 *ucb; 647 648 INIT_LIST_HEAD(&drv->devs); 649 mutex_lock(&ucb1x00_mutex); 650 list_add(&drv->node, &ucb1x00_drivers); 651 list_for_each_entry(ucb, &ucb1x00_devices, node) { 652 ucb1x00_add_dev(ucb, drv); 653 } 654 mutex_unlock(&ucb1x00_mutex); 655 return 0; 656} 657 658void ucb1x00_unregister_driver(struct ucb1x00_driver *drv) 659{ 660 struct list_head *n, *l; 661 662 mutex_lock(&ucb1x00_mutex); 663 list_del(&drv->node); 664 list_for_each_safe(l, n, &drv->devs) { 665 struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, drv_node); 666 ucb1x00_remove_dev(dev); 667 } 668 mutex_unlock(&ucb1x00_mutex); 669} 670 671static int ucb1x00_suspend(struct mcp *mcp, pm_message_t state) 672{ 673 struct ucb1x00 *ucb = mcp_get_drvdata(mcp); 674 struct ucb1x00_dev *dev; 675 676 mutex_lock(&ucb1x00_mutex); 677 list_for_each_entry(dev, &ucb->devs, dev_node) { 678 if (dev->drv->suspend) 679 dev->drv->suspend(dev, state); 680 } 681 mutex_unlock(&ucb1x00_mutex); 682 return 0; 683} 684 685static int ucb1x00_resume(struct mcp *mcp) 686{ 687 struct ucb1x00 *ucb = mcp_get_drvdata(mcp); 688 struct ucb1x00_dev *dev; 689 690 ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); 691 mutex_lock(&ucb1x00_mutex); 692 list_for_each_entry(dev, &ucb->devs, dev_node) { 693 if (dev->drv->resume) 694 dev->drv->resume(dev); 695 } 696 mutex_unlock(&ucb1x00_mutex); 697 return 0; 698} 699 700static struct mcp_driver ucb1x00_driver = { 701 .drv = { 702 .name = "ucb1x00", 703 }, 704 .probe = ucb1x00_probe, 705 .remove = ucb1x00_remove, 706 .suspend = ucb1x00_suspend, 707 .resume = ucb1x00_resume, 708}; 709 710static int __init ucb1x00_init(void) 711{ 712 int ret = class_register(&ucb1x00_class); 713 if (ret == 0) { 714 ret = mcp_driver_register(&ucb1x00_driver); 715 if (ret) 716 class_unregister(&ucb1x00_class); 717 } 718 return ret; 719} 720 721static void __exit ucb1x00_exit(void) 722{ 723 mcp_driver_unregister(&ucb1x00_driver); 724 class_unregister(&ucb1x00_class); 725} 726 727module_init(ucb1x00_init); 728module_exit(ucb1x00_exit); 729 730EXPORT_SYMBOL(ucb1x00_io_set_dir); 731EXPORT_SYMBOL(ucb1x00_io_write); 732EXPORT_SYMBOL(ucb1x00_io_read); 733 734EXPORT_SYMBOL(ucb1x00_adc_enable); 735EXPORT_SYMBOL(ucb1x00_adc_read); 736EXPORT_SYMBOL(ucb1x00_adc_disable); 737 738EXPORT_SYMBOL(ucb1x00_hook_irq); 739EXPORT_SYMBOL(ucb1x00_free_irq); 740EXPORT_SYMBOL(ucb1x00_enable_irq); 741EXPORT_SYMBOL(ucb1x00_disable_irq); 742 743EXPORT_SYMBOL(ucb1x00_register_driver); 744EXPORT_SYMBOL(ucb1x00_unregister_driver); 745 746MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); 747MODULE_DESCRIPTION("UCB1x00 core driver"); 748MODULE_LICENSE("GPL"); 749