• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/media/dvb/frontends/
1/*
2 *    Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
3 *    ATBM8830, ATBM8831
4 *
5 *    Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
6 *
7 *    This program is free software; you can redistribute it and/or modify
8 *    it under the terms of the GNU General Public License as published by
9 *    the Free Software Foundation; either version 2 of the License, or
10 *    (at your option) any later version.
11 *
12 *    This program is distributed in the hope that it will be useful,
13 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
14 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 *    GNU General Public License for more details.
16 *
17 *    You should have received a copy of the GNU General Public License
18 *    along with this program; if not, write to the Free Software
19 *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef __ATBM8830_PRIV_H
23#define __ATBM8830_PRIV_H
24
25struct atbm_state {
26	struct i2c_adapter *i2c;
27	/* configuration settings */
28	const struct atbm8830_config *config;
29	struct dvb_frontend frontend;
30};
31
32#define REG_CHIP_ID	0x0000
33#define REG_TUNER_BASEBAND	0x0001
34#define REG_DEMOD_RUN	0x0004
35#define REG_DSP_RESET	0x0005
36#define REG_RAM_RESET	0x0006
37#define REG_ADC_RESET	0x0007
38#define REG_TSPORT_RESET	0x0008
39#define REG_BLKERR_POL	0x000C
40#define REG_I2C_GATE	0x0103
41#define REG_TS_SAMPLE_EDGE	0x0301
42#define REG_TS_PKT_LEN_204	0x0302
43#define REG_TS_PKT_LEN_AUTO	0x0303
44#define REG_TS_SERIAL	0x0305
45#define REG_TS_CLK_FREERUN	0x0306
46#define REG_TS_VALID_MODE	0x0307
47#define REG_TS_CLK_MODE	0x030B /* 1 for serial, 0 for parallel */
48
49#define REG_TS_ERRBIT_USE	0x030C
50#define REG_LOCK_STATUS	0x030D
51#define REG_ADC_CONFIG	0x0602
52#define REG_CARRIER_OFFSET	0x0827 /* 0x0827-0x0829 little endian */
53#define REG_DETECTED_PN_MODE	0x082D
54#define REG_READ_LATCH	0x084D
55#define REG_IF_FREQ	0x0A00 /* 0x0A00-0x0A02 little endian */
56#define REG_OSC_CLK	0x0A03 /* 0x0A03-0x0A05 little endian */
57#define REG_BYPASS_CCI	0x0A06
58#define REG_ANALOG_LUMA_DETECTED	0x0A25
59#define REG_ANALOG_AUDIO_DETECTED	0x0A26
60#define REG_ANALOG_CHROMA_DETECTED	0x0A39
61#define REG_FRAME_ERR_CNT	0x0B04
62#define REG_USE_EXT_ADC	0x0C00
63#define REG_SWAP_I_Q	0x0C01
64#define REG_TPS_MANUAL	0x0D01
65#define REG_TPS_CONFIG	0x0D02
66#define REG_BYPASS_DEINTERLEAVER	0x0E00
67#define REG_AGC_TARGET	0x1003 /* 0x1003-0x1005 little endian */
68#define REG_AGC_MIN	0x1020
69#define REG_AGC_MAX	0x1023
70#define REG_AGC_LOCK	0x1027
71#define REG_AGC_PWM_VAL	0x1028 /* 0x1028-0x1029 little endian */
72#define REG_AGC_HOLD_LOOP	0x1031
73
74#endif
75