1#include <media/saa7146_vv.h> 2 3static u32 saa7146_i2c_func(struct i2c_adapter *adapter) 4{ 5//fm DEB_I2C(("'%s'.\n", adapter->name)); 6 7 return I2C_FUNC_I2C 8 | I2C_FUNC_SMBUS_QUICK 9 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE 10 | I2C_FUNC_SMBUS_READ_BYTE_DATA | I2C_FUNC_SMBUS_WRITE_BYTE_DATA; 11} 12 13/* this function returns the status-register of our i2c-device */ 14static inline u32 saa7146_i2c_status(struct saa7146_dev *dev) 15{ 16 u32 iicsta = saa7146_read(dev, I2C_STATUS); 17/* 18 DEB_I2C(("status: 0x%08x\n",iicsta)); 19*/ 20 return iicsta; 21} 22 23/* this function runs through the i2c-messages and prepares the data to be 24 sent through the saa7146. have a look at the specifications p. 122 ff 25 to understand this. it returns the number of u32s to send, or -1 26 in case of an error. */ 27static int saa7146_i2c_msg_prepare(const struct i2c_msg *m, int num, __le32 *op) 28{ 29 int h1, h2; 30 int i, j, addr; 31 int mem = 0, op_count = 0; 32 33 /* first determine size of needed memory */ 34 for(i = 0; i < num; i++) { 35 mem += m[i].len + 1; 36 } 37 38 /* worst case: we need one u32 for three bytes to be send 39 plus one extra byte to address the device */ 40 mem = 1 + ((mem-1) / 3); 41 42 /* we assume that op points to a memory of at least SAA7146_I2C_MEM bytes 43 size. if we exceed this limit... */ 44 if ( (4*mem) > SAA7146_I2C_MEM ) { 45//fm DEB_I2C(("cannot prepare i2c-message.\n")); 46 return -ENOMEM; 47 } 48 49 /* be careful: clear out the i2c-mem first */ 50 memset(op,0,sizeof(__le32)*mem); 51 52 /* loop through all messages */ 53 for(i = 0; i < num; i++) { 54 55 /* insert the address of the i2c-slave. 56 note: we get 7 bit i2c-addresses, 57 so we have to perform a translation */ 58 addr = (m[i].addr*2) + ( (0 != (m[i].flags & I2C_M_RD)) ? 1 : 0); 59 h1 = op_count/3; h2 = op_count%3; 60 op[h1] |= cpu_to_le32( (u8)addr << ((3-h2)*8)); 61 op[h1] |= cpu_to_le32(SAA7146_I2C_START << ((3-h2)*2)); 62 op_count++; 63 64 /* loop through all bytes of message i */ 65 for(j = 0; j < m[i].len; j++) { 66 /* insert the data bytes */ 67 h1 = op_count/3; h2 = op_count%3; 68 op[h1] |= cpu_to_le32( (u32)((u8)m[i].buf[j]) << ((3-h2)*8)); 69 op[h1] |= cpu_to_le32( SAA7146_I2C_CONT << ((3-h2)*2)); 70 op_count++; 71 } 72 73 } 74 75 /* have a look at the last byte inserted: 76 if it was: ...CONT change it to ...STOP */ 77 h1 = (op_count-1)/3; h2 = (op_count-1)%3; 78 if ( SAA7146_I2C_CONT == (0x3 & (le32_to_cpu(op[h1]) >> ((3-h2)*2))) ) { 79 op[h1] &= ~cpu_to_le32(0x2 << ((3-h2)*2)); 80 op[h1] |= cpu_to_le32(SAA7146_I2C_STOP << ((3-h2)*2)); 81 } 82 83 /* return the number of u32s to send */ 84 return mem; 85} 86 87static int saa7146_i2c_msg_cleanup(const struct i2c_msg *m, int num, __le32 *op) 88{ 89 int i, j; 90 int op_count = 0; 91 92 /* loop through all messages */ 93 for(i = 0; i < num; i++) { 94 95 op_count++; 96 97 /* loop through all bytes of message i */ 98 for(j = 0; j < m[i].len; j++) { 99 /* write back all bytes that could have been read */ 100 m[i].buf[j] = (le32_to_cpu(op[op_count/3]) >> ((3-(op_count%3))*8)); 101 op_count++; 102 } 103 } 104 105 return 0; 106} 107 108/* this functions resets the i2c-device and returns 0 if everything was fine, otherwise -1 */ 109static int saa7146_i2c_reset(struct saa7146_dev *dev) 110{ 111 /* get current status */ 112 u32 status = saa7146_i2c_status(dev); 113 114 /* clear registers for sure */ 115 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 116 saa7146_write(dev, I2C_TRANSFER, 0); 117 118 /* check if any operation is still in progress */ 119 if ( 0 != ( status & SAA7146_I2C_BUSY) ) { 120 121 /* yes, kill ongoing operation */ 122 DEB_I2C(("busy_state detected.\n")); 123 124 /* set "ABORT-OPERATION"-bit (bit 7)*/ 125 saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07)); 126 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 127 msleep(SAA7146_I2C_DELAY); 128 129 /* clear all error-bits pending; this is needed because p.123, note 1 */ 130 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 131 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 132 msleep(SAA7146_I2C_DELAY); 133 } 134 135 /* check if any error is (still) present. (this can be necessary because p.123, note 1) */ 136 status = saa7146_i2c_status(dev); 137 138 if ( dev->i2c_bitrate != status ) { 139 140 DEB_I2C(("error_state detected. status:0x%08x\n",status)); 141 142 /* Repeat the abort operation. This seems to be necessary 143 after serious protocol errors caused by e.g. the SAA7740 */ 144 saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07)); 145 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 146 msleep(SAA7146_I2C_DELAY); 147 148 /* clear all error-bits pending */ 149 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 150 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 151 msleep(SAA7146_I2C_DELAY); 152 153 /* the data sheet says it might be necessary to clear the status 154 twice after an abort */ 155 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 156 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 157 msleep(SAA7146_I2C_DELAY); 158 } 159 160 /* if any error is still present, a fatal error has occured ... */ 161 status = saa7146_i2c_status(dev); 162 if ( dev->i2c_bitrate != status ) { 163 DEB_I2C(("fatal error. status:0x%08x\n",status)); 164 return -1; 165 } 166 167 return 0; 168} 169 170/* this functions writes out the data-byte 'dword' to the i2c-device. 171 it returns 0 if ok, -1 if the transfer failed, -2 if the transfer 172 failed badly (e.g. address error) */ 173static int saa7146_i2c_writeout(struct saa7146_dev *dev, __le32 *dword, int short_delay) 174{ 175 u32 status = 0, mc2 = 0; 176 int trial = 0; 177 unsigned long timeout; 178 179 /* write out i2c-command */ 180 DEB_I2C(("before: 0x%08x (status: 0x%08x), %d\n",*dword,saa7146_read(dev, I2C_STATUS), dev->i2c_op)); 181 182 if( 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags)) { 183 184 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 185 saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword)); 186 187 dev->i2c_op = 1; 188 SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17); 189 SAA7146_IER_ENABLE(dev, MASK_16|MASK_17); 190 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 191 192 timeout = HZ/100 + 1; /* 10ms */ 193 timeout = wait_event_interruptible_timeout(dev->i2c_wq, dev->i2c_op == 0, timeout); 194 if (timeout == -ERESTARTSYS || dev->i2c_op) { 195 SAA7146_IER_DISABLE(dev, MASK_16|MASK_17); 196 SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17); 197 if (timeout == -ERESTARTSYS) 198 /* a signal arrived */ 199 return -ERESTARTSYS; 200 201 printk(KERN_WARNING "%s %s [irq]: timed out waiting for end of xfer\n", 202 dev->name, __func__); 203 return -EIO; 204 } 205 status = saa7146_read(dev, I2C_STATUS); 206 } else { 207 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 208 saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword)); 209 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 210 211 /* do not poll for i2c-status before upload is complete */ 212 timeout = jiffies + HZ/100 + 1; /* 10ms */ 213 while(1) { 214 mc2 = (saa7146_read(dev, MC2) & 0x1); 215 if( 0 != mc2 ) { 216 break; 217 } 218 if (time_after(jiffies,timeout)) { 219 printk(KERN_WARNING "%s %s: timed out waiting for MC2\n", 220 dev->name, __func__); 221 return -EIO; 222 } 223 } 224 /* wait until we get a transfer done or error */ 225 timeout = jiffies + HZ/100 + 1; /* 10ms */ 226 /* first read usually delivers bogus results... */ 227 saa7146_i2c_status(dev); 228 while(1) { 229 status = saa7146_i2c_status(dev); 230 if ((status & 0x3) != 1) 231 break; 232 if (time_after(jiffies,timeout)) { 233 /* this is normal when probing the bus 234 * (no answer from nonexisistant device...) 235 */ 236 printk(KERN_WARNING "%s %s [poll]: timed out waiting for end of xfer\n", 237 dev->name, __func__); 238 return -EIO; 239 } 240 if (++trial < 50 && short_delay) 241 udelay(10); 242 else 243 msleep(1); 244 } 245 } 246 247 /* give a detailed status report */ 248 if ( 0 != (status & (SAA7146_I2C_SPERR | SAA7146_I2C_APERR | 249 SAA7146_I2C_DTERR | SAA7146_I2C_DRERR | 250 SAA7146_I2C_AL | SAA7146_I2C_ERR | 251 SAA7146_I2C_BUSY)) ) { 252 253 if ( 0 == (status & SAA7146_I2C_ERR) || 254 0 == (status & SAA7146_I2C_BUSY) ) { 255 /* it may take some time until ERR goes high - ignore */ 256 DEB_I2C(("unexpected i2c status %04x\n", status)); 257 } 258 if( 0 != (status & SAA7146_I2C_SPERR) ) { 259 DEB_I2C(("error due to invalid start/stop condition.\n")); 260 } 261 if( 0 != (status & SAA7146_I2C_DTERR) ) { 262 DEB_I2C(("error in data transmission.\n")); 263 } 264 if( 0 != (status & SAA7146_I2C_DRERR) ) { 265 DEB_I2C(("error when receiving data.\n")); 266 } 267 if( 0 != (status & SAA7146_I2C_AL) ) { 268 DEB_I2C(("error because arbitration lost.\n")); 269 } 270 271 /* we handle address-errors here */ 272 if( 0 != (status & SAA7146_I2C_APERR) ) { 273 DEB_I2C(("error in address phase.\n")); 274 return -EREMOTEIO; 275 } 276 277 return -EIO; 278 } 279 280 /* read back data, just in case we were reading ... */ 281 *dword = cpu_to_le32(saa7146_read(dev, I2C_TRANSFER)); 282 283 DEB_I2C(("after: 0x%08x\n",*dword)); 284 return 0; 285} 286 287static int saa7146_i2c_transfer(struct saa7146_dev *dev, const struct i2c_msg *msgs, int num, int retries) 288{ 289 int i = 0, count = 0; 290 __le32 *buffer = dev->d_i2c.cpu_addr; 291 int err = 0; 292 int short_delay = 0; 293 294 if (mutex_lock_interruptible(&dev->i2c_lock)) 295 return -ERESTARTSYS; 296 297 for(i=0;i<num;i++) { 298 DEB_I2C(("msg:%d/%d\n",i+1,num)); 299 } 300 301 /* prepare the message(s), get number of u32s to transfer */ 302 count = saa7146_i2c_msg_prepare(msgs, num, buffer); 303 if ( 0 > count ) { 304 err = -1; 305 goto out; 306 } 307 308 if ( count > 3 || 0 != (SAA7146_I2C_SHORT_DELAY & dev->ext->flags) ) 309 short_delay = 1; 310 311 do { 312 /* reset the i2c-device if necessary */ 313 err = saa7146_i2c_reset(dev); 314 if ( 0 > err ) { 315 DEB_I2C(("could not reset i2c-device.\n")); 316 goto out; 317 } 318 319 /* write out the u32s one after another */ 320 for(i = 0; i < count; i++) { 321 err = saa7146_i2c_writeout(dev, &buffer[i], short_delay); 322 if ( 0 != err) { 323 /* this one is unsatisfying: some i2c slaves on some 324 dvb cards don't acknowledge correctly, so the saa7146 325 thinks that an address error occured. in that case, the 326 transaction should be retrying, even if an address error 327 occured. analog saa7146 based cards extensively rely on 328 i2c address probing, however, and address errors indicate that a 329 device is really *not* there. retrying in that case 330 increases the time the device needs to probe greatly, so 331 it should be avoided. So we bail out in irq mode after an 332 address error and trust the saa7146 address error detection. */ 333 if (-EREMOTEIO == err && 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags)) 334 goto out; 335 DEB_I2C(("error while sending message(s). starting again.\n")); 336 break; 337 } 338 } 339 if( 0 == err ) { 340 err = num; 341 break; 342 } 343 344 /* delay a bit before retrying */ 345 msleep(10); 346 347 } while (err != num && retries--); 348 349 /* quit if any error occurred */ 350 if (err != num) 351 goto out; 352 353 /* if any things had to be read, get the results */ 354 if ( 0 != saa7146_i2c_msg_cleanup(msgs, num, buffer)) { 355 DEB_I2C(("could not cleanup i2c-message.\n")); 356 err = -1; 357 goto out; 358 } 359 360 /* return the number of delivered messages */ 361 DEB_I2C(("transmission successful. (msg:%d).\n",err)); 362out: 363 /* another bug in revision 0: the i2c-registers get uploaded randomly by other 364 uploads, so we better clear them out before continueing */ 365 if( 0 == dev->revision ) { 366 __le32 zero = 0; 367 saa7146_i2c_reset(dev); 368 if( 0 != saa7146_i2c_writeout(dev, &zero, short_delay)) { 369 INFO(("revision 0 error. this should never happen.\n")); 370 } 371 } 372 373 mutex_unlock(&dev->i2c_lock); 374 return err; 375} 376 377/* utility functions */ 378static int saa7146_i2c_xfer(struct i2c_adapter* adapter, struct i2c_msg *msg, int num) 379{ 380 struct v4l2_device *v4l2_dev = i2c_get_adapdata(adapter); 381 struct saa7146_dev *dev = to_saa7146_dev(v4l2_dev); 382 383 /* use helper function to transfer data */ 384 return saa7146_i2c_transfer(dev, msg, num, adapter->retries); 385} 386 387 388/*****************************************************************************/ 389/* i2c-adapter helper functions */ 390#include <linux/i2c-id.h> 391 392/* exported algorithm data */ 393static struct i2c_algorithm saa7146_algo = { 394 .master_xfer = saa7146_i2c_xfer, 395 .functionality = saa7146_i2c_func, 396}; 397 398int saa7146_i2c_adapter_prepare(struct saa7146_dev *dev, struct i2c_adapter *i2c_adapter, u32 bitrate) 399{ 400 DEB_EE(("bitrate: 0x%08x\n",bitrate)); 401 402 /* enable i2c-port pins */ 403 saa7146_write(dev, MC1, (MASK_08 | MASK_24)); 404 405 dev->i2c_bitrate = bitrate; 406 saa7146_i2c_reset(dev); 407 408 if (i2c_adapter) { 409 i2c_set_adapdata(i2c_adapter, &dev->v4l2_dev); 410 i2c_adapter->dev.parent = &dev->pci->dev; 411 i2c_adapter->algo = &saa7146_algo; 412 i2c_adapter->algo_data = NULL; 413 i2c_adapter->id = I2C_HW_SAA7146; 414 i2c_adapter->timeout = SAA7146_I2C_TIMEOUT; 415 i2c_adapter->retries = SAA7146_I2C_RETRIES; 416 } 417 418 return 0; 419} 420