1#include "drmP.h" 2#include "drm.h" 3#include "nouveau_drv.h" 4#include "nouveau_drm.h" 5 6int 7nv40_mc_init(struct drm_device *dev) 8{ 9 struct drm_nouveau_private *dev_priv = dev->dev_private; 10 uint32_t tmp; 11 12 /* Power up everything, resetting each individual unit will 13 * be done later if needed. 14 */ 15 nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF); 16 17 switch (dev_priv->chipset) { 18 case 0x44: 19 case 0x46: /* G72 */ 20 case 0x4e: 21 case 0x4c: /* C51_G7X */ 22 tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA); 23 nv_wr32(dev, NV40_PMC_1700, tmp); 24 nv_wr32(dev, NV40_PMC_1704, 0); 25 nv_wr32(dev, NV40_PMC_1708, 0); 26 nv_wr32(dev, NV40_PMC_170C, tmp); 27 break; 28 default: 29 break; 30 } 31 32 return 0; 33} 34 35void 36nv40_mc_takedown(struct drm_device *dev) 37{ 38} 39