1/* 2 * mrst.h: Intel Moorestown platform specific setup code 3 * 4 * (C) Copyright 2009 Intel Corporation 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; version 2 9 * of the License. 10 */ 11#ifndef _ASM_X86_MRST_H 12#define _ASM_X86_MRST_H 13extern int pci_mrst_init(void); 14int __init sfi_parse_mrtc(struct sfi_table_header *table); 15 16/* 17 * Medfield is the follow-up of Moorestown, it combines two chip solution into 18 * one. Other than that it also added always-on and constant tsc and lapic 19 * timers. Medfield is the platform name, and the chip name is called Penwell 20 * we treat Medfield/Penwell as a variant of Moorestown. Penwell can be 21 * identified via MSRs. 22 */ 23enum mrst_cpu_type { 24 MRST_CPU_CHIP_LINCROFT = 1, 25 MRST_CPU_CHIP_PENWELL, 26}; 27 28extern enum mrst_cpu_type __mrst_cpu_chip; 29static inline enum mrst_cpu_type mrst_identify_cpu(void) 30{ 31 return __mrst_cpu_chip; 32} 33 34enum mrst_timer_options { 35 MRST_TIMER_DEFAULT, 36 MRST_TIMER_APBT_ONLY, 37 MRST_TIMER_LAPIC_APBT, 38}; 39 40extern enum mrst_timer_options mrst_timer_options; 41 42#define SFI_MTMR_MAX_NUM 8 43#define SFI_MRTC_MAX 8 44 45#endif /* _ASM_X86_MRST_H */ 46