1/* 2 * 3 * BRIEF MODULE DESCRIPTION 4 * Alchemy Pb1200/Db1200 board setup. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 * 11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 21 * 22 * You should have received a copy of the GNU General Public License along 23 * with this program; if not, write to the Free Software Foundation, Inc., 24 * 675 Mass Ave, Cambridge, MA 02139, USA. 25 */ 26 27#include <linux/init.h> 28#include <linux/interrupt.h> 29#include <linux/sched.h> 30 31#include <asm/mach-au1x00/au1000.h> 32#include <asm/mach-db1x00/bcsr.h> 33 34#ifdef CONFIG_MIPS_PB1200 35#include <asm/mach-pb1x00/pb1200.h> 36#endif 37 38#ifdef CONFIG_MIPS_DB1200 39#include <asm/mach-db1x00/db1200.h> 40#define PB1200_INT_BEGIN DB1200_INT_BEGIN 41#define PB1200_INT_END DB1200_INT_END 42#endif 43 44#include <prom.h> 45 46const char *get_system_type(void) 47{ 48 return "Alchemy Pb1200"; 49} 50 51void __init board_setup(void) 52{ 53 printk(KERN_INFO "AMD Alchemy Pb1200 Board\n"); 54 bcsr_init(PB1200_BCSR_PHYS_ADDR, 55 PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS); 56 57 58#if defined(CONFIG_I2C_AU1550) 59 { 60 u32 freq0, clksrc; 61 u32 pin_func; 62 63 /* Select SMBus in CPLD */ 64 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0); 65 66 pin_func = au_readl(SYS_PINFUNC); 67 au_sync(); 68 pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B); 69 /* Set GPIOs correctly */ 70 pin_func |= 2 << 17; 71 au_writel(pin_func, SYS_PINFUNC); 72 au_sync(); 73 74 /* The I2C driver depends on 50 MHz clock */ 75 freq0 = au_readl(SYS_FREQCTRL0); 76 au_sync(); 77 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); 78 freq0 |= 3 << SYS_FC_FRDIV1_BIT; 79 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */ 80 au_writel(freq0, SYS_FREQCTRL0); 81 au_sync(); 82 freq0 |= SYS_FC_FE1; 83 au_writel(freq0, SYS_FREQCTRL0); 84 au_sync(); 85 86 clksrc = au_readl(SYS_CLKSRC); 87 au_sync(); 88 clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK); 89 /* Bit 22 is EXTCLK0 for PSC0 */ 90 clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT; 91 au_writel(clksrc, SYS_CLKSRC); 92 au_sync(); 93 } 94#endif 95 96 /* 97 * The Pb1200 development board uses external MUX for PSC0 to 98 * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI 99 */ 100#ifdef CONFIG_I2C_AU1550 101 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0); 102#endif 103 au_sync(); 104} 105 106static int __init pb1200_init_irq(void) 107{ 108 /* We have a problem with CPLD rev 3. */ 109 if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) { 110 printk(KERN_ERR "WARNING!!!\n"); 111 printk(KERN_ERR "WARNING!!!\n"); 112 printk(KERN_ERR "WARNING!!!\n"); 113 printk(KERN_ERR "WARNING!!!\n"); 114 printk(KERN_ERR "WARNING!!!\n"); 115 printk(KERN_ERR "WARNING!!!\n"); 116 printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n"); 117 printk(KERN_ERR "updated to latest revision. This software will\n"); 118 printk(KERN_ERR "not work on anything less than CPLD rev 4.\n"); 119 printk(KERN_ERR "WARNING!!!\n"); 120 printk(KERN_ERR "WARNING!!!\n"); 121 printk(KERN_ERR "WARNING!!!\n"); 122 printk(KERN_ERR "WARNING!!!\n"); 123 printk(KERN_ERR "WARNING!!!\n"); 124 printk(KERN_ERR "WARNING!!!\n"); 125 panic("Game over. Your score is 0."); 126 } 127 128 set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW); 129 bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT); 130 131 return 0; 132} 133arch_initcall(pb1200_init_irq); 134 135 136int board_au1200fb_panel(void) 137{ 138 return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f; 139} 140 141int board_au1200fb_panel_init(void) 142{ 143 /* Apply power */ 144 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | 145 BCSR_BOARD_LCDBL); 146 /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */ 147 return 0; 148} 149 150int board_au1200fb_panel_shutdown(void) 151{ 152 /* Remove power */ 153 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | 154 BCSR_BOARD_LCDBL, 0); 155 /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */ 156 return 0; 157} 158