1/* 2 * Copyright 2004-2009 Analog Devices Inc. 3 * 2005 National ICT Australia (NICTA) 4 * Aidan Williams <aidan@nicta.com.au> 5 * 6 * Licensed under the GPL-2 or later. 7 */ 8 9#include <linux/device.h> 10#include <linux/etherdevice.h> 11#include <linux/platform_device.h> 12#include <linux/mtd/mtd.h> 13#include <linux/mtd/partitions.h> 14#include <linux/spi/spi.h> 15#include <linux/spi/flash.h> 16#include <linux/irq.h> 17#include <asm/dma.h> 18#include <asm/bfin5xx_spi.h> 19#include <asm/portmux.h> 20 21#include <linux/spi/ad7877.h> 22 23/* 24 * Name the Board for the /proc/cpuinfo 25 */ 26const char bfin_board_name[] = "ADI PNAV-1.0"; 27 28/* 29 * Driver needs to know address, irq and flag pin. 30 */ 31 32#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 33static struct resource bfin_pcmcia_cf_resources[] = { 34 { 35 .start = 0x20310000, /* IO PORT */ 36 .end = 0x20312000, 37 .flags = IORESOURCE_MEM, 38 }, { 39 .start = 0x20311000, /* Attribute Memory */ 40 .end = 0x20311FFF, 41 .flags = IORESOURCE_MEM, 42 }, { 43 .start = IRQ_PF4, 44 .end = IRQ_PF4, 45 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, 46 }, { 47 .start = 6, /* Card Detect PF6 */ 48 .end = 6, 49 .flags = IORESOURCE_IRQ, 50 }, 51}; 52 53static struct platform_device bfin_pcmcia_cf_device = { 54 .name = "bfin_cf_pcmcia", 55 .id = -1, 56 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), 57 .resource = bfin_pcmcia_cf_resources, 58}; 59#endif 60 61#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 62static struct platform_device rtc_device = { 63 .name = "rtc-bfin", 64 .id = -1, 65}; 66#endif 67 68#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 69#include <linux/smc91x.h> 70 71static struct smc91x_platdata smc91x_info = { 72 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 73 .leda = RPC_LED_100_10, 74 .ledb = RPC_LED_TX_RX, 75}; 76 77static struct resource smc91x_resources[] = { 78 { 79 .name = "smc91x-regs", 80 .start = 0x20300300, 81 .end = 0x20300300 + 16, 82 .flags = IORESOURCE_MEM, 83 }, { 84 85 .start = IRQ_PF7, 86 .end = IRQ_PF7, 87 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 88 }, 89}; 90static struct platform_device smc91x_device = { 91 .name = "smc91x", 92 .id = 0, 93 .num_resources = ARRAY_SIZE(smc91x_resources), 94 .resource = smc91x_resources, 95 .dev = { 96 .platform_data = &smc91x_info, 97 }, 98}; 99#endif 100 101#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 102static struct platform_device bfin_mii_bus = { 103 .name = "bfin_mii_bus", 104}; 105 106static struct platform_device bfin_mac_device = { 107 .name = "bfin_mac", 108 .dev.platform_data = &bfin_mii_bus, 109}; 110#endif 111 112#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 113static struct resource net2272_bfin_resources[] = { 114 { 115 .start = 0x20300000, 116 .end = 0x20300000 + 0x100, 117 .flags = IORESOURCE_MEM, 118 }, { 119 .start = IRQ_PF7, 120 .end = IRQ_PF7, 121 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 122 }, 123}; 124 125static struct platform_device net2272_bfin_device = { 126 .name = "net2272", 127 .id = -1, 128 .num_resources = ARRAY_SIZE(net2272_bfin_resources), 129 .resource = net2272_bfin_resources, 130}; 131#endif 132 133#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 134/* all SPI peripherals info goes here */ 135 136#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 137static struct mtd_partition bfin_spi_flash_partitions[] = { 138 { 139 .name = "bootloader(spi)", 140 .size = 0x00020000, 141 .offset = 0, 142 .mask_flags = MTD_CAP_ROM 143 }, { 144 .name = "linux kernel(spi)", 145 .size = 0xe0000, 146 .offset = 0x20000 147 }, { 148 .name = "file system(spi)", 149 .size = 0x700000, 150 .offset = 0x00100000, 151 } 152}; 153 154static struct flash_platform_data bfin_spi_flash_data = { 155 .name = "m25p80", 156 .parts = bfin_spi_flash_partitions, 157 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 158 .type = "m25p64", 159}; 160 161/* SPI flash chip (m25p64) */ 162static struct bfin5xx_spi_chip spi_flash_chip_info = { 163 .enable_dma = 0, /* use dma transfer with this chip*/ 164 .bits_per_word = 8, 165}; 166#endif 167 168#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) 169/* SPI ADC chip */ 170static struct bfin5xx_spi_chip spi_adc_chip_info = { 171 .enable_dma = 1, /* use dma transfer with this chip*/ 172 .bits_per_word = 16, 173}; 174#endif 175 176#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) 177static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 178 .enable_dma = 0, 179 .bits_per_word = 16, 180}; 181#endif 182 183#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 184static struct bfin5xx_spi_chip mmc_spi_chip_info = { 185 .enable_dma = 0, 186 .bits_per_word = 8, 187}; 188#endif 189 190#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 191static struct bfin5xx_spi_chip spi_ad7877_chip_info = { 192 .enable_dma = 0, 193 .bits_per_word = 16, 194}; 195 196static const struct ad7877_platform_data bfin_ad7877_ts_info = { 197 .model = 7877, 198 .vref_delay_usecs = 50, /* internal, no capacitor */ 199 .x_plate_ohms = 419, 200 .y_plate_ohms = 486, 201 .pressure_max = 1000, 202 .pressure_min = 0, 203 .stopacq_polarity = 1, 204 .first_conversion_delay = 3, 205 .acquisition_time = 1, 206 .averaging = 1, 207 .pen_down_acc_interval = 1, 208}; 209#endif 210 211static struct spi_board_info bfin_spi_board_info[] __initdata = { 212#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 213 { 214 /* the modalias must be the same as spi device driver name */ 215 .modalias = "m25p80", /* Name of spi_driver for this device */ 216 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 217 .bus_num = 0, /* Framework bus number */ 218 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 219 .platform_data = &bfin_spi_flash_data, 220 .controller_data = &spi_flash_chip_info, 221 .mode = SPI_MODE_3, 222 }, 223#endif 224 225#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) 226 { 227 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 228 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 229 .bus_num = 0, /* Framework bus number */ 230 .chip_select = 1, /* Framework chip select. */ 231 .platform_data = NULL, /* No spi_driver specific config */ 232 .controller_data = &spi_adc_chip_info, 233 }, 234#endif 235 236#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) 237 { 238 .modalias = "ad1836", 239 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 240 .bus_num = 0, 241 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 242 .controller_data = &ad1836_spi_chip_info, 243 }, 244#endif 245#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 246 { 247 .modalias = "mmc_spi", 248 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 249 .bus_num = 0, 250 .chip_select = 5, 251 .controller_data = &mmc_spi_chip_info, 252 .mode = SPI_MODE_3, 253 }, 254#endif 255#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 256{ 257 .modalias = "ad7877", 258 .platform_data = &bfin_ad7877_ts_info, 259 .irq = IRQ_PF2, 260 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 261 .bus_num = 0, 262 .chip_select = 5, 263 .controller_data = &spi_ad7877_chip_info, 264}, 265#endif 266 267}; 268 269/* SPI (0) */ 270static struct resource bfin_spi0_resource[] = { 271 [0] = { 272 .start = SPI0_REGBASE, 273 .end = SPI0_REGBASE + 0xFF, 274 .flags = IORESOURCE_MEM, 275 }, 276 [1] = { 277 .start = CH_SPI, 278 .end = CH_SPI, 279 .flags = IORESOURCE_DMA, 280 }, 281 [2] = { 282 .start = IRQ_SPI, 283 .end = IRQ_SPI, 284 .flags = IORESOURCE_IRQ, 285 }, 286}; 287 288/* SPI controller data */ 289static struct bfin5xx_spi_master bfin_spi0_info = { 290 .num_chipselect = 8, 291 .enable_dma = 1, /* master has the ability to do dma transfer */ 292 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, 293}; 294 295static struct platform_device bfin_spi0_device = { 296 .name = "bfin-spi", 297 .id = 0, /* Bus number */ 298 .num_resources = ARRAY_SIZE(bfin_spi0_resource), 299 .resource = bfin_spi0_resource, 300 .dev = { 301 .platform_data = &bfin_spi0_info, /* Passed to driver */ 302 }, 303}; 304#endif /* spi master and devices */ 305 306#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 307static struct platform_device bfin_fb_device = { 308 .name = "bf537-lq035", 309}; 310#endif 311 312#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 313#ifdef CONFIG_SERIAL_BFIN_UART0 314static struct resource bfin_uart0_resources[] = { 315 { 316 .start = UART0_THR, 317 .end = UART0_GCTL+2, 318 .flags = IORESOURCE_MEM, 319 }, 320 { 321 .start = IRQ_UART0_RX, 322 .end = IRQ_UART0_RX+1, 323 .flags = IORESOURCE_IRQ, 324 }, 325 { 326 .start = IRQ_UART0_ERROR, 327 .end = IRQ_UART0_ERROR, 328 .flags = IORESOURCE_IRQ, 329 }, 330 { 331 .start = CH_UART0_TX, 332 .end = CH_UART0_TX, 333 .flags = IORESOURCE_DMA, 334 }, 335 { 336 .start = CH_UART0_RX, 337 .end = CH_UART0_RX, 338 .flags = IORESOURCE_DMA, 339 }, 340}; 341 342unsigned short bfin_uart0_peripherals[] = { 343 P_UART0_TX, P_UART0_RX, 0 344}; 345 346static struct platform_device bfin_uart0_device = { 347 .name = "bfin-uart", 348 .id = 0, 349 .num_resources = ARRAY_SIZE(bfin_uart0_resources), 350 .resource = bfin_uart0_resources, 351 .dev = { 352 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ 353 }, 354}; 355#endif 356#ifdef CONFIG_SERIAL_BFIN_UART1 357static struct resource bfin_uart1_resources[] = { 358 { 359 .start = UART1_THR, 360 .end = UART1_GCTL+2, 361 .flags = IORESOURCE_MEM, 362 }, 363 { 364 .start = IRQ_UART1_RX, 365 .end = IRQ_UART1_RX+1, 366 .flags = IORESOURCE_IRQ, 367 }, 368 { 369 .start = IRQ_UART1_ERROR, 370 .end = IRQ_UART1_ERROR, 371 .flags = IORESOURCE_IRQ, 372 }, 373 { 374 .start = CH_UART1_TX, 375 .end = CH_UART1_TX, 376 .flags = IORESOURCE_DMA, 377 }, 378 { 379 .start = CH_UART1_RX, 380 .end = CH_UART1_RX, 381 .flags = IORESOURCE_DMA, 382 }, 383}; 384 385unsigned short bfin_uart1_peripherals[] = { 386 P_UART1_TX, P_UART1_RX, 0 387}; 388 389static struct platform_device bfin_uart1_device = { 390 .name = "bfin-uart", 391 .id = 1, 392 .num_resources = ARRAY_SIZE(bfin_uart1_resources), 393 .resource = bfin_uart1_resources, 394 .dev = { 395 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ 396 }, 397}; 398#endif 399#endif 400 401#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 402#ifdef CONFIG_BFIN_SIR0 403static struct resource bfin_sir0_resources[] = { 404 { 405 .start = 0xFFC00400, 406 .end = 0xFFC004FF, 407 .flags = IORESOURCE_MEM, 408 }, 409 { 410 .start = IRQ_UART0_RX, 411 .end = IRQ_UART0_RX+1, 412 .flags = IORESOURCE_IRQ, 413 }, 414 { 415 .start = CH_UART0_RX, 416 .end = CH_UART0_RX+1, 417 .flags = IORESOURCE_DMA, 418 }, 419}; 420 421static struct platform_device bfin_sir0_device = { 422 .name = "bfin_sir", 423 .id = 0, 424 .num_resources = ARRAY_SIZE(bfin_sir0_resources), 425 .resource = bfin_sir0_resources, 426}; 427#endif 428#ifdef CONFIG_BFIN_SIR1 429static struct resource bfin_sir1_resources[] = { 430 { 431 .start = 0xFFC02000, 432 .end = 0xFFC020FF, 433 .flags = IORESOURCE_MEM, 434 }, 435 { 436 .start = IRQ_UART1_RX, 437 .end = IRQ_UART1_RX+1, 438 .flags = IORESOURCE_IRQ, 439 }, 440 { 441 .start = CH_UART1_RX, 442 .end = CH_UART1_RX+1, 443 .flags = IORESOURCE_DMA, 444 }, 445}; 446 447static struct platform_device bfin_sir1_device = { 448 .name = "bfin_sir", 449 .id = 1, 450 .num_resources = ARRAY_SIZE(bfin_sir1_resources), 451 .resource = bfin_sir1_resources, 452}; 453#endif 454#endif 455 456static struct platform_device *stamp_devices[] __initdata = { 457#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 458 &bfin_pcmcia_cf_device, 459#endif 460 461#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 462 &rtc_device, 463#endif 464 465#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 466 &smc91x_device, 467#endif 468 469#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 470 &bfin_mii_bus, 471 &bfin_mac_device, 472#endif 473 474#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 475 &net2272_bfin_device, 476#endif 477 478#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 479 &bfin_spi0_device, 480#endif 481 482#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 483 &bfin_fb_device, 484#endif 485 486#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 487#ifdef CONFIG_SERIAL_BFIN_UART0 488 &bfin_uart0_device, 489#endif 490#ifdef CONFIG_SERIAL_BFIN_UART1 491 &bfin_uart1_device, 492#endif 493#endif 494 495#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 496#ifdef CONFIG_BFIN_SIR0 497 &bfin_sir0_device, 498#endif 499#ifdef CONFIG_BFIN_SIR1 500 &bfin_sir1_device, 501#endif 502#endif 503}; 504 505static int __init pnav_init(void) 506{ 507 printk(KERN_INFO "%s(): registering device resources\n", __func__); 508 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 509#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 510 spi_register_board_info(bfin_spi_board_info, 511 ARRAY_SIZE(bfin_spi_board_info)); 512#endif 513 return 0; 514} 515 516arch_initcall(pnav_init); 517 518static struct platform_device *stamp_early_devices[] __initdata = { 519#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) 520#ifdef CONFIG_SERIAL_BFIN_UART0 521 &bfin_uart0_device, 522#endif 523#ifdef CONFIG_SERIAL_BFIN_UART1 524 &bfin_uart1_device, 525#endif 526#endif 527}; 528 529void __init native_machine_early_platform_add_devices(void) 530{ 531 printk(KERN_INFO "register early platform devices\n"); 532 early_platform_add_devices(stamp_early_devices, 533 ARRAY_SIZE(stamp_early_devices)); 534} 535 536void bfin_get_ether_addr(char *addr) 537{ 538 random_ether_addr(addr); 539 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__); 540} 541EXPORT_SYMBOL(bfin_get_ether_addr); 542