1/* 2 * Copyright 2004-2009 Analog Devices Inc. 3 * 2005 National ICT Australia (NICTA) 4 * Aidan Williams <aidan@nicta.com.au> 5 * 6 * Licensed under the GPL-2 or later. 7 */ 8 9#include <linux/device.h> 10#include <linux/platform_device.h> 11#include <linux/mtd/mtd.h> 12#include <linux/mtd/partitions.h> 13#include <linux/mtd/physmap.h> 14#include <linux/spi/spi.h> 15#include <linux/spi/flash.h> 16#include <linux/i2c.h> 17#include <linux/irq.h> 18#include <linux/interrupt.h> 19#include <linux/usb/musb.h> 20#include <linux/leds.h> 21#include <linux/input.h> 22#include <asm/dma.h> 23#include <asm/bfin5xx_spi.h> 24#include <asm/reboot.h> 25#include <asm/nand.h> 26#include <asm/portmux.h> 27#include <asm/dpmc.h> 28#include <linux/spi/ad7877.h> 29 30/* 31 * Name the Board for the /proc/cpuinfo 32 */ 33#ifdef CONFIG_BFIN527_EZKIT_V2 34const char bfin_board_name[] = "ADI BF527-EZKIT V2"; 35#else 36const char bfin_board_name[] = "ADI BF527-EZKIT"; 37#endif 38 39/* 40 * Driver needs to know address, irq and flag pin. 41 */ 42 43#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) 44#include <linux/usb/isp1760.h> 45static struct resource bfin_isp1760_resources[] = { 46 [0] = { 47 .start = 0x203C0000, 48 .end = 0x203C0000 + 0x000fffff, 49 .flags = IORESOURCE_MEM, 50 }, 51 [1] = { 52 .start = IRQ_PF7, 53 .end = IRQ_PF7, 54 .flags = IORESOURCE_IRQ, 55 }, 56}; 57 58static struct isp1760_platform_data isp1760_priv = { 59 .is_isp1761 = 0, 60 .bus_width_16 = 1, 61 .port1_otg = 0, 62 .analog_oc = 0, 63 .dack_polarity_high = 0, 64 .dreq_polarity_high = 0, 65}; 66 67static struct platform_device bfin_isp1760_device = { 68 .name = "isp1760", 69 .id = 0, 70 .dev = { 71 .platform_data = &isp1760_priv, 72 }, 73 .num_resources = ARRAY_SIZE(bfin_isp1760_resources), 74 .resource = bfin_isp1760_resources, 75}; 76#endif 77 78#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) 79static struct resource musb_resources[] = { 80 [0] = { 81 .start = 0xffc03800, 82 .end = 0xffc03cff, 83 .flags = IORESOURCE_MEM, 84 }, 85 [1] = { /* general IRQ */ 86 .start = IRQ_USB_INT0, 87 .end = IRQ_USB_INT0, 88 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 89 }, 90 [2] = { /* DMA IRQ */ 91 .start = IRQ_USB_DMA, 92 .end = IRQ_USB_DMA, 93 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 94 }, 95}; 96 97static struct musb_hdrc_config musb_config = { 98 .multipoint = 0, 99 .dyn_fifo = 0, 100 .soft_con = 1, 101 .dma = 1, 102 .num_eps = 8, 103 .dma_channels = 8, 104 .gpio_vrsel = GPIO_PG13, 105 /* Some custom boards need to be active low, just set it to "0" 106 * if it is the case. 107 */ 108 .gpio_vrsel_active = 1, 109}; 110 111static struct musb_hdrc_platform_data musb_plat = { 112#if defined(CONFIG_USB_MUSB_OTG) 113 .mode = MUSB_OTG, 114#elif defined(CONFIG_USB_MUSB_HDRC_HCD) 115 .mode = MUSB_HOST, 116#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) 117 .mode = MUSB_PERIPHERAL, 118#endif 119 .config = &musb_config, 120}; 121 122static u64 musb_dmamask = ~(u32)0; 123 124static struct platform_device musb_device = { 125 .name = "musb_hdrc", 126 .id = 0, 127 .dev = { 128 .dma_mask = &musb_dmamask, 129 .coherent_dma_mask = 0xffffffff, 130 .platform_data = &musb_plat, 131 }, 132 .num_resources = ARRAY_SIZE(musb_resources), 133 .resource = musb_resources, 134}; 135#endif 136 137#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE) 138 139static struct resource bf52x_t350mcqb_resources[] = { 140 { 141 .start = IRQ_PPI_ERROR, 142 .end = IRQ_PPI_ERROR, 143 .flags = IORESOURCE_IRQ, 144 }, 145}; 146 147static struct platform_device bf52x_t350mcqb_device = { 148 .name = "bfin-t350mcqb", 149 .id = -1, 150 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources), 151 .resource = bf52x_t350mcqb_resources, 152}; 153#endif 154 155#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 156#include <asm/bfin-lq035q1.h> 157 158static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { 159 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, 160 .ppi_mode = USE_RGB565_8_BIT_PPI, 161}; 162 163static struct resource bfin_lq035q1_resources[] = { 164 { 165 .start = IRQ_PPI_ERROR, 166 .end = IRQ_PPI_ERROR, 167 .flags = IORESOURCE_IRQ, 168 }, 169}; 170 171static struct platform_device bfin_lq035q1_device = { 172 .name = "bfin-lq035q1", 173 .id = -1, 174 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources), 175 .resource = bfin_lq035q1_resources, 176 .dev = { 177 .platform_data = &bfin_lq035q1_data, 178 }, 179}; 180#endif 181 182#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 183static struct mtd_partition ezkit_partitions[] = { 184 { 185 .name = "bootloader(nor)", 186 .size = 0x40000, 187 .offset = 0, 188 }, { 189 .name = "linux kernel(nor)", 190 .size = 0x1C0000, 191 .offset = MTDPART_OFS_APPEND, 192 }, { 193 .name = "file system(nor)", 194 .size = MTDPART_SIZ_FULL, 195 .offset = MTDPART_OFS_APPEND, 196 } 197}; 198 199static struct physmap_flash_data ezkit_flash_data = { 200 .width = 2, 201 .parts = ezkit_partitions, 202 .nr_parts = ARRAY_SIZE(ezkit_partitions), 203}; 204 205static struct resource ezkit_flash_resource = { 206 .start = 0x20000000, 207 .end = 0x203fffff, 208 .flags = IORESOURCE_MEM, 209}; 210 211static struct platform_device ezkit_flash_device = { 212 .name = "physmap-flash", 213 .id = 0, 214 .dev = { 215 .platform_data = &ezkit_flash_data, 216 }, 217 .num_resources = 1, 218 .resource = &ezkit_flash_resource, 219}; 220#endif 221 222#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 223static struct mtd_partition partition_info[] = { 224 { 225 .name = "linux kernel(nand)", 226 .offset = 0, 227 .size = 4 * 1024 * 1024, 228 }, 229 { 230 .name = "file system(nand)", 231 .offset = MTDPART_OFS_APPEND, 232 .size = MTDPART_SIZ_FULL, 233 }, 234}; 235 236static struct bf5xx_nand_platform bf5xx_nand_platform = { 237 .data_width = NFC_NWIDTH_8, 238 .partitions = partition_info, 239 .nr_partitions = ARRAY_SIZE(partition_info), 240 .rd_dly = 3, 241 .wr_dly = 3, 242}; 243 244static struct resource bf5xx_nand_resources[] = { 245 { 246 .start = NFC_CTL, 247 .end = NFC_DATA_RD + 2, 248 .flags = IORESOURCE_MEM, 249 }, 250 { 251 .start = CH_NFC, 252 .end = CH_NFC, 253 .flags = IORESOURCE_IRQ, 254 }, 255}; 256 257static struct platform_device bf5xx_nand_device = { 258 .name = "bf5xx-nand", 259 .id = 0, 260 .num_resources = ARRAY_SIZE(bf5xx_nand_resources), 261 .resource = bf5xx_nand_resources, 262 .dev = { 263 .platform_data = &bf5xx_nand_platform, 264 }, 265}; 266#endif 267 268#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 269static struct resource bfin_pcmcia_cf_resources[] = { 270 { 271 .start = 0x20310000, /* IO PORT */ 272 .end = 0x20312000, 273 .flags = IORESOURCE_MEM, 274 }, { 275 .start = 0x20311000, /* Attribute Memory */ 276 .end = 0x20311FFF, 277 .flags = IORESOURCE_MEM, 278 }, { 279 .start = IRQ_PF4, 280 .end = IRQ_PF4, 281 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, 282 }, { 283 .start = 6, /* Card Detect PF6 */ 284 .end = 6, 285 .flags = IORESOURCE_IRQ, 286 }, 287}; 288 289static struct platform_device bfin_pcmcia_cf_device = { 290 .name = "bfin_cf_pcmcia", 291 .id = -1, 292 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), 293 .resource = bfin_pcmcia_cf_resources, 294}; 295#endif 296 297#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 298static struct platform_device rtc_device = { 299 .name = "rtc-bfin", 300 .id = -1, 301}; 302#endif 303 304#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 305#include <linux/smc91x.h> 306 307static struct smc91x_platdata smc91x_info = { 308 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 309 .leda = RPC_LED_100_10, 310 .ledb = RPC_LED_TX_RX, 311}; 312 313static struct resource smc91x_resources[] = { 314 { 315 .name = "smc91x-regs", 316 .start = 0x20300300, 317 .end = 0x20300300 + 16, 318 .flags = IORESOURCE_MEM, 319 }, { 320 321 .start = IRQ_PF7, 322 .end = IRQ_PF7, 323 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 324 }, 325}; 326static struct platform_device smc91x_device = { 327 .name = "smc91x", 328 .id = 0, 329 .num_resources = ARRAY_SIZE(smc91x_resources), 330 .resource = smc91x_resources, 331 .dev = { 332 .platform_data = &smc91x_info, 333 }, 334}; 335#endif 336 337#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 338static struct resource dm9000_resources[] = { 339 [0] = { 340 .start = 0x203FB800, 341 .end = 0x203FB800 + 1, 342 .flags = IORESOURCE_MEM, 343 }, 344 [1] = { 345 .start = 0x203FB800 + 4, 346 .end = 0x203FB800 + 5, 347 .flags = IORESOURCE_MEM, 348 }, 349 [2] = { 350 .start = IRQ_PF9, 351 .end = IRQ_PF9, 352 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), 353 }, 354}; 355 356static struct platform_device dm9000_device = { 357 .name = "dm9000", 358 .id = -1, 359 .num_resources = ARRAY_SIZE(dm9000_resources), 360 .resource = dm9000_resources, 361}; 362#endif 363 364#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 365static struct platform_device bfin_mii_bus = { 366 .name = "bfin_mii_bus", 367}; 368 369static struct platform_device bfin_mac_device = { 370 .name = "bfin_mac", 371 .dev.platform_data = &bfin_mii_bus, 372}; 373#endif 374 375#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 376static struct resource net2272_bfin_resources[] = { 377 { 378 .start = 0x20300000, 379 .end = 0x20300000 + 0x100, 380 .flags = IORESOURCE_MEM, 381 }, { 382 .start = IRQ_PF7, 383 .end = IRQ_PF7, 384 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 385 }, 386}; 387 388static struct platform_device net2272_bfin_device = { 389 .name = "net2272", 390 .id = -1, 391 .num_resources = ARRAY_SIZE(net2272_bfin_resources), 392 .resource = net2272_bfin_resources, 393}; 394#endif 395 396#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 397static struct mtd_partition bfin_spi_flash_partitions[] = { 398 { 399 .name = "bootloader(spi)", 400 .size = 0x00040000, 401 .offset = 0, 402 .mask_flags = MTD_CAP_ROM 403 }, { 404 .name = "linux kernel(spi)", 405 .size = MTDPART_SIZ_FULL, 406 .offset = MTDPART_OFS_APPEND, 407 } 408}; 409 410static struct flash_platform_data bfin_spi_flash_data = { 411 .name = "m25p80", 412 .parts = bfin_spi_flash_partitions, 413 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 414 .type = "m25p16", 415}; 416 417/* SPI flash chip (m25p64) */ 418static struct bfin5xx_spi_chip spi_flash_chip_info = { 419 .enable_dma = 0, /* use dma transfer with this chip*/ 420 .bits_per_word = 8, 421}; 422#endif 423 424#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) 425/* SPI ADC chip */ 426static struct bfin5xx_spi_chip spi_adc_chip_info = { 427 .enable_dma = 1, /* use dma transfer with this chip*/ 428 .bits_per_word = 16, 429}; 430#endif 431 432#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) 433static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 434 .enable_dma = 0, 435 .bits_per_word = 16, 436}; 437#endif 438 439#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 440static struct bfin5xx_spi_chip mmc_spi_chip_info = { 441 .enable_dma = 0, 442 .bits_per_word = 8, 443}; 444#endif 445 446#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 447static struct bfin5xx_spi_chip spi_ad7877_chip_info = { 448 .enable_dma = 0, 449 .bits_per_word = 16, 450}; 451 452static const struct ad7877_platform_data bfin_ad7877_ts_info = { 453 .model = 7877, 454 .vref_delay_usecs = 50, /* internal, no capacitor */ 455 .x_plate_ohms = 419, 456 .y_plate_ohms = 486, 457 .pressure_max = 1000, 458 .pressure_min = 0, 459 .stopacq_polarity = 1, 460 .first_conversion_delay = 3, 461 .acquisition_time = 1, 462 .averaging = 1, 463 .pen_down_acc_interval = 1, 464}; 465#endif 466 467#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) 468#include <linux/spi/ad7879.h> 469static const struct ad7879_platform_data bfin_ad7879_ts_info = { 470 .model = 7879, /* Model = AD7879 */ 471 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ 472 .pressure_max = 10000, 473 .pressure_min = 0, 474 .first_conversion_delay = 3, /* wait 512us before do a first conversion */ 475 .acquisition_time = 1, /* 4us acquisition time per sample */ 476 .median = 2, /* do 8 measurements */ 477 .averaging = 1, /* take the average of 4 middle samples */ 478 .pen_down_acc_interval = 255, /* 9.4 ms */ 479 .gpio_export = 0, /* Export GPIO to gpiolib */ 480}; 481#endif 482 483#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || \ 484 defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) 485static struct bfin5xx_spi_chip spi_ad7879_chip_info = { 486 .enable_dma = 0, 487 .bits_per_word = 16, 488}; 489#endif 490 491#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 492static struct bfin5xx_spi_chip spidev_chip_info = { 493 .enable_dma = 0, 494 .bits_per_word = 8, 495}; 496#endif 497 498#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) 499static struct platform_device bfin_i2s = { 500 .name = "bfin-i2s", 501 .id = CONFIG_SND_BF5XX_SPORT_NUM, 502 /* TODO: add platform data here */ 503}; 504#endif 505 506#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) 507static struct platform_device bfin_tdm = { 508 .name = "bfin-tdm", 509 .id = CONFIG_SND_BF5XX_SPORT_NUM, 510 /* TODO: add platform data here */ 511}; 512#endif 513 514#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 515static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { 516 .enable_dma = 0, 517 .bits_per_word = 8, 518}; 519#endif 520 521static struct spi_board_info bfin_spi_board_info[] __initdata = { 522#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 523 { 524 /* the modalias must be the same as spi device driver name */ 525 .modalias = "m25p80", /* Name of spi_driver for this device */ 526 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 527 .bus_num = 0, /* Framework bus number */ 528 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 529 .platform_data = &bfin_spi_flash_data, 530 .controller_data = &spi_flash_chip_info, 531 .mode = SPI_MODE_3, 532 }, 533#endif 534 535#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) 536 { 537 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 538 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 539 .bus_num = 0, /* Framework bus number */ 540 .chip_select = 1, /* Framework chip select. */ 541 .platform_data = NULL, /* No spi_driver specific config */ 542 .controller_data = &spi_adc_chip_info, 543 }, 544#endif 545 546#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) 547 { 548 .modalias = "ad1836", 549 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 550 .bus_num = 0, 551 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 552 .controller_data = &ad1836_spi_chip_info, 553 }, 554#endif 555#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 556 { 557 .modalias = "mmc_spi", 558 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 559 .bus_num = 0, 560 .chip_select = 3, 561 .controller_data = &mmc_spi_chip_info, 562 .mode = SPI_MODE_0, 563 }, 564#endif 565 566#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 567 { 568 .modalias = "ad7877", 569 .platform_data = &bfin_ad7877_ts_info, 570 .irq = IRQ_PF8, 571 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 572 .bus_num = 0, 573 .chip_select = 2, 574 .controller_data = &spi_ad7877_chip_info, 575 }, 576#endif 577#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || \ 578 defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) 579 { 580 .modalias = "ad7879", 581 .platform_data = &bfin_ad7879_ts_info, 582 .irq = IRQ_PF8, 583 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 584 .bus_num = 0, 585 .chip_select = 3, 586 .controller_data = &spi_ad7879_chip_info, 587 .mode = SPI_CPHA | SPI_CPOL, 588 }, 589#endif 590#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 591 { 592 .modalias = "spidev", 593 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 594 .bus_num = 0, 595 .chip_select = 1, 596 .controller_data = &spidev_chip_info, 597 }, 598#endif 599#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 600 { 601 .modalias = "bfin-lq035q1-spi", 602 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 603 .bus_num = 0, 604 .chip_select = 7, 605 .controller_data = &lq035q1_spi_chip_info, 606 .mode = SPI_CPHA | SPI_CPOL, 607 }, 608#endif 609}; 610 611#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 612/* SPI controller data */ 613static struct bfin5xx_spi_master bfin_spi0_info = { 614 .num_chipselect = 8, 615 .enable_dma = 1, /* master has the ability to do dma transfer */ 616 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, 617}; 618 619/* SPI (0) */ 620static struct resource bfin_spi0_resource[] = { 621 [0] = { 622 .start = SPI0_REGBASE, 623 .end = SPI0_REGBASE + 0xFF, 624 .flags = IORESOURCE_MEM, 625 }, 626 [1] = { 627 .start = CH_SPI, 628 .end = CH_SPI, 629 .flags = IORESOURCE_DMA, 630 }, 631 [2] = { 632 .start = IRQ_SPI, 633 .end = IRQ_SPI, 634 .flags = IORESOURCE_IRQ, 635 }, 636}; 637 638static struct platform_device bfin_spi0_device = { 639 .name = "bfin-spi", 640 .id = 0, /* Bus number */ 641 .num_resources = ARRAY_SIZE(bfin_spi0_resource), 642 .resource = bfin_spi0_resource, 643 .dev = { 644 .platform_data = &bfin_spi0_info, /* Passed to driver */ 645 }, 646}; 647#endif /* spi master and devices */ 648 649#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 650#ifdef CONFIG_SERIAL_BFIN_UART0 651static struct resource bfin_uart0_resources[] = { 652 { 653 .start = UART0_THR, 654 .end = UART0_GCTL+2, 655 .flags = IORESOURCE_MEM, 656 }, 657 { 658 .start = IRQ_UART0_RX, 659 .end = IRQ_UART0_RX+1, 660 .flags = IORESOURCE_IRQ, 661 }, 662 { 663 .start = IRQ_UART0_ERROR, 664 .end = IRQ_UART0_ERROR, 665 .flags = IORESOURCE_IRQ, 666 }, 667 { 668 .start = CH_UART0_TX, 669 .end = CH_UART0_TX, 670 .flags = IORESOURCE_DMA, 671 }, 672 { 673 .start = CH_UART0_RX, 674 .end = CH_UART0_RX, 675 .flags = IORESOURCE_DMA, 676 }, 677}; 678 679unsigned short bfin_uart0_peripherals[] = { 680 P_UART0_TX, P_UART0_RX, 0 681}; 682 683static struct platform_device bfin_uart0_device = { 684 .name = "bfin-uart", 685 .id = 0, 686 .num_resources = ARRAY_SIZE(bfin_uart0_resources), 687 .resource = bfin_uart0_resources, 688 .dev = { 689 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ 690 }, 691}; 692#endif 693#ifdef CONFIG_SERIAL_BFIN_UART1 694static struct resource bfin_uart1_resources[] = { 695 { 696 .start = UART1_THR, 697 .end = UART1_GCTL+2, 698 .flags = IORESOURCE_MEM, 699 }, 700 { 701 .start = IRQ_UART1_RX, 702 .end = IRQ_UART1_RX+1, 703 .flags = IORESOURCE_IRQ, 704 }, 705 { 706 .start = IRQ_UART1_ERROR, 707 .end = IRQ_UART1_ERROR, 708 .flags = IORESOURCE_IRQ, 709 }, 710 { 711 .start = CH_UART1_TX, 712 .end = CH_UART1_TX, 713 .flags = IORESOURCE_DMA, 714 }, 715 { 716 .start = CH_UART1_RX, 717 .end = CH_UART1_RX, 718 .flags = IORESOURCE_DMA, 719 }, 720#ifdef CONFIG_BFIN_UART1_CTSRTS 721 { /* CTS pin */ 722 .start = GPIO_PF9, 723 .end = GPIO_PF9, 724 .flags = IORESOURCE_IO, 725 }, 726 { /* RTS pin */ 727 .start = GPIO_PF10, 728 .end = GPIO_PF10, 729 .flags = IORESOURCE_IO, 730 }, 731#endif 732}; 733 734unsigned short bfin_uart1_peripherals[] = { 735 P_UART1_TX, P_UART1_RX, 0 736}; 737 738static struct platform_device bfin_uart1_device = { 739 .name = "bfin-uart", 740 .id = 1, 741 .num_resources = ARRAY_SIZE(bfin_uart1_resources), 742 .resource = bfin_uart1_resources, 743 .dev = { 744 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ 745 }, 746}; 747#endif 748#endif 749 750#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 751#ifdef CONFIG_BFIN_SIR0 752static struct resource bfin_sir0_resources[] = { 753 { 754 .start = 0xFFC00400, 755 .end = 0xFFC004FF, 756 .flags = IORESOURCE_MEM, 757 }, 758 { 759 .start = IRQ_UART0_RX, 760 .end = IRQ_UART0_RX+1, 761 .flags = IORESOURCE_IRQ, 762 }, 763 { 764 .start = CH_UART0_RX, 765 .end = CH_UART0_RX+1, 766 .flags = IORESOURCE_DMA, 767 }, 768}; 769 770static struct platform_device bfin_sir0_device = { 771 .name = "bfin_sir", 772 .id = 0, 773 .num_resources = ARRAY_SIZE(bfin_sir0_resources), 774 .resource = bfin_sir0_resources, 775}; 776#endif 777#ifdef CONFIG_BFIN_SIR1 778static struct resource bfin_sir1_resources[] = { 779 { 780 .start = 0xFFC02000, 781 .end = 0xFFC020FF, 782 .flags = IORESOURCE_MEM, 783 }, 784 { 785 .start = IRQ_UART1_RX, 786 .end = IRQ_UART1_RX+1, 787 .flags = IORESOURCE_IRQ, 788 }, 789 { 790 .start = CH_UART1_RX, 791 .end = CH_UART1_RX+1, 792 .flags = IORESOURCE_DMA, 793 }, 794}; 795 796static struct platform_device bfin_sir1_device = { 797 .name = "bfin_sir", 798 .id = 1, 799 .num_resources = ARRAY_SIZE(bfin_sir1_resources), 800 .resource = bfin_sir1_resources, 801}; 802#endif 803#endif 804 805#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 806static struct resource bfin_twi0_resource[] = { 807 [0] = { 808 .start = TWI0_REGBASE, 809 .end = TWI0_REGBASE, 810 .flags = IORESOURCE_MEM, 811 }, 812 [1] = { 813 .start = IRQ_TWI, 814 .end = IRQ_TWI, 815 .flags = IORESOURCE_IRQ, 816 }, 817}; 818 819static struct platform_device i2c_bfin_twi_device = { 820 .name = "i2c-bfin-twi", 821 .id = 0, 822 .num_resources = ARRAY_SIZE(bfin_twi0_resource), 823 .resource = bfin_twi0_resource, 824}; 825#endif 826 827#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE) 828#include <linux/mfd/adp5520.h> 829 830 /* 831 * ADP5520/5501 LEDs Data 832 */ 833 834static struct led_info adp5520_leds[] = { 835 { 836 .name = "adp5520-led1", 837 .default_trigger = "none", 838 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms, 839 }, 840}; 841 842static struct adp5520_leds_platform_data adp5520_leds_data = { 843 .num_leds = ARRAY_SIZE(adp5520_leds), 844 .leds = adp5520_leds, 845 .fade_in = ADP5520_FADE_T_600ms, 846 .fade_out = ADP5520_FADE_T_600ms, 847 .led_on_time = ADP5520_LED_ONT_600ms, 848}; 849 850 /* 851 * ADP5520 Keypad Data 852 */ 853 854static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = { 855 [ADP5520_KEY(3, 3)] = KEY_1, 856 [ADP5520_KEY(2, 3)] = KEY_2, 857 [ADP5520_KEY(1, 3)] = KEY_3, 858 [ADP5520_KEY(0, 3)] = KEY_UP, 859 [ADP5520_KEY(3, 2)] = KEY_4, 860 [ADP5520_KEY(2, 2)] = KEY_5, 861 [ADP5520_KEY(1, 2)] = KEY_6, 862 [ADP5520_KEY(0, 2)] = KEY_DOWN, 863 [ADP5520_KEY(3, 1)] = KEY_7, 864 [ADP5520_KEY(2, 1)] = KEY_8, 865 [ADP5520_KEY(1, 1)] = KEY_9, 866 [ADP5520_KEY(0, 1)] = KEY_DOT, 867 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE, 868 [ADP5520_KEY(2, 0)] = KEY_0, 869 [ADP5520_KEY(1, 0)] = KEY_HELP, 870 [ADP5520_KEY(0, 0)] = KEY_ENTER, 871}; 872 873static struct adp5520_keys_platform_data adp5520_keys_data = { 874 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0, 875 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0, 876 .keymap = adp5520_keymap, 877 .keymapsize = ARRAY_SIZE(adp5520_keymap), 878 .repeat = 0, 879}; 880 881 /* 882 * ADP5520/5501 Multifuction Device Init Data 883 */ 884 885static struct adp5520_platform_data adp5520_pdev_data = { 886 .leds = &adp5520_leds_data, 887 .keys = &adp5520_keys_data, 888}; 889 890#endif 891 892static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 893#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE) 894 { 895 I2C_BOARD_INFO("pcf8574_lcd", 0x22), 896 }, 897#endif 898#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE) 899 { 900 I2C_BOARD_INFO("pcf8574_keypad", 0x27), 901 .irq = IRQ_PF8, 902 }, 903#endif 904#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) 905 { 906 I2C_BOARD_INFO("bfin-adv7393", 0x2B), 907 }, 908#endif 909#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || \ 910 defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE) 911 { 912 I2C_BOARD_INFO("ad7879", 0x2C), 913 .irq = IRQ_PF8, 914 .platform_data = (void *)&bfin_ad7879_ts_info, 915 }, 916#endif 917#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE) 918 { 919 I2C_BOARD_INFO("pmic-adp5520", 0x32), 920 .irq = IRQ_PF9, 921 .platform_data = (void *)&adp5520_pdev_data, 922 }, 923#endif 924#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE) 925 { 926 I2C_BOARD_INFO("ssm2602", 0x1b), 927 }, 928#endif 929}; 930 931#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 932#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 933static struct resource bfin_sport0_uart_resources[] = { 934 { 935 .start = SPORT0_TCR1, 936 .end = SPORT0_MRCS3+4, 937 .flags = IORESOURCE_MEM, 938 }, 939 { 940 .start = IRQ_SPORT0_RX, 941 .end = IRQ_SPORT0_RX+1, 942 .flags = IORESOURCE_IRQ, 943 }, 944 { 945 .start = IRQ_SPORT0_ERROR, 946 .end = IRQ_SPORT0_ERROR, 947 .flags = IORESOURCE_IRQ, 948 }, 949}; 950 951unsigned short bfin_sport0_peripherals[] = { 952 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, 953 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 954}; 955 956static struct platform_device bfin_sport0_uart_device = { 957 .name = "bfin-sport-uart", 958 .id = 0, 959 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources), 960 .resource = bfin_sport0_uart_resources, 961 .dev = { 962 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ 963 }, 964}; 965#endif 966#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 967static struct resource bfin_sport1_uart_resources[] = { 968 { 969 .start = SPORT1_TCR1, 970 .end = SPORT1_MRCS3+4, 971 .flags = IORESOURCE_MEM, 972 }, 973 { 974 .start = IRQ_SPORT1_RX, 975 .end = IRQ_SPORT1_RX+1, 976 .flags = IORESOURCE_IRQ, 977 }, 978 { 979 .start = IRQ_SPORT1_ERROR, 980 .end = IRQ_SPORT1_ERROR, 981 .flags = IORESOURCE_IRQ, 982 }, 983}; 984 985unsigned short bfin_sport1_peripherals[] = { 986 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, 987 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0 988}; 989 990static struct platform_device bfin_sport1_uart_device = { 991 .name = "bfin-sport-uart", 992 .id = 1, 993 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources), 994 .resource = bfin_sport1_uart_resources, 995 .dev = { 996 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ 997 }, 998}; 999#endif 1000#endif 1001 1002#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 1003#include <linux/gpio_keys.h> 1004 1005static struct gpio_keys_button bfin_gpio_keys_table[] = { 1006 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"}, 1007 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"}, 1008}; 1009 1010static struct gpio_keys_platform_data bfin_gpio_keys_data = { 1011 .buttons = bfin_gpio_keys_table, 1012 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), 1013}; 1014 1015static struct platform_device bfin_device_gpiokeys = { 1016 .name = "gpio-keys", 1017 .dev = { 1018 .platform_data = &bfin_gpio_keys_data, 1019 }, 1020}; 1021#endif 1022 1023#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE) 1024#include <asm/bfin_rotary.h> 1025 1026static struct bfin_rotary_platform_data bfin_rotary_data = { 1027 /*.rotary_up_key = KEY_UP,*/ 1028 /*.rotary_down_key = KEY_DOWN,*/ 1029 .rotary_rel_code = REL_WHEEL, 1030 .rotary_button_key = KEY_ENTER, 1031 .debounce = 10, /* 0..17 */ 1032 .mode = ROT_QUAD_ENC | ROT_DEBE, 1033}; 1034 1035static struct resource bfin_rotary_resources[] = { 1036 { 1037 .start = IRQ_CNT, 1038 .end = IRQ_CNT, 1039 .flags = IORESOURCE_IRQ, 1040 }, 1041}; 1042 1043static struct platform_device bfin_rotary_device = { 1044 .name = "bfin-rotary", 1045 .id = -1, 1046 .num_resources = ARRAY_SIZE(bfin_rotary_resources), 1047 .resource = bfin_rotary_resources, 1048 .dev = { 1049 .platform_data = &bfin_rotary_data, 1050 }, 1051}; 1052#endif 1053 1054static const unsigned int cclk_vlev_datasheet[] = 1055{ 1056 VRPAIR(VLEV_100, 400000000), 1057 VRPAIR(VLEV_105, 426000000), 1058 VRPAIR(VLEV_110, 500000000), 1059 VRPAIR(VLEV_115, 533000000), 1060 VRPAIR(VLEV_120, 600000000), 1061}; 1062 1063static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { 1064 .tuple_tab = cclk_vlev_datasheet, 1065 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), 1066 .vr_settling_time = 25 /* us */, 1067}; 1068 1069static struct platform_device bfin_dpmc = { 1070 .name = "bfin dpmc", 1071 .dev = { 1072 .platform_data = &bfin_dmpc_vreg_data, 1073 }, 1074}; 1075 1076static struct platform_device *stamp_devices[] __initdata = { 1077 1078 &bfin_dpmc, 1079 1080#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 1081 &bf5xx_nand_device, 1082#endif 1083 1084#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 1085 &bfin_pcmcia_cf_device, 1086#endif 1087 1088#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 1089 &rtc_device, 1090#endif 1091 1092#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) 1093 &bfin_isp1760_device, 1094#endif 1095 1096#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) 1097 &musb_device, 1098#endif 1099 1100#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 1101 &smc91x_device, 1102#endif 1103 1104#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 1105 &dm9000_device, 1106#endif 1107 1108#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 1109 &bfin_mii_bus, 1110 &bfin_mac_device, 1111#endif 1112 1113#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 1114 &net2272_bfin_device, 1115#endif 1116 1117#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 1118 &bfin_spi0_device, 1119#endif 1120 1121#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE) 1122 &bf52x_t350mcqb_device, 1123#endif 1124 1125#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 1126 &bfin_lq035q1_device, 1127#endif 1128 1129#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 1130#ifdef CONFIG_SERIAL_BFIN_UART0 1131 &bfin_uart0_device, 1132#endif 1133#ifdef CONFIG_SERIAL_BFIN_UART1 1134 &bfin_uart1_device, 1135#endif 1136#endif 1137 1138#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 1139#ifdef CONFIG_BFIN_SIR0 1140 &bfin_sir0_device, 1141#endif 1142#ifdef CONFIG_BFIN_SIR1 1143 &bfin_sir1_device, 1144#endif 1145#endif 1146 1147#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 1148 &i2c_bfin_twi_device, 1149#endif 1150 1151#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 1152#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 1153 &bfin_sport0_uart_device, 1154#endif 1155#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 1156 &bfin_sport1_uart_device, 1157#endif 1158#endif 1159 1160#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 1161 &bfin_device_gpiokeys, 1162#endif 1163 1164#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE) 1165 &bfin_rotary_device, 1166#endif 1167 1168#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 1169 &ezkit_flash_device, 1170#endif 1171 1172#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) 1173 &bfin_i2s, 1174#endif 1175 1176#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) 1177 &bfin_tdm, 1178#endif 1179}; 1180 1181static int __init ezkit_init(void) 1182{ 1183 printk(KERN_INFO "%s(): registering device resources\n", __func__); 1184 i2c_register_board_info(0, bfin_i2c_board_info, 1185 ARRAY_SIZE(bfin_i2c_board_info)); 1186 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 1187 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 1188 return 0; 1189} 1190 1191arch_initcall(ezkit_init); 1192 1193static struct platform_device *ezkit_early_devices[] __initdata = { 1194#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) 1195#ifdef CONFIG_SERIAL_BFIN_UART0 1196 &bfin_uart0_device, 1197#endif 1198#ifdef CONFIG_SERIAL_BFIN_UART1 1199 &bfin_uart1_device, 1200#endif 1201#endif 1202 1203#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE) 1204#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 1205 &bfin_sport0_uart_device, 1206#endif 1207#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 1208 &bfin_sport1_uart_device, 1209#endif 1210#endif 1211}; 1212 1213void __init native_machine_early_platform_add_devices(void) 1214{ 1215 printk(KERN_INFO "register early platform devices\n"); 1216 early_platform_add_devices(ezkit_early_devices, 1217 ARRAY_SIZE(ezkit_early_devices)); 1218} 1219 1220void native_machine_restart(char *cmd) 1221{ 1222 if ((bfin_read_SYSCR() & 0x7) == 0x3) 1223 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 1224} 1225 1226void bfin_get_ether_addr(char *addr) 1227{ 1228 /* the MAC is stored in OTP memory page 0xDF */ 1229 u32 ret; 1230 u64 otp_mac; 1231 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A; 1232 1233 ret = otp_read(0xDF, 0x00, &otp_mac); 1234 if (!(ret & 0x1)) { 1235 char *otp_mac_p = (char *)&otp_mac; 1236 for (ret = 0; ret < 6; ++ret) 1237 addr[ret] = otp_mac_p[5 - ret]; 1238 } 1239} 1240EXPORT_SYMBOL(bfin_get_ether_addr); 1241