1/* linux/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h 2 * 3 * Copyright (C) 2009 Samsung Electronics Ltd. 4 * Jaswinder Singh <jassi.brar@samsung.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11#ifndef __S3C64XX_PLAT_SPI_H 12#define __S3C64XX_PLAT_SPI_H 13 14/** 15 * struct s3c64xx_spi_csinfo - ChipSelect description 16 * @fb_delay: Slave specific feedback delay. 17 * Refer to FB_CLK_SEL register definition in SPI chapter. 18 * @line: Custom 'identity' of the CS line. 19 * @set_level: CS line control. 20 * 21 * This is per SPI-Slave Chipselect information. 22 * Allocate and initialize one in machine init code and make the 23 * spi_board_info.controller_data point to it. 24 */ 25struct s3c64xx_spi_csinfo { 26 u8 fb_delay; 27 unsigned line; 28 void (*set_level)(unsigned line_id, int lvl); 29}; 30 31/** 32 * struct s3c64xx_spi_info - SPI Controller defining structure 33 * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. 34 * @src_clk_name: Platform name of the corresponding clock. 35 * @num_cs: Number of CS this controller emulates. 36 * @cfg_gpio: Configure pins for this SPI controller. 37 * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6 38 * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number 39 * @high_speed: If the controller supports HIGH_SPEED_EN bit 40 */ 41struct s3c64xx_spi_info { 42 int src_clk_nr; 43 char *src_clk_name; 44 45 int num_cs; 46 47 int (*cfg_gpio)(struct platform_device *pdev); 48 49 /* Following two fields are for future compatibility */ 50 int fifo_lvl_mask; 51 int rx_lvl_offset; 52 int high_speed; 53}; 54 55/** 56 * s3c64xx_spi_set_info - SPI Controller configure callback by the board 57 * initialization code. 58 * @cntrlr: SPI controller number the configuration is for. 59 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. 60 * @num_cs: Number of elements in the 'cs' array. 61 * 62 * Call this from machine init code for each SPI Controller that 63 * has some chips attached to it. 64 */ 65extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 66extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 67extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 68extern void s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 69extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 70 71#endif /* __S3C64XX_PLAT_SPI_H */ 72