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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-orion5x/
1/*
2 * arch/arm/mach-orion5x/wnr854t-setup.c
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2.  This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/platform_device.h>
12#include <linux/pci.h>
13#include <linux/irq.h>
14#include <linux/delay.h>
15#include <linux/mtd/physmap.h>
16#include <linux/mv643xx_eth.h>
17#include <linux/ethtool.h>
18#include <net/dsa.h>
19#include <asm/mach-types.h>
20#include <asm/gpio.h>
21#include <asm/mach/arch.h>
22#include <asm/mach/pci.h>
23#include <mach/orion5x.h>
24#include "common.h"
25#include "mpp.h"
26
27static struct orion5x_mpp_mode wnr854t_mpp_modes[] __initdata = {
28	{  0, MPP_GPIO },		/* Power LED green (0=on) */
29	{  1, MPP_GPIO },		/* Reset Button (0=off) */
30	{  2, MPP_GPIO },		/* Power LED blink (0=off) */
31	{  3, MPP_GPIO },		/* WAN Status LED amber (0=off) */
32	{  4, MPP_GPIO },		/* PCI int */
33	{  5, MPP_GPIO },		/* ??? */
34	{  6, MPP_GPIO },		/* ??? */
35	{  7, MPP_GPIO },		/* ??? */
36	{  8, MPP_UNUSED },		/* ??? */
37	{  9, MPP_GIGE },		/* GE_RXERR */
38	{ 10, MPP_UNUSED },		/* ??? */
39	{ 11, MPP_UNUSED },		/* ??? */
40	{ 12, MPP_GIGE },		/* GE_TXD[4] */
41	{ 13, MPP_GIGE },		/* GE_TXD[5] */
42	{ 14, MPP_GIGE },		/* GE_TXD[6] */
43	{ 15, MPP_GIGE },		/* GE_TXD[7] */
44	{ 16, MPP_GIGE },		/* GE_RXD[4] */
45	{ 17, MPP_GIGE },		/* GE_RXD[5] */
46	{ 18, MPP_GIGE },		/* GE_RXD[6] */
47	{ 19, MPP_GIGE },		/* GE_RXD[7] */
48	{ -1 },
49};
50
51/*
52 * 8M NOR flash Device bus boot chip select
53 */
54#define WNR854T_NOR_BOOT_BASE	0xf4000000
55#define WNR854T_NOR_BOOT_SIZE	SZ_8M
56
57static struct mtd_partition wnr854t_nor_flash_partitions[] = {
58	{
59		.name		= "kernel",
60		.offset		= 0x00000000,
61		.size		= 0x00100000,
62	}, {
63		.name		= "rootfs",
64		.offset		= 0x00100000,
65		.size		= 0x00660000,
66	}, {
67		.name		= "uboot",
68		.offset		= 0x00760000,
69		.size		= 0x00040000,
70	},
71};
72
73static struct physmap_flash_data wnr854t_nor_flash_data = {
74	.width		= 2,
75	.parts		= wnr854t_nor_flash_partitions,
76	.nr_parts	= ARRAY_SIZE(wnr854t_nor_flash_partitions),
77};
78
79static struct resource wnr854t_nor_flash_resource = {
80	.flags		= IORESOURCE_MEM,
81	.start		= WNR854T_NOR_BOOT_BASE,
82	.end		= WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
83};
84
85static struct platform_device wnr854t_nor_flash = {
86	.name			= "physmap-flash",
87	.id			= 0,
88	.dev		= {
89		.platform_data	= &wnr854t_nor_flash_data,
90	},
91	.num_resources		= 1,
92	.resource		= &wnr854t_nor_flash_resource,
93};
94
95static struct mv643xx_eth_platform_data wnr854t_eth_data = {
96	.phy_addr	= MV643XX_ETH_PHY_NONE,
97	.speed		= SPEED_1000,
98	.duplex		= DUPLEX_FULL,
99};
100
101static struct dsa_chip_data wnr854t_switch_chip_data = {
102	.port_names[0] = "lan3",
103	.port_names[1] = "lan4",
104	.port_names[2] = "wan",
105	.port_names[3] = "cpu",
106	.port_names[5] = "lan1",
107	.port_names[7] = "lan2",
108};
109
110static struct dsa_platform_data wnr854t_switch_plat_data = {
111	.nr_chips	= 1,
112	.chip		= &wnr854t_switch_chip_data,
113};
114
115static void __init wnr854t_init(void)
116{
117	/*
118	 * Setup basic Orion functions. Need to be called early.
119	 */
120	orion5x_init();
121
122	orion5x_mpp_conf(wnr854t_mpp_modes);
123
124	/*
125	 * Configure peripherals.
126	 */
127	orion5x_eth_init(&wnr854t_eth_data);
128	orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ);
129	orion5x_uart0_init();
130
131	orion5x_setup_dev_boot_win(WNR854T_NOR_BOOT_BASE,
132				   WNR854T_NOR_BOOT_SIZE);
133	platform_device_register(&wnr854t_nor_flash);
134}
135
136static int __init wnr854t_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
137{
138	int irq;
139
140	/*
141	 * Check for devices with hard-wired IRQs.
142	 */
143	irq = orion5x_pci_map_irq(dev, slot, pin);
144	if (irq != -1)
145		return irq;
146
147	/*
148	 * Mini-PCI slot.
149	 */
150	if (slot == 7)
151		return gpio_to_irq(4);
152
153	return -1;
154}
155
156static struct hw_pci wnr854t_pci __initdata = {
157	.nr_controllers	= 2,
158	.swizzle	= pci_std_swizzle,
159	.setup		= orion5x_pci_sys_setup,
160	.scan		= orion5x_pci_sys_scan_bus,
161	.map_irq	= wnr854t_pci_map_irq,
162};
163
164static int __init wnr854t_pci_init(void)
165{
166	if (machine_is_wnr854t())
167		pci_common_init(&wnr854t_pci);
168
169	return 0;
170}
171subsys_initcall(wnr854t_pci_init);
172
173MACHINE_START(WNR854T, "Netgear WNR854T")
174	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
175	.phys_io	= ORION5X_REGS_PHYS_BASE,
176	.io_pg_offst	= ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
177	.boot_params	= 0x00000100,
178	.init_machine	= wnr854t_init,
179	.map_io		= orion5x_map_io,
180	.init_irq	= orion5x_init_irq,
181	.timer		= &orion5x_timer,
182	.fixup		= tag_fixup_mem32,
183MACHINE_END
184