1/* 2 * OMAP44xx PRM instance offset macros 3 * 4 * Copyright (C) 2009-2010 Texas Instruments, Inc. 5 * Copyright (C) 2009-2010 Nokia Corporation 6 * 7 * Paul Walmsley (paul@pwsan.com) 8 * Rajendra Nayak (rnayak@ti.com) 9 * Benoit Cousson (b-cousson@ti.com) 10 * 11 * This file is automatically generated from the OMAP hardware databases. 12 * We respectfully ask that any modifications to this file be coordinated 13 * with the public linux-omap@vger.kernel.org mailing list and the 14 * authors above to ensure that the autogeneration scripts are kept 15 * up-to-date with the file contents. 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License version 2 as 19 * published by the Free Software Foundation. 20 */ 21 22#ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_H 23#define __ARCH_ARM_MACH_OMAP2_PRM44XX_H 24 25 26/* PRM */ 27 28/* PRM.OCP_SOCKET_PRM register offsets */ 29#define OMAP4_REVISION_PRM_OFFSET 0x0000 30#define OMAP4430_REVISION_PRM OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0000) 31#define OMAP4_PRM_IRQSTATUS_MPU_OFFSET 0x0010 32#define OMAP4430_PRM_IRQSTATUS_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0010) 33#define OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET 0x0014 34#define OMAP4430_PRM_IRQSTATUS_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0014) 35#define OMAP4_PRM_IRQENABLE_MPU_OFFSET 0x0018 36#define OMAP4430_PRM_IRQENABLE_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0018) 37#define OMAP4_PRM_IRQENABLE_MPU_2_OFFSET 0x001c 38#define OMAP4430_PRM_IRQENABLE_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x001c) 39#define OMAP4_PRM_IRQSTATUS_DUCATI_OFFSET 0x0020 40#define OMAP4430_PRM_IRQSTATUS_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0020) 41#define OMAP4_PRM_IRQENABLE_DUCATI_OFFSET 0x0028 42#define OMAP4430_PRM_IRQENABLE_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0028) 43#define OMAP4_PRM_IRQSTATUS_TESLA_OFFSET 0x0030 44#define OMAP4430_PRM_IRQSTATUS_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0030) 45#define OMAP4_PRM_IRQENABLE_TESLA_OFFSET 0x0038 46#define OMAP4430_PRM_IRQENABLE_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0038) 47#define OMAP4_PRM_PRM_PROFILING_CLKCTRL_OFFSET 0x0040 48#define OMAP4430_PRM_PRM_PROFILING_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0040) 49 50/* PRM.CKGEN_PRM register offsets */ 51#define OMAP4_CM_ABE_DSS_SYS_CLKSEL_OFFSET 0x0000 52#define OMAP4430_CM_ABE_DSS_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_MOD, 0x0000) 53#define OMAP4_CM_DPLL_SYS_REF_CLKSEL_OFFSET 0x0004 54#define OMAP4430_CM_DPLL_SYS_REF_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_MOD, 0x0004) 55#define OMAP4_CM_L4_WKUP_CLKSEL_OFFSET 0x0008 56#define OMAP4430_CM_L4_WKUP_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_MOD, 0x0008) 57#define OMAP4_CM_ABE_PLL_REF_CLKSEL_OFFSET 0x000c 58#define OMAP4430_CM_ABE_PLL_REF_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_MOD, 0x000c) 59#define OMAP4_CM_SYS_CLKSEL_OFFSET 0x0010 60#define OMAP4430_CM_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_MOD, 0x0010) 61 62/* PRM.MPU_PRM register offsets */ 63#define OMAP4_PM_MPU_PWRSTCTRL_OFFSET 0x0000 64#define OMAP4430_PM_MPU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_MOD, 0x0000) 65#define OMAP4_PM_MPU_PWRSTST_OFFSET 0x0004 66#define OMAP4430_PM_MPU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_MOD, 0x0004) 67#define OMAP4_RM_MPU_RSTST_OFFSET 0x0014 68#define OMAP4430_RM_MPU_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_MOD, 0x0014) 69#define OMAP4_RM_MPU_MPU_CONTEXT_OFFSET 0x0024 70#define OMAP4430_RM_MPU_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_MOD, 0x0024) 71 72/* PRM.TESLA_PRM register offsets */ 73#define OMAP4_PM_TESLA_PWRSTCTRL_OFFSET 0x0000 74#define OMAP4430_PM_TESLA_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0000) 75#define OMAP4_PM_TESLA_PWRSTST_OFFSET 0x0004 76#define OMAP4430_PM_TESLA_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0004) 77#define OMAP4_RM_TESLA_RSTCTRL_OFFSET 0x0010 78#define OMAP4430_RM_TESLA_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0010) 79#define OMAP4_RM_TESLA_RSTST_OFFSET 0x0014 80#define OMAP4430_RM_TESLA_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0014) 81#define OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET 0x0024 82#define OMAP4430_RM_TESLA_TESLA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0024) 83 84/* PRM.ABE_PRM register offsets */ 85#define OMAP4_PM_ABE_PWRSTCTRL_OFFSET 0x0000 86#define OMAP4430_PM_ABE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0000) 87#define OMAP4_PM_ABE_PWRSTST_OFFSET 0x0004 88#define OMAP4430_PM_ABE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0004) 89#define OMAP4_RM_ABE_AESS_CONTEXT_OFFSET 0x002c 90#define OMAP4430_RM_ABE_AESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x002c) 91#define OMAP4_PM_ABE_PDM_WKDEP_OFFSET 0x0030 92#define OMAP4430_PM_ABE_PDM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0030) 93#define OMAP4_RM_ABE_PDM_CONTEXT_OFFSET 0x0034 94#define OMAP4430_RM_ABE_PDM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0034) 95#define OMAP4_PM_ABE_DMIC_WKDEP_OFFSET 0x0038 96#define OMAP4430_PM_ABE_DMIC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0038) 97#define OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET 0x003c 98#define OMAP4430_RM_ABE_DMIC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x003c) 99#define OMAP4_PM_ABE_MCASP_WKDEP_OFFSET 0x0040 100#define OMAP4430_PM_ABE_MCASP_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0040) 101#define OMAP4_RM_ABE_MCASP_CONTEXT_OFFSET 0x0044 102#define OMAP4430_RM_ABE_MCASP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0044) 103#define OMAP4_PM_ABE_MCBSP1_WKDEP_OFFSET 0x0048 104#define OMAP4430_PM_ABE_MCBSP1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0048) 105#define OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET 0x004c 106#define OMAP4430_RM_ABE_MCBSP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x004c) 107#define OMAP4_PM_ABE_MCBSP2_WKDEP_OFFSET 0x0050 108#define OMAP4430_PM_ABE_MCBSP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0050) 109#define OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET 0x0054 110#define OMAP4430_RM_ABE_MCBSP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0054) 111#define OMAP4_PM_ABE_MCBSP3_WKDEP_OFFSET 0x0058 112#define OMAP4430_PM_ABE_MCBSP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0058) 113#define OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET 0x005c 114#define OMAP4430_RM_ABE_MCBSP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x005c) 115#define OMAP4_PM_ABE_SLIMBUS_WKDEP_OFFSET 0x0060 116#define OMAP4430_PM_ABE_SLIMBUS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0060) 117#define OMAP4_RM_ABE_SLIMBUS_CONTEXT_OFFSET 0x0064 118#define OMAP4430_RM_ABE_SLIMBUS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0064) 119#define OMAP4_PM_ABE_TIMER5_WKDEP_OFFSET 0x0068 120#define OMAP4430_PM_ABE_TIMER5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0068) 121#define OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET 0x006c 122#define OMAP4430_RM_ABE_TIMER5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x006c) 123#define OMAP4_PM_ABE_TIMER6_WKDEP_OFFSET 0x0070 124#define OMAP4430_PM_ABE_TIMER6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0070) 125#define OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET 0x0074 126#define OMAP4430_RM_ABE_TIMER6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0074) 127#define OMAP4_PM_ABE_TIMER7_WKDEP_OFFSET 0x0078 128#define OMAP4430_PM_ABE_TIMER7_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0078) 129#define OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET 0x007c 130#define OMAP4430_RM_ABE_TIMER7_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x007c) 131#define OMAP4_PM_ABE_TIMER8_WKDEP_OFFSET 0x0080 132#define OMAP4430_PM_ABE_TIMER8_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0080) 133#define OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET 0x0084 134#define OMAP4430_RM_ABE_TIMER8_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0084) 135#define OMAP4_PM_ABE_WDT3_WKDEP_OFFSET 0x0088 136#define OMAP4430_PM_ABE_WDT3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0088) 137#define OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET 0x008c 138#define OMAP4430_RM_ABE_WDT3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x008c) 139 140/* PRM.ALWAYS_ON_PRM register offsets */ 141#define OMAP4_RM_ALWON_MDMINTC_CONTEXT_OFFSET 0x0024 142#define OMAP4430_RM_ALWON_MDMINTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0024) 143#define OMAP4_PM_ALWON_SR_MPU_WKDEP_OFFSET 0x0028 144#define OMAP4430_PM_ALWON_SR_MPU_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0028) 145#define OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET 0x002c 146#define OMAP4430_RM_ALWON_SR_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x002c) 147#define OMAP4_PM_ALWON_SR_IVA_WKDEP_OFFSET 0x0030 148#define OMAP4430_PM_ALWON_SR_IVA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0030) 149#define OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET 0x0034 150#define OMAP4430_RM_ALWON_SR_IVA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0034) 151#define OMAP4_PM_ALWON_SR_CORE_WKDEP_OFFSET 0x0038 152#define OMAP4430_PM_ALWON_SR_CORE_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0038) 153#define OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET 0x003c 154#define OMAP4430_RM_ALWON_SR_CORE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x003c) 155 156/* PRM.CORE_PRM register offsets */ 157#define OMAP4_PM_CORE_PWRSTCTRL_OFFSET 0x0000 158#define OMAP4430_PM_CORE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0000) 159#define OMAP4_PM_CORE_PWRSTST_OFFSET 0x0004 160#define OMAP4430_PM_CORE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0004) 161#define OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET 0x0024 162#define OMAP4430_RM_L3_1_L3_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0024) 163#define OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET 0x0124 164#define OMAP4430_RM_L3_2_L3_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0124) 165#define OMAP4_RM_L3_2_GPMC_CONTEXT_OFFSET 0x012c 166#define OMAP4430_RM_L3_2_GPMC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x012c) 167#define OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET 0x0134 168#define OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0134) 169#define OMAP4_RM_DUCATI_RSTCTRL_OFFSET 0x0210 170#define OMAP4430_RM_DUCATI_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0210) 171#define OMAP4_RM_DUCATI_RSTST_OFFSET 0x0214 172#define OMAP4430_RM_DUCATI_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0214) 173#define OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET 0x0224 174#define OMAP4430_RM_DUCATI_DUCATI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0224) 175#define OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET 0x0324 176#define OMAP4430_RM_SDMA_SDMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0324) 177#define OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET 0x0424 178#define OMAP4430_RM_MEMIF_DMM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0424) 179#define OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET 0x042c 180#define OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x042c) 181#define OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET 0x0434 182#define OMAP4430_RM_MEMIF_EMIF_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0434) 183#define OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET 0x043c 184#define OMAP4430_RM_MEMIF_EMIF_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x043c) 185#define OMAP4_RM_MEMIF_DLL_CONTEXT_OFFSET 0x0444 186#define OMAP4430_RM_MEMIF_DLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0444) 187#define OMAP4_RM_MEMIF_EMIF_H1_CONTEXT_OFFSET 0x0454 188#define OMAP4430_RM_MEMIF_EMIF_H1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0454) 189#define OMAP4_RM_MEMIF_EMIF_H2_CONTEXT_OFFSET 0x045c 190#define OMAP4430_RM_MEMIF_EMIF_H2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x045c) 191#define OMAP4_RM_MEMIF_DLL_H_CONTEXT_OFFSET 0x0464 192#define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0464) 193#define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 194#define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0524) 195#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c 196#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x052c) 197#define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534 198#define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0534) 199#define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624 200#define OMAP4430_RM_L4CFG_L4_CFG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0624) 201#define OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET 0x062c 202#define OMAP4430_RM_L4CFG_HW_SEM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x062c) 203#define OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET 0x0634 204#define OMAP4430_RM_L4CFG_MAILBOX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0634) 205#define OMAP4_RM_L4CFG_SAR_ROM_CONTEXT_OFFSET 0x063c 206#define OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x063c) 207#define OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET 0x0724 208#define OMAP4430_RM_L3INSTR_L3_3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0724) 209#define OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET 0x072c 210#define OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x072c) 211#define OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET 0x0744 212#define OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0744) 213 214/* PRM.IVAHD_PRM register offsets */ 215#define OMAP4_PM_IVAHD_PWRSTCTRL_OFFSET 0x0000 216#define OMAP4430_PM_IVAHD_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0000) 217#define OMAP4_PM_IVAHD_PWRSTST_OFFSET 0x0004 218#define OMAP4430_PM_IVAHD_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0004) 219#define OMAP4_RM_IVAHD_RSTCTRL_OFFSET 0x0010 220#define OMAP4430_RM_IVAHD_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0010) 221#define OMAP4_RM_IVAHD_RSTST_OFFSET 0x0014 222#define OMAP4430_RM_IVAHD_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0014) 223#define OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET 0x0024 224#define OMAP4430_RM_IVAHD_IVAHD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0024) 225#define OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET 0x002c 226#define OMAP4430_RM_IVAHD_SL2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x002c) 227 228/* PRM.CAM_PRM register offsets */ 229#define OMAP4_PM_CAM_PWRSTCTRL_OFFSET 0x0000 230#define OMAP4430_PM_CAM_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_MOD, 0x0000) 231#define OMAP4_PM_CAM_PWRSTST_OFFSET 0x0004 232#define OMAP4430_PM_CAM_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_MOD, 0x0004) 233#define OMAP4_RM_CAM_ISS_CONTEXT_OFFSET 0x0024 234#define OMAP4430_RM_CAM_ISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_MOD, 0x0024) 235#define OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET 0x002c 236#define OMAP4430_RM_CAM_FDIF_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_MOD, 0x002c) 237 238/* PRM.DSS_PRM register offsets */ 239#define OMAP4_PM_DSS_PWRSTCTRL_OFFSET 0x0000 240#define OMAP4430_PM_DSS_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x0000) 241#define OMAP4_PM_DSS_PWRSTST_OFFSET 0x0004 242#define OMAP4430_PM_DSS_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x0004) 243#define OMAP4_PM_DSS_DSS_WKDEP_OFFSET 0x0020 244#define OMAP4430_PM_DSS_DSS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x0020) 245#define OMAP4_RM_DSS_DSS_CONTEXT_OFFSET 0x0024 246#define OMAP4430_RM_DSS_DSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x0024) 247#define OMAP4_RM_DSS_DEISS_CONTEXT_OFFSET 0x002c 248#define OMAP4430_RM_DSS_DEISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x002c) 249 250/* PRM.GFX_PRM register offsets */ 251#define OMAP4_PM_GFX_PWRSTCTRL_OFFSET 0x0000 252#define OMAP4430_PM_GFX_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_MOD, 0x0000) 253#define OMAP4_PM_GFX_PWRSTST_OFFSET 0x0004 254#define OMAP4430_PM_GFX_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_MOD, 0x0004) 255#define OMAP4_RM_GFX_GFX_CONTEXT_OFFSET 0x0024 256#define OMAP4430_RM_GFX_GFX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_MOD, 0x0024) 257 258/* PRM.L3INIT_PRM register offsets */ 259#define OMAP4_PM_L3INIT_PWRSTCTRL_OFFSET 0x0000 260#define OMAP4430_PM_L3INIT_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0000) 261#define OMAP4_PM_L3INIT_PWRSTST_OFFSET 0x0004 262#define OMAP4430_PM_L3INIT_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0004) 263#define OMAP4_PM_L3INIT_MMC1_WKDEP_OFFSET 0x0028 264#define OMAP4430_PM_L3INIT_MMC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0028) 265#define OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET 0x002c 266#define OMAP4430_RM_L3INIT_MMC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x002c) 267#define OMAP4_PM_L3INIT_MMC2_WKDEP_OFFSET 0x0030 268#define OMAP4430_PM_L3INIT_MMC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0030) 269#define OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET 0x0034 270#define OMAP4430_RM_L3INIT_MMC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0034) 271#define OMAP4_PM_L3INIT_HSI_WKDEP_OFFSET 0x0038 272#define OMAP4430_PM_L3INIT_HSI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0038) 273#define OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET 0x003c 274#define OMAP4430_RM_L3INIT_HSI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x003c) 275#define OMAP4_PM_L3INIT_UNIPRO1_WKDEP_OFFSET 0x0040 276#define OMAP4430_PM_L3INIT_UNIPRO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0040) 277#define OMAP4_RM_L3INIT_UNIPRO1_CONTEXT_OFFSET 0x0044 278#define OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0044) 279#define OMAP4_PM_L3INIT_USB_HOST_WKDEP_OFFSET 0x0058 280#define OMAP4430_PM_L3INIT_USB_HOST_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0058) 281#define OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET 0x005c 282#define OMAP4430_RM_L3INIT_USB_HOST_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x005c) 283#define OMAP4_PM_L3INIT_USB_OTG_WKDEP_OFFSET 0x0060 284#define OMAP4430_PM_L3INIT_USB_OTG_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0060) 285#define OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET 0x0064 286#define OMAP4430_RM_L3INIT_USB_OTG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0064) 287#define OMAP4_PM_L3INIT_USB_TLL_WKDEP_OFFSET 0x0068 288#define OMAP4430_PM_L3INIT_USB_TLL_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0068) 289#define OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET 0x006c 290#define OMAP4430_RM_L3INIT_USB_TLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x006c) 291#define OMAP4_RM_L3INIT_P1500_CONTEXT_OFFSET 0x007c 292#define OMAP4430_RM_L3INIT_P1500_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x007c) 293#define OMAP4_RM_L3INIT_EMAC_CONTEXT_OFFSET 0x0084 294#define OMAP4430_RM_L3INIT_EMAC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0084) 295#define OMAP4_PM_L3INIT_SATA_WKDEP_OFFSET 0x0088 296#define OMAP4430_PM_L3INIT_SATA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0088) 297#define OMAP4_RM_L3INIT_SATA_CONTEXT_OFFSET 0x008c 298#define OMAP4430_RM_L3INIT_SATA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x008c) 299#define OMAP4_RM_L3INIT_TPPSS_CONTEXT_OFFSET 0x0094 300#define OMAP4430_RM_L3INIT_TPPSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0094) 301#define OMAP4_PM_L3INIT_PCIESS_WKDEP_OFFSET 0x0098 302#define OMAP4430_PM_L3INIT_PCIESS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0098) 303#define OMAP4_RM_L3INIT_PCIESS_CONTEXT_OFFSET 0x009c 304#define OMAP4430_RM_L3INIT_PCIESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x009c) 305#define OMAP4_RM_L3INIT_CCPTX_CONTEXT_OFFSET 0x00ac 306#define OMAP4430_RM_L3INIT_CCPTX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00ac) 307#define OMAP4_PM_L3INIT_XHPI_WKDEP_OFFSET 0x00c0 308#define OMAP4430_PM_L3INIT_XHPI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00c0) 309#define OMAP4_RM_L3INIT_XHPI_CONTEXT_OFFSET 0x00c4 310#define OMAP4430_RM_L3INIT_XHPI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00c4) 311#define OMAP4_PM_L3INIT_MMC6_WKDEP_OFFSET 0x00c8 312#define OMAP4430_PM_L3INIT_MMC6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00c8) 313#define OMAP4_RM_L3INIT_MMC6_CONTEXT_OFFSET 0x00cc 314#define OMAP4430_RM_L3INIT_MMC6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00cc) 315#define OMAP4_PM_L3INIT_USB_HOST_FS_WKDEP_OFFSET 0x00d0 316#define OMAP4430_PM_L3INIT_USB_HOST_FS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00d0) 317#define OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET 0x00d4 318#define OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00d4) 319#define OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET 0x00e4 320#define OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00e4) 321 322/* PRM.L4PER_PRM register offsets */ 323#define OMAP4_PM_L4PER_PWRSTCTRL_OFFSET 0x0000 324#define OMAP4430_PM_L4PER_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0000) 325#define OMAP4_PM_L4PER_PWRSTST_OFFSET 0x0004 326#define OMAP4430_PM_L4PER_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0004) 327#define OMAP4_RM_L4PER_ADC_CONTEXT_OFFSET 0x0024 328#define OMAP4430_RM_L4PER_ADC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0024) 329#define OMAP4_PM_L4PER_DMTIMER10_WKDEP_OFFSET 0x0028 330#define OMAP4430_PM_L4PER_DMTIMER10_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0028) 331#define OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET 0x002c 332#define OMAP4430_RM_L4PER_DMTIMER10_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x002c) 333#define OMAP4_PM_L4PER_DMTIMER11_WKDEP_OFFSET 0x0030 334#define OMAP4430_PM_L4PER_DMTIMER11_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0030) 335#define OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET 0x0034 336#define OMAP4430_RM_L4PER_DMTIMER11_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0034) 337#define OMAP4_PM_L4PER_DMTIMER2_WKDEP_OFFSET 0x0038 338#define OMAP4430_PM_L4PER_DMTIMER2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0038) 339#define OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET 0x003c 340#define OMAP4430_RM_L4PER_DMTIMER2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x003c) 341#define OMAP4_PM_L4PER_DMTIMER3_WKDEP_OFFSET 0x0040 342#define OMAP4430_PM_L4PER_DMTIMER3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0040) 343#define OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET 0x0044 344#define OMAP4430_RM_L4PER_DMTIMER3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0044) 345#define OMAP4_PM_L4PER_DMTIMER4_WKDEP_OFFSET 0x0048 346#define OMAP4430_PM_L4PER_DMTIMER4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0048) 347#define OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET 0x004c 348#define OMAP4430_RM_L4PER_DMTIMER4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x004c) 349#define OMAP4_PM_L4PER_DMTIMER9_WKDEP_OFFSET 0x0050 350#define OMAP4430_PM_L4PER_DMTIMER9_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0050) 351#define OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET 0x0054 352#define OMAP4430_RM_L4PER_DMTIMER9_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0054) 353#define OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET 0x005c 354#define OMAP4430_RM_L4PER_ELM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x005c) 355#define OMAP4_PM_L4PER_GPIO2_WKDEP_OFFSET 0x0060 356#define OMAP4430_PM_L4PER_GPIO2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0060) 357#define OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET 0x0064 358#define OMAP4430_RM_L4PER_GPIO2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0064) 359#define OMAP4_PM_L4PER_GPIO3_WKDEP_OFFSET 0x0068 360#define OMAP4430_PM_L4PER_GPIO3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0068) 361#define OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET 0x006c 362#define OMAP4430_RM_L4PER_GPIO3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x006c) 363#define OMAP4_PM_L4PER_GPIO4_WKDEP_OFFSET 0x0070 364#define OMAP4430_PM_L4PER_GPIO4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0070) 365#define OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET 0x0074 366#define OMAP4430_RM_L4PER_GPIO4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0074) 367#define OMAP4_PM_L4PER_GPIO5_WKDEP_OFFSET 0x0078 368#define OMAP4430_PM_L4PER_GPIO5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0078) 369#define OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET 0x007c 370#define OMAP4430_RM_L4PER_GPIO5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x007c) 371#define OMAP4_PM_L4PER_GPIO6_WKDEP_OFFSET 0x0080 372#define OMAP4430_PM_L4PER_GPIO6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0080) 373#define OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET 0x0084 374#define OMAP4430_RM_L4PER_GPIO6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0084) 375#define OMAP4_RM_L4PER_HDQ1W_CONTEXT_OFFSET 0x008c 376#define OMAP4430_RM_L4PER_HDQ1W_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x008c) 377#define OMAP4_PM_L4PER_HECC1_WKDEP_OFFSET 0x0090 378#define OMAP4430_PM_L4PER_HECC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0090) 379#define OMAP4_RM_L4PER_HECC1_CONTEXT_OFFSET 0x0094 380#define OMAP4430_RM_L4PER_HECC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0094) 381#define OMAP4_PM_L4PER_HECC2_WKDEP_OFFSET 0x0098 382#define OMAP4430_PM_L4PER_HECC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0098) 383#define OMAP4_RM_L4PER_HECC2_CONTEXT_OFFSET 0x009c 384#define OMAP4430_RM_L4PER_HECC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x009c) 385#define OMAP4_PM_L4PER_I2C1_WKDEP_OFFSET 0x00a0 386#define OMAP4430_PM_L4PER_I2C1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00a0) 387#define OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET 0x00a4 388#define OMAP4430_RM_L4PER_I2C1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00a4) 389#define OMAP4_PM_L4PER_I2C2_WKDEP_OFFSET 0x00a8 390#define OMAP4430_PM_L4PER_I2C2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00a8) 391#define OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET 0x00ac 392#define OMAP4430_RM_L4PER_I2C2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00ac) 393#define OMAP4_PM_L4PER_I2C3_WKDEP_OFFSET 0x00b0 394#define OMAP4430_PM_L4PER_I2C3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00b0) 395#define OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET 0x00b4 396#define OMAP4430_RM_L4PER_I2C3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00b4) 397#define OMAP4_PM_L4PER_I2C4_WKDEP_OFFSET 0x00b8 398#define OMAP4430_PM_L4PER_I2C4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00b8) 399#define OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET 0x00bc 400#define OMAP4430_RM_L4PER_I2C4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00bc) 401#define OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET 0x00c0 402#define OMAP4430_RM_L4PER_L4_PER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00c0) 403#define OMAP4_PM_L4PER_MCASP2_WKDEP_OFFSET 0x00d0 404#define OMAP4430_PM_L4PER_MCASP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00d0) 405#define OMAP4_RM_L4PER_MCASP2_CONTEXT_OFFSET 0x00d4 406#define OMAP4430_RM_L4PER_MCASP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00d4) 407#define OMAP4_PM_L4PER_MCASP3_WKDEP_OFFSET 0x00d8 408#define OMAP4430_PM_L4PER_MCASP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00d8) 409#define OMAP4_RM_L4PER_MCASP3_CONTEXT_OFFSET 0x00dc 410#define OMAP4430_RM_L4PER_MCASP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00dc) 411#define OMAP4_PM_L4PER_MCBSP4_WKDEP_OFFSET 0x00e0 412#define OMAP4430_PM_L4PER_MCBSP4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00e0) 413#define OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET 0x00e4 414#define OMAP4430_RM_L4PER_MCBSP4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00e4) 415#define OMAP4_RM_L4PER_MGATE_CONTEXT_OFFSET 0x00ec 416#define OMAP4430_RM_L4PER_MGATE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00ec) 417#define OMAP4_PM_L4PER_MCSPI1_WKDEP_OFFSET 0x00f0 418#define OMAP4430_PM_L4PER_MCSPI1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00f0) 419#define OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET 0x00f4 420#define OMAP4430_RM_L4PER_MCSPI1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00f4) 421#define OMAP4_PM_L4PER_MCSPI2_WKDEP_OFFSET 0x00f8 422#define OMAP4430_PM_L4PER_MCSPI2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00f8) 423#define OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET 0x00fc 424#define OMAP4430_RM_L4PER_MCSPI2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00fc) 425#define OMAP4_PM_L4PER_MCSPI3_WKDEP_OFFSET 0x0100 426#define OMAP4430_PM_L4PER_MCSPI3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0100) 427#define OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET 0x0104 428#define OMAP4430_RM_L4PER_MCSPI3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0104) 429#define OMAP4_PM_L4PER_MCSPI4_WKDEP_OFFSET 0x0108 430#define OMAP4430_PM_L4PER_MCSPI4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0108) 431#define OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET 0x010c 432#define OMAP4430_RM_L4PER_MCSPI4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x010c) 433#define OMAP4_PM_L4PER_MMCSD3_WKDEP_OFFSET 0x0120 434#define OMAP4430_PM_L4PER_MMCSD3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0120) 435#define OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET 0x0124 436#define OMAP4430_RM_L4PER_MMCSD3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0124) 437#define OMAP4_PM_L4PER_MMCSD4_WKDEP_OFFSET 0x0128 438#define OMAP4430_PM_L4PER_MMCSD4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0128) 439#define OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET 0x012c 440#define OMAP4430_RM_L4PER_MMCSD4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x012c) 441#define OMAP4_RM_L4PER_MSPROHG_CONTEXT_OFFSET 0x0134 442#define OMAP4430_RM_L4PER_MSPROHG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0134) 443#define OMAP4_PM_L4PER_SLIMBUS2_WKDEP_OFFSET 0x0138 444#define OMAP4430_PM_L4PER_SLIMBUS2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0138) 445#define OMAP4_RM_L4PER_SLIMBUS2_CONTEXT_OFFSET 0x013c 446#define OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x013c) 447#define OMAP4_PM_L4PER_UART1_WKDEP_OFFSET 0x0140 448#define OMAP4430_PM_L4PER_UART1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0140) 449#define OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET 0x0144 450#define OMAP4430_RM_L4PER_UART1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0144) 451#define OMAP4_PM_L4PER_UART2_WKDEP_OFFSET 0x0148 452#define OMAP4430_PM_L4PER_UART2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0148) 453#define OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET 0x014c 454#define OMAP4430_RM_L4PER_UART2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x014c) 455#define OMAP4_PM_L4PER_UART3_WKDEP_OFFSET 0x0150 456#define OMAP4430_PM_L4PER_UART3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0150) 457#define OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET 0x0154 458#define OMAP4430_RM_L4PER_UART3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0154) 459#define OMAP4_PM_L4PER_UART4_WKDEP_OFFSET 0x0158 460#define OMAP4430_PM_L4PER_UART4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0158) 461#define OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET 0x015c 462#define OMAP4430_RM_L4PER_UART4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x015c) 463#define OMAP4_PM_L4PER_MMCSD5_WKDEP_OFFSET 0x0160 464#define OMAP4430_PM_L4PER_MMCSD5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0160) 465#define OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET 0x0164 466#define OMAP4430_RM_L4PER_MMCSD5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0164) 467#define OMAP4_PM_L4PER_I2C5_WKDEP_OFFSET 0x0168 468#define OMAP4430_PM_L4PER_I2C5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0168) 469#define OMAP4_RM_L4PER_I2C5_CONTEXT_OFFSET 0x016c 470#define OMAP4430_RM_L4PER_I2C5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x016c) 471#define OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET 0x01a4 472#define OMAP4430_RM_L4SEC_AES1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01a4) 473#define OMAP4_RM_L4SEC_AES2_CONTEXT_OFFSET 0x01ac 474#define OMAP4430_RM_L4SEC_AES2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01ac) 475#define OMAP4_RM_L4SEC_DES3DES_CONTEXT_OFFSET 0x01b4 476#define OMAP4430_RM_L4SEC_DES3DES_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01b4) 477#define OMAP4_RM_L4SEC_PKAEIP29_CONTEXT_OFFSET 0x01bc 478#define OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01bc) 479#define OMAP4_RM_L4SEC_RNG_CONTEXT_OFFSET 0x01c4 480#define OMAP4430_RM_L4SEC_RNG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01c4) 481#define OMAP4_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET 0x01cc 482#define OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01cc) 483#define OMAP4_RM_L4SEC_CRYPTODMA_CONTEXT_OFFSET 0x01dc 484#define OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01dc) 485 486/* PRM.CEFUSE_PRM register offsets */ 487#define OMAP4_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000 488#define OMAP4430_PM_CEFUSE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_MOD, 0x0000) 489#define OMAP4_PM_CEFUSE_PWRSTST_OFFSET 0x0004 490#define OMAP4430_PM_CEFUSE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_MOD, 0x0004) 491#define OMAP4_RM_CEFUSE_CEFUSE_CONTEXT_OFFSET 0x0024 492#define OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_MOD, 0x0024) 493 494/* PRM.WKUP_PRM register offsets */ 495#define OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET 0x0024 496#define OMAP4430_RM_WKUP_L4WKUP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0024) 497#define OMAP4_RM_WKUP_WDT1_CONTEXT_OFFSET 0x002c 498#define OMAP4430_RM_WKUP_WDT1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x002c) 499#define OMAP4_PM_WKUP_WDT2_WKDEP_OFFSET 0x0030 500#define OMAP4430_PM_WKUP_WDT2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0030) 501#define OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET 0x0034 502#define OMAP4430_RM_WKUP_WDT2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0034) 503#define OMAP4_PM_WKUP_GPIO1_WKDEP_OFFSET 0x0038 504#define OMAP4430_PM_WKUP_GPIO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0038) 505#define OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET 0x003c 506#define OMAP4430_RM_WKUP_GPIO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x003c) 507#define OMAP4_PM_WKUP_TIMER1_WKDEP_OFFSET 0x0040 508#define OMAP4430_PM_WKUP_TIMER1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0040) 509#define OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET 0x0044 510#define OMAP4430_RM_WKUP_TIMER1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0044) 511#define OMAP4_PM_WKUP_TIMER12_WKDEP_OFFSET 0x0048 512#define OMAP4430_PM_WKUP_TIMER12_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0048) 513#define OMAP4_RM_WKUP_TIMER12_CONTEXT_OFFSET 0x004c 514#define OMAP4430_RM_WKUP_TIMER12_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x004c) 515#define OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET 0x0054 516#define OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0054) 517#define OMAP4_PM_WKUP_USIM_WKDEP_OFFSET 0x0058 518#define OMAP4430_PM_WKUP_USIM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0058) 519#define OMAP4_RM_WKUP_USIM_CONTEXT_OFFSET 0x005c 520#define OMAP4430_RM_WKUP_USIM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x005c) 521#define OMAP4_RM_WKUP_SARRAM_CONTEXT_OFFSET 0x0064 522#define OMAP4430_RM_WKUP_SARRAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0064) 523#define OMAP4_PM_WKUP_KEYBOARD_WKDEP_OFFSET 0x0078 524#define OMAP4430_PM_WKUP_KEYBOARD_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0078) 525#define OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET 0x007c 526#define OMAP4430_RM_WKUP_KEYBOARD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x007c) 527#define OMAP4_PM_WKUP_RTC_WKDEP_OFFSET 0x0080 528#define OMAP4430_PM_WKUP_RTC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0080) 529#define OMAP4_RM_WKUP_RTC_CONTEXT_OFFSET 0x0084 530#define OMAP4430_RM_WKUP_RTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0084) 531 532/* PRM.WKUP_CM register offsets */ 533#define OMAP4_CM_WKUP_CLKSTCTRL_OFFSET 0x0000 534#define OMAP4430_CM_WKUP_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0000) 535#define OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0020 536#define OMAP4430_CM_WKUP_L4WKUP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0020) 537#define OMAP4_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0028 538#define OMAP4430_CM_WKUP_WDT1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0028) 539#define OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET 0x0030 540#define OMAP4430_CM_WKUP_WDT2_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0030) 541#define OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET 0x0038 542#define OMAP4430_CM_WKUP_GPIO1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0038) 543#define OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0040 544#define OMAP4430_CM_WKUP_TIMER1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0040) 545#define OMAP4_CM_WKUP_TIMER12_CLKCTRL_OFFSET 0x0048 546#define OMAP4430_CM_WKUP_TIMER12_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0048) 547#define OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0050 548#define OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0050) 549#define OMAP4_CM_WKUP_USIM_CLKCTRL_OFFSET 0x0058 550#define OMAP4430_CM_WKUP_USIM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0058) 551#define OMAP4_CM_WKUP_SARRAM_CLKCTRL_OFFSET 0x0060 552#define OMAP4430_CM_WKUP_SARRAM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0060) 553#define OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET 0x0078 554#define OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0078) 555#define OMAP4_CM_WKUP_RTC_CLKCTRL_OFFSET 0x0080 556#define OMAP4430_CM_WKUP_RTC_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0080) 557#define OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET 0x0088 558#define OMAP4430_CM_WKUP_BANDGAP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0088) 559 560/* PRM.EMU_PRM register offsets */ 561#define OMAP4_PM_EMU_PWRSTCTRL_OFFSET 0x0000 562#define OMAP4430_PM_EMU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_MOD, 0x0000) 563#define OMAP4_PM_EMU_PWRSTST_OFFSET 0x0004 564#define OMAP4430_PM_EMU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_MOD, 0x0004) 565#define OMAP4_RM_EMU_DEBUGSS_CONTEXT_OFFSET 0x0024 566#define OMAP4430_RM_EMU_DEBUGSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_MOD, 0x0024) 567 568/* PRM.EMU_CM register offsets */ 569#define OMAP4_CM_EMU_CLKSTCTRL_OFFSET 0x0000 570#define OMAP4430_CM_EMU_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_MOD, 0x0000) 571#define OMAP4_CM_EMU_DYNAMICDEP_OFFSET 0x0008 572#define OMAP4430_CM_EMU_DYNAMICDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_MOD, 0x0008) 573#define OMAP4_CM_EMU_DEBUGSS_CLKCTRL_OFFSET 0x0020 574#define OMAP4430_CM_EMU_DEBUGSS_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_MOD, 0x0020) 575 576/* PRM.DEVICE_PRM register offsets */ 577#define OMAP4_PRM_RSTCTRL_OFFSET 0x0000 578#define OMAP4430_PRM_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0000) 579#define OMAP4_PRM_RSTST_OFFSET 0x0004 580#define OMAP4430_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0004) 581#define OMAP4_PRM_RSTTIME_OFFSET 0x0008 582#define OMAP4430_PRM_RSTTIME OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0008) 583#define OMAP4_PRM_CLKREQCTRL_OFFSET 0x000c 584#define OMAP4430_PRM_CLKREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x000c) 585#define OMAP4_PRM_VOLTCTRL_OFFSET 0x0010 586#define OMAP4430_PRM_VOLTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0010) 587#define OMAP4_PRM_PWRREQCTRL_OFFSET 0x0014 588#define OMAP4430_PRM_PWRREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0014) 589#define OMAP4_PRM_PSCON_COUNT_OFFSET 0x0018 590#define OMAP4430_PRM_PSCON_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0018) 591#define OMAP4_PRM_IO_COUNT_OFFSET 0x001c 592#define OMAP4430_PRM_IO_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x001c) 593#define OMAP4_PRM_IO_PMCTRL_OFFSET 0x0020 594#define OMAP4430_PRM_IO_PMCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0020) 595#define OMAP4_PRM_VOLTSETUP_WARMRESET_OFFSET 0x0024 596#define OMAP4430_PRM_VOLTSETUP_WARMRESET OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0024) 597#define OMAP4_PRM_VOLTSETUP_CORE_OFF_OFFSET 0x0028 598#define OMAP4430_PRM_VOLTSETUP_CORE_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0028) 599#define OMAP4_PRM_VOLTSETUP_MPU_OFF_OFFSET 0x002c 600#define OMAP4430_PRM_VOLTSETUP_MPU_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x002c) 601#define OMAP4_PRM_VOLTSETUP_IVA_OFF_OFFSET 0x0030 602#define OMAP4430_PRM_VOLTSETUP_IVA_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0030) 603#define OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET 0x0034 604#define OMAP4430_PRM_VOLTSETUP_CORE_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0034) 605#define OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET 0x0038 606#define OMAP4430_PRM_VOLTSETUP_MPU_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0038) 607#define OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET 0x003c 608#define OMAP4430_PRM_VOLTSETUP_IVA_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x003c) 609#define OMAP4_PRM_VP_CORE_CONFIG_OFFSET 0x0040 610#define OMAP4430_PRM_VP_CORE_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0040) 611#define OMAP4_PRM_VP_CORE_STATUS_OFFSET 0x0044 612#define OMAP4430_PRM_VP_CORE_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0044) 613#define OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET 0x0048 614#define OMAP4430_PRM_VP_CORE_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0048) 615#define OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET 0x004c 616#define OMAP4430_PRM_VP_CORE_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x004c) 617#define OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET 0x0050 618#define OMAP4430_PRM_VP_CORE_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0050) 619#define OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET 0x0054 620#define OMAP4430_PRM_VP_CORE_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0054) 621#define OMAP4_PRM_VP_MPU_CONFIG_OFFSET 0x0058 622#define OMAP4430_PRM_VP_MPU_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0058) 623#define OMAP4_PRM_VP_MPU_STATUS_OFFSET 0x005c 624#define OMAP4430_PRM_VP_MPU_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x005c) 625#define OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET 0x0060 626#define OMAP4430_PRM_VP_MPU_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0060) 627#define OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET 0x0064 628#define OMAP4430_PRM_VP_MPU_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0064) 629#define OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET 0x0068 630#define OMAP4430_PRM_VP_MPU_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0068) 631#define OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET 0x006c 632#define OMAP4430_PRM_VP_MPU_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x006c) 633#define OMAP4_PRM_VP_IVA_CONFIG_OFFSET 0x0070 634#define OMAP4430_PRM_VP_IVA_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0070) 635#define OMAP4_PRM_VP_IVA_STATUS_OFFSET 0x0074 636#define OMAP4430_PRM_VP_IVA_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0074) 637#define OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET 0x0078 638#define OMAP4430_PRM_VP_IVA_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0078) 639#define OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET 0x007c 640#define OMAP4430_PRM_VP_IVA_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x007c) 641#define OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET 0x0080 642#define OMAP4430_PRM_VP_IVA_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0080) 643#define OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET 0x0084 644#define OMAP4430_PRM_VP_IVA_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0084) 645#define OMAP4_PRM_VC_SMPS_SA_OFFSET 0x0088 646#define OMAP4430_PRM_VC_SMPS_SA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0088) 647#define OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET 0x008c 648#define OMAP4430_PRM_VC_VAL_SMPS_RA_VOL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x008c) 649#define OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET 0x0090 650#define OMAP4430_PRM_VC_VAL_SMPS_RA_CMD OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0090) 651#define OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET 0x0094 652#define OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0094) 653#define OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET 0x0098 654#define OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0098) 655#define OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET 0x009c 656#define OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x009c) 657#define OMAP4_PRM_VC_VAL_BYPASS_OFFSET 0x00a0 658#define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00a0) 659#define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4 660#define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00a4) 661#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 662#define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00a8) 663#define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac 664#define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00ac) 665#define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 666#define OMAP4430_PRM_SRAM_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00b0) 667#define OMAP4_PRM_SRAM_WKUP_SETUP_OFFSET 0x00b4 668#define OMAP4430_PRM_SRAM_WKUP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00b4) 669#define OMAP4_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x00b8 670#define OMAP4430_PRM_LDO_SRAM_CORE_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00b8) 671#define OMAP4_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x00bc 672#define OMAP4430_PRM_LDO_SRAM_CORE_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00bc) 673#define OMAP4_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x00c0 674#define OMAP4430_PRM_LDO_SRAM_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00c0) 675#define OMAP4_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x00c4 676#define OMAP4430_PRM_LDO_SRAM_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00c4) 677#define OMAP4_PRM_LDO_SRAM_IVA_SETUP_OFFSET 0x00c8 678#define OMAP4430_PRM_LDO_SRAM_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00c8) 679#define OMAP4_PRM_LDO_SRAM_IVA_CTRL_OFFSET 0x00cc 680#define OMAP4430_PRM_LDO_SRAM_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00cc) 681#define OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET 0x00d0 682#define OMAP4430_PRM_LDO_ABB_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00d0) 683#define OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET 0x00d4 684#define OMAP4430_PRM_LDO_ABB_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00d4) 685#define OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET 0x00d8 686#define OMAP4430_PRM_LDO_ABB_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00d8) 687#define OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET 0x00dc 688#define OMAP4430_PRM_LDO_ABB_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00dc) 689#define OMAP4_PRM_LDO_BANDGAP_CTRL_OFFSET 0x00e0 690#define OMAP4430_PRM_LDO_BANDGAP_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00e0) 691#define OMAP4_PRM_DEVICE_OFF_CTRL_OFFSET 0x00e4 692#define OMAP4430_PRM_DEVICE_OFF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00e4) 693#define OMAP4_PRM_PHASE1_CNDP_OFFSET 0x00e8 694#define OMAP4430_PRM_PHASE1_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00e8) 695#define OMAP4_PRM_PHASE2A_CNDP_OFFSET 0x00ec 696#define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00ec) 697#define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0 698#define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00f0) 699#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4 700#define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00f4) 701 702/* 703 * PRCM_MPU 704 * 705 * The PRCM_MPU is a local PRCM inside the MPU subsystem. For the PRCM (global) 706 * point of view the PRCM_MPU is a single entity. It shares the same 707 * programming model as the global PRCM and thus can be assimilate as two new 708 * MOD inside the PRCM 709 */ 710 711/* PRCM_MPU.OCP_SOCKET_PRCM register offsets */ 712#define OMAP4_REVISION_PRCM_OFFSET 0x0000 713#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_MOD, 0x0000) 714 715/* PRCM_MPU.DEVICE_PRM register offsets */ 716#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 717#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_MOD, 0x0000) 718 719/* PRCM_MPU.CPU0 register offsets */ 720#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 721#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0000) 722#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 723#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0004) 724#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 725#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0008) 726#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c 727#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x000c) 728#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 729#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0010) 730#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 731#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0014) 732#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 733#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0018) 734 735/* PRCM_MPU.CPU1 register offsets */ 736#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 737#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0000) 738#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 739#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0004) 740#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 741#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0008) 742#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c 743#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x000c) 744#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 745#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0010) 746#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 747#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0014) 748#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 749#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0018) 750#endif 751