1 2#include <plat/omap_hwmod.h> 3#include <mach/irqs.h> 4#include <plat/cpu.h> 5#include <plat/dma.h> 6 7#include "omap_hwmod_common_data.h" 8 9#include "prm-regbits-34xx.h" 10 11/* 12 * OMAP3xxx hardware module integration data 13 * 14 * ALl of the data in this section should be autogeneratable from the 15 * TI hardware database or other technical documentation. Data that 16 * is driver-specific or driver-kernel integration-specific belongs 17 * elsewhere. 18 */ 19 20static struct omap_hwmod omap3xxx_mpu_hwmod; 21static struct omap_hwmod omap3xxx_iva_hwmod; 22static struct omap_hwmod omap3xxx_l3_main_hwmod; 23static struct omap_hwmod omap3xxx_l4_core_hwmod; 24static struct omap_hwmod omap3xxx_l4_per_hwmod; 25 26/* L3 -> L4_CORE interface */ 27static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { 28 .master = &omap3xxx_l3_main_hwmod, 29 .slave = &omap3xxx_l4_core_hwmod, 30 .user = OCP_USER_MPU | OCP_USER_SDMA, 31}; 32 33/* L3 -> L4_PER interface */ 34static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = { 35 .master = &omap3xxx_l3_main_hwmod, 36 .slave = &omap3xxx_l4_per_hwmod, 37 .user = OCP_USER_MPU | OCP_USER_SDMA, 38}; 39 40/* MPU -> L3 interface */ 41static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = { 42 .master = &omap3xxx_mpu_hwmod, 43 .slave = &omap3xxx_l3_main_hwmod, 44 .user = OCP_USER_MPU, 45}; 46 47/* Slave interfaces on the L3 interconnect */ 48static struct omap_hwmod_ocp_if *omap3xxx_l3_main_slaves[] = { 49 &omap3xxx_mpu__l3_main, 50}; 51 52/* Master interfaces on the L3 interconnect */ 53static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = { 54 &omap3xxx_l3_main__l4_core, 55 &omap3xxx_l3_main__l4_per, 56}; 57 58/* L3 */ 59static struct omap_hwmod omap3xxx_l3_main_hwmod = { 60 .name = "l3_main", 61 .class = &l3_hwmod_class, 62 .masters = omap3xxx_l3_main_masters, 63 .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), 64 .slaves = omap3xxx_l3_main_slaves, 65 .slaves_cnt = ARRAY_SIZE(omap3xxx_l3_main_slaves), 66 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 67 .flags = HWMOD_NO_IDLEST, 68}; 69 70static struct omap_hwmod omap3xxx_l4_wkup_hwmod; 71 72/* L4_CORE -> L4_WKUP interface */ 73static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { 74 .master = &omap3xxx_l4_core_hwmod, 75 .slave = &omap3xxx_l4_wkup_hwmod, 76 .user = OCP_USER_MPU | OCP_USER_SDMA, 77}; 78 79/* Slave interfaces on the L4_CORE interconnect */ 80static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = { 81 &omap3xxx_l3_main__l4_core, 82}; 83 84/* Master interfaces on the L4_CORE interconnect */ 85static struct omap_hwmod_ocp_if *omap3xxx_l4_core_masters[] = { 86 &omap3xxx_l4_core__l4_wkup, 87}; 88 89/* L4 CORE */ 90static struct omap_hwmod omap3xxx_l4_core_hwmod = { 91 .name = "l4_core", 92 .class = &l4_hwmod_class, 93 .masters = omap3xxx_l4_core_masters, 94 .masters_cnt = ARRAY_SIZE(omap3xxx_l4_core_masters), 95 .slaves = omap3xxx_l4_core_slaves, 96 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_core_slaves), 97 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 98 .flags = HWMOD_NO_IDLEST, 99}; 100 101/* Slave interfaces on the L4_PER interconnect */ 102static struct omap_hwmod_ocp_if *omap3xxx_l4_per_slaves[] = { 103 &omap3xxx_l3_main__l4_per, 104}; 105 106/* Master interfaces on the L4_PER interconnect */ 107static struct omap_hwmod_ocp_if *omap3xxx_l4_per_masters[] = { 108}; 109 110/* L4 PER */ 111static struct omap_hwmod omap3xxx_l4_per_hwmod = { 112 .name = "l4_per", 113 .class = &l4_hwmod_class, 114 .masters = omap3xxx_l4_per_masters, 115 .masters_cnt = ARRAY_SIZE(omap3xxx_l4_per_masters), 116 .slaves = omap3xxx_l4_per_slaves, 117 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_per_slaves), 118 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 119 .flags = HWMOD_NO_IDLEST, 120}; 121 122/* Slave interfaces on the L4_WKUP interconnect */ 123static struct omap_hwmod_ocp_if *omap3xxx_l4_wkup_slaves[] = { 124 &omap3xxx_l4_core__l4_wkup, 125}; 126 127/* Master interfaces on the L4_WKUP interconnect */ 128static struct omap_hwmod_ocp_if *omap3xxx_l4_wkup_masters[] = { 129}; 130 131/* L4 WKUP */ 132static struct omap_hwmod omap3xxx_l4_wkup_hwmod = { 133 .name = "l4_wkup", 134 .class = &l4_hwmod_class, 135 .masters = omap3xxx_l4_wkup_masters, 136 .masters_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_masters), 137 .slaves = omap3xxx_l4_wkup_slaves, 138 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_slaves), 139 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 140 .flags = HWMOD_NO_IDLEST, 141}; 142 143/* Master interfaces on the MPU device */ 144static struct omap_hwmod_ocp_if *omap3xxx_mpu_masters[] = { 145 &omap3xxx_mpu__l3_main, 146}; 147 148/* MPU */ 149static struct omap_hwmod omap3xxx_mpu_hwmod = { 150 .name = "mpu", 151 .class = &mpu_hwmod_class, 152 .main_clk = "arm_fck", 153 .masters = omap3xxx_mpu_masters, 154 .masters_cnt = ARRAY_SIZE(omap3xxx_mpu_masters), 155 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 156}; 157 158/* 159 * IVA2_2 interface data 160 */ 161 162/* IVA2 <- L3 interface */ 163static struct omap_hwmod_ocp_if omap3xxx_l3__iva = { 164 .master = &omap3xxx_l3_main_hwmod, 165 .slave = &omap3xxx_iva_hwmod, 166 .clk = "iva2_ck", 167 .user = OCP_USER_MPU | OCP_USER_SDMA, 168}; 169 170static struct omap_hwmod_ocp_if *omap3xxx_iva_masters[] = { 171 &omap3xxx_l3__iva, 172}; 173 174/* 175 * IVA2 (IVA2) 176 */ 177 178static struct omap_hwmod omap3xxx_iva_hwmod = { 179 .name = "iva", 180 .class = &iva_hwmod_class, 181 .masters = omap3xxx_iva_masters, 182 .masters_cnt = ARRAY_SIZE(omap3xxx_iva_masters), 183 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) 184}; 185 186static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { 187 &omap3xxx_l3_main_hwmod, 188 &omap3xxx_l4_core_hwmod, 189 &omap3xxx_l4_per_hwmod, 190 &omap3xxx_l4_wkup_hwmod, 191 &omap3xxx_mpu_hwmod, 192 &omap3xxx_iva_hwmod, 193 NULL, 194}; 195 196int __init omap3xxx_hwmod_init(void) 197{ 198 return omap_hwmod_init(omap3xxx_hwmods); 199} 200