1/* 2 * arch/arm/mach-ixp4xx/nas100d-pci.c 3 * 4 * NAS 100d board-level PCI initialization 5 * 6 * based on ixdp425-pci.c: 7 * Copyright (C) 2002 Intel Corporation. 8 * Copyright (C) 2003-2004 MontaVista Software, Inc. 9 * 10 * Maintainer: http://www.nslu2-linux.org/ 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 * 16 */ 17 18#include <linux/pci.h> 19#include <linux/init.h> 20#include <linux/irq.h> 21#include <asm/mach/pci.h> 22#include <asm/mach-types.h> 23 24#define MAX_DEV 3 25#define IRQ_LINES 3 26 27/* PCI controller GPIO to IRQ pin mappings */ 28#define INTA 11 29#define INTB 10 30#define INTC 9 31#define INTD 8 32#define INTE 7 33 34void __init nas100d_pci_preinit(void) 35{ 36 set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); 37 set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); 38 set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); 39 set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); 40 set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); 41 ixp4xx_pci_preinit(); 42} 43 44static int __init nas100d_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 45{ 46 static int pci_irq_table[MAX_DEV][IRQ_LINES] = { 47 { IXP4XX_GPIO_IRQ(INTA), -1, -1 }, 48 { IXP4XX_GPIO_IRQ(INTB), -1, -1 }, 49 { IXP4XX_GPIO_IRQ(INTC), IXP4XX_GPIO_IRQ(INTD), 50 IXP4XX_GPIO_IRQ(INTE) }, 51 }; 52 53 if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) 54 return pci_irq_table[slot - 1][pin - 1]; 55 56 return -1; 57} 58 59struct hw_pci __initdata nas100d_pci = { 60 .nr_controllers = 1, 61 .preinit = nas100d_pci_preinit, 62 .swizzle = pci_std_swizzle, 63 .setup = ixp4xx_setup, 64 .scan = ixp4xx_scan_bus, 65 .map_irq = nas100d_map_irq, 66}; 67 68int __init nas100d_pci_init(void) 69{ 70 if (machine_is_nas100d()) 71 pci_common_init(&nas100d_pci); 72 73 return 0; 74} 75 76subsys_initcall(nas100d_pci_init); 77