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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-davinci/
1/*
2 * TI DaVinci EVM board support
3 *
4 * Author: Kevin Hilman, Deep Root Systems, LLC
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/err.h>
14#include <linux/platform_device.h>
15#include <linux/mtd/mtd.h>
16#include <linux/mtd/partitions.h>
17#include <linux/mtd/nand.h>
18#include <linux/i2c.h>
19#include <linux/gpio.h>
20#include <linux/clk.h>
21#include <linux/videodev2.h>
22#include <media/tvp514x.h>
23#include <linux/spi/spi.h>
24#include <linux/spi/eeprom.h>
25
26#include <asm/mach-types.h>
27#include <asm/mach/arch.h>
28
29#include <mach/dm355.h>
30#include <mach/i2c.h>
31#include <mach/serial.h>
32#include <mach/nand.h>
33#include <mach/mmc.h>
34#include <mach/usb.h>
35
36/* NOTE:  this is geared for the standard config, with a socketed
37 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
38 * swap chips, maybe with a different block size, partitioning may
39 * need to be changed.
40 */
41#define NAND_BLOCK_SIZE		SZ_128K
42
43static struct mtd_partition davinci_nand_partitions[] = {
44	{
45		/* UBL (a few copies) plus U-Boot */
46		.name		= "bootloader",
47		.offset		= 0,
48		.size		= 15 * NAND_BLOCK_SIZE,
49		.mask_flags	= MTD_WRITEABLE, /* force read-only */
50	}, {
51		/* U-Boot environment */
52		.name		= "params",
53		.offset		= MTDPART_OFS_APPEND,
54		.size		= 1 * NAND_BLOCK_SIZE,
55		.mask_flags	= 0,
56	}, {
57		.name		= "kernel",
58		.offset		= MTDPART_OFS_APPEND,
59		.size		= SZ_4M,
60		.mask_flags	= 0,
61	}, {
62		.name		= "filesystem1",
63		.offset		= MTDPART_OFS_APPEND,
64		.size		= SZ_512M,
65		.mask_flags	= 0,
66	}, {
67		.name		= "filesystem2",
68		.offset		= MTDPART_OFS_APPEND,
69		.size		= MTDPART_SIZ_FULL,
70		.mask_flags	= 0,
71	}
72	/* two blocks with bad block table (and mirror) at the end */
73};
74
75static struct davinci_nand_pdata davinci_nand_data = {
76	.mask_chipsel		= BIT(14),
77	.parts			= davinci_nand_partitions,
78	.nr_parts		= ARRAY_SIZE(davinci_nand_partitions),
79	.ecc_mode		= NAND_ECC_HW,
80	.options		= NAND_USE_FLASH_BBT,
81	.ecc_bits		= 4,
82};
83
84static struct resource davinci_nand_resources[] = {
85	{
86		.start		= DM355_ASYNC_EMIF_DATA_CE0_BASE,
87		.end		= DM355_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
88		.flags		= IORESOURCE_MEM,
89	}, {
90		.start		= DM355_ASYNC_EMIF_CONTROL_BASE,
91		.end		= DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
92		.flags		= IORESOURCE_MEM,
93	},
94};
95
96static struct platform_device davinci_nand_device = {
97	.name			= "davinci_nand",
98	.id			= 0,
99
100	.num_resources		= ARRAY_SIZE(davinci_nand_resources),
101	.resource		= davinci_nand_resources,
102
103	.dev			= {
104		.platform_data	= &davinci_nand_data,
105	},
106};
107
108static struct davinci_i2c_platform_data i2c_pdata = {
109	.bus_freq	= 400	/* kHz */,
110	.bus_delay	= 0	/* usec */,
111	.sda_pin        = 15,
112	.scl_pin        = 14,
113};
114
115static struct snd_platform_data dm355_evm_snd_data;
116
117static int dm355evm_mmc_gpios = -EINVAL;
118
119static void dm355evm_mmcsd_gpios(unsigned gpio)
120{
121	gpio_request(gpio + 0, "mmc0_ro");
122	gpio_request(gpio + 1, "mmc0_cd");
123	gpio_request(gpio + 2, "mmc1_ro");
124	gpio_request(gpio + 3, "mmc1_cd");
125
126	/* we "know" these are input-only so we don't
127	 * need to call gpio_direction_input()
128	 */
129
130	dm355evm_mmc_gpios = gpio;
131}
132
133static struct i2c_board_info dm355evm_i2c_info[] = {
134	{	I2C_BOARD_INFO("dm355evm_msp", 0x25),
135		.platform_data = dm355evm_mmcsd_gpios,
136	},
137	/* { plus irq  }, */
138	{ I2C_BOARD_INFO("tlv320aic33", 0x1b), },
139};
140
141static void __init evm_init_i2c(void)
142{
143	davinci_init_i2c(&i2c_pdata);
144
145	gpio_request(5, "dm355evm_msp");
146	gpio_direction_input(5);
147	dm355evm_i2c_info[0].irq = gpio_to_irq(5);
148
149	i2c_register_board_info(1, dm355evm_i2c_info,
150			ARRAY_SIZE(dm355evm_i2c_info));
151}
152
153static struct resource dm355evm_dm9000_rsrc[] = {
154	{
155		/* addr */
156		.start	= 0x04014000,
157		.end	= 0x04014001,
158		.flags	= IORESOURCE_MEM,
159	}, {
160		/* data */
161		.start	= 0x04014002,
162		.end	= 0x04014003,
163		.flags	= IORESOURCE_MEM,
164	}, {
165		.flags	= IORESOURCE_IRQ
166			| IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */,
167	},
168};
169
170static struct platform_device dm355evm_dm9000 = {
171	.name		= "dm9000",
172	.id		= -1,
173	.resource	= dm355evm_dm9000_rsrc,
174	.num_resources	= ARRAY_SIZE(dm355evm_dm9000_rsrc),
175};
176
177static struct tvp514x_platform_data tvp5146_pdata = {
178	.clk_polarity = 0,
179	.hs_polarity = 1,
180	.vs_polarity = 1
181};
182
183#define TVP514X_STD_ALL	(V4L2_STD_NTSC | V4L2_STD_PAL)
184/* Inputs available at the TVP5146 */
185static struct v4l2_input tvp5146_inputs[] = {
186	{
187		.index = 0,
188		.name = "Composite",
189		.type = V4L2_INPUT_TYPE_CAMERA,
190		.std = TVP514X_STD_ALL,
191	},
192	{
193		.index = 1,
194		.name = "S-Video",
195		.type = V4L2_INPUT_TYPE_CAMERA,
196		.std = TVP514X_STD_ALL,
197	},
198};
199
200/*
201 * this is the route info for connecting each input to decoder
202 * ouput that goes to vpfe. There is a one to one correspondence
203 * with tvp5146_inputs
204 */
205static struct vpfe_route tvp5146_routes[] = {
206	{
207		.input = INPUT_CVBS_VI2B,
208		.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
209	},
210	{
211		.input = INPUT_SVIDEO_VI2C_VI1C,
212		.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
213	},
214};
215
216static struct vpfe_subdev_info vpfe_sub_devs[] = {
217	{
218		.name = "tvp5146",
219		.grp_id = 0,
220		.num_inputs = ARRAY_SIZE(tvp5146_inputs),
221		.inputs = tvp5146_inputs,
222		.routes = tvp5146_routes,
223		.can_route = 1,
224		.ccdc_if_params = {
225			.if_type = VPFE_BT656,
226			.hdpol = VPFE_PINPOL_POSITIVE,
227			.vdpol = VPFE_PINPOL_POSITIVE,
228		},
229		.board_info = {
230			I2C_BOARD_INFO("tvp5146", 0x5d),
231			.platform_data = &tvp5146_pdata,
232		},
233	}
234};
235
236static struct vpfe_config vpfe_cfg = {
237	.num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
238	.i2c_adapter_id = 1,
239	.sub_devs = vpfe_sub_devs,
240	.card_name = "DM355 EVM",
241	.ccdc = "DM355 CCDC",
242};
243
244static struct platform_device *davinci_evm_devices[] __initdata = {
245	&dm355evm_dm9000,
246	&davinci_nand_device,
247};
248
249static struct davinci_uart_config uart_config __initdata = {
250	.enabled_uarts = (1 << 0),
251};
252
253static void __init dm355_evm_map_io(void)
254{
255	/* setup input configuration for VPFE input devices */
256	dm355_set_vpfe_config(&vpfe_cfg);
257	dm355_init();
258}
259
260static int dm355evm_mmc_get_cd(int module)
261{
262	if (!gpio_is_valid(dm355evm_mmc_gpios))
263		return -ENXIO;
264	/* low == card present */
265	return !gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 1);
266}
267
268static int dm355evm_mmc_get_ro(int module)
269{
270	if (!gpio_is_valid(dm355evm_mmc_gpios))
271		return -ENXIO;
272	/* high == card's write protect switch active */
273	return gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 0);
274}
275
276static struct davinci_mmc_config dm355evm_mmc_config = {
277	.get_cd		= dm355evm_mmc_get_cd,
278	.get_ro		= dm355evm_mmc_get_ro,
279	.wires		= 4,
280	.max_freq       = 50000000,
281	.caps           = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
282	.version	= MMC_CTLR_VERSION_1,
283};
284
285/* Don't connect anything to J10 unless you're only using USB host
286 * mode *and* have to do so with some kind of gender-bender.  If
287 * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
288 * the ID pin won't need any help.
289 */
290#ifdef CONFIG_USB_MUSB_PERIPHERAL
291#define USB_ID_VALUE	0	/* ID pulled high; *should* float */
292#else
293#define USB_ID_VALUE	1	/* ID pulled low */
294#endif
295
296static struct spi_eeprom at25640a = {
297	.byte_len	= SZ_64K / 8,
298	.name		= "at25640a",
299	.page_size	= 32,
300	.flags		= EE_ADDR2,
301};
302
303static struct spi_board_info dm355_evm_spi_info[] __initconst = {
304	{
305		.modalias	= "at25",
306		.platform_data	= &at25640a,
307		.max_speed_hz	= 10 * 1000 * 1000,	/* at 3v3 */
308		.bus_num	= 0,
309		.chip_select	= 0,
310		.mode		= SPI_MODE_0,
311	},
312};
313
314static __init void dm355_evm_init(void)
315{
316	struct clk *aemif;
317
318	gpio_request(1, "dm9000");
319	gpio_direction_input(1);
320	dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1);
321
322	aemif = clk_get(&dm355evm_dm9000.dev, "aemif");
323	if (IS_ERR(aemif))
324		WARN("%s: unable to get AEMIF clock\n", __func__);
325	else
326		clk_enable(aemif);
327
328	platform_add_devices(davinci_evm_devices,
329			     ARRAY_SIZE(davinci_evm_devices));
330	evm_init_i2c();
331	davinci_serial_init(&uart_config);
332
333	/* NOTE:  NAND flash timings set by the UBL are slower than
334	 * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
335	 * but could be 0x0400008c for about 25% faster page reads.
336	 */
337
338	gpio_request(2, "usb_id_toggle");
339	gpio_direction_output(2, USB_ID_VALUE);
340	/* irlml6401 switches over 1A in under 8 msec */
341	davinci_setup_usb(1000, 8);
342
343	davinci_setup_mmc(0, &dm355evm_mmc_config);
344	davinci_setup_mmc(1, &dm355evm_mmc_config);
345
346	dm355_init_spi0(BIT(0), dm355_evm_spi_info,
347			ARRAY_SIZE(dm355_evm_spi_info));
348
349	/* DM335 EVM uses ASP1; line-out is a stereo mini-jack */
350	dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN, &dm355_evm_snd_data);
351}
352
353MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
354	.phys_io      = IO_PHYS,
355	.io_pg_offst  = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
356	.boot_params  = (0x80000100),
357	.map_io	      = dm355_evm_map_io,
358	.init_irq     = davinci_irq_init,
359	.timer	      = &davinci_timer,
360	.init_machine = dm355_evm_init,
361MACHINE_END
362