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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/include/sound/
1#ifndef __SOUND_FSI_H
2#define __SOUND_FSI_H
3
4/*
5 * Fifo-attached Serial Interface (FSI) support for SH7724
6 *
7 * Copyright (C) 2009 Renesas Solutions Corp.
8 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#define FSI_PORT_A	0
16#define FSI_PORT_B	1
17
18/* flags format
19
20 * 0xABCDEEFF
21 *
22 * A:  channel size for TDM (input)
23 * B:  channel size for TDM (ooutput)
24 * C:  inversion
25 * D:  mode
26 * E:  input format
27 * F:  output format
28 */
29
30#include <linux/clk.h>
31#include <sound/soc.h>
32
33/* TDM channel */
34#define SH_FSI_SET_CH_I(x)	((x & 0xF) << 28)
35#define SH_FSI_SET_CH_O(x)	((x & 0xF) << 24)
36
37#define SH_FSI_CH_IMASK		0xF0000000
38#define SH_FSI_CH_OMASK		0x0F000000
39#define SH_FSI_GET_CH_I(x)	((x & SH_FSI_CH_IMASK) >> 28)
40#define SH_FSI_GET_CH_O(x)	((x & SH_FSI_CH_OMASK) >> 24)
41
42/* clock inversion */
43#define SH_FSI_INVERSION_MASK	0x00F00000
44#define SH_FSI_LRM_INV		(1 << 20)
45#define SH_FSI_BRM_INV		(1 << 21)
46#define SH_FSI_LRS_INV		(1 << 22)
47#define SH_FSI_BRS_INV		(1 << 23)
48
49/* mode */
50#define SH_FSI_MODE_MASK	0x000F0000
51#define SH_FSI_IN_SLAVE_MODE	(1 << 16)  /* default master mode */
52#define SH_FSI_OUT_SLAVE_MODE	(1 << 17)  /* default master mode */
53
54/* DI format */
55#define SH_FSI_FMT_MASK		0x000000FF
56#define SH_FSI_IFMT(x)		(((SH_FSI_FMT_ ## x) & SH_FSI_FMT_MASK) << 8)
57#define SH_FSI_OFMT(x)		(((SH_FSI_FMT_ ## x) & SH_FSI_FMT_MASK) << 0)
58#define SH_FSI_GET_IFMT(x)	((x >> 8) & SH_FSI_FMT_MASK)
59#define SH_FSI_GET_OFMT(x)	((x >> 0) & SH_FSI_FMT_MASK)
60
61#define SH_FSI_FMT_MONO		0
62#define SH_FSI_FMT_MONO_DELAY	1
63#define SH_FSI_FMT_PCM		2
64#define SH_FSI_FMT_I2S		3
65#define SH_FSI_FMT_TDM		4
66#define SH_FSI_FMT_TDM_DELAY	5
67#define SH_FSI_FMT_SPDIF	6
68
69
70#define SH_FSI_IFMT_TDM_CH(x) \
71	(SH_FSI_IFMT(TDM)	| SH_FSI_SET_CH_I(x))
72#define SH_FSI_IFMT_TDM_DELAY_CH(x) \
73	(SH_FSI_IFMT(TDM_DELAY)	| SH_FSI_SET_CH_I(x))
74
75#define SH_FSI_OFMT_TDM_CH(x) \
76	(SH_FSI_OFMT(TDM)	| SH_FSI_SET_CH_O(x))
77#define SH_FSI_OFMT_TDM_DELAY_CH(x) \
78	(SH_FSI_OFMT(TDM_DELAY)	| SH_FSI_SET_CH_O(x))
79
80
81/*
82 * set_rate return value
83 *
84 * see ACKMD/BPFMD on
85 *     ACK_MD (FSI2)
86 *     CKG1   (FSI)
87 *
88 * err:  return value < 0
89 *
90 * 0x-00000AB
91 *
92 * A:  ACKMD value
93 * B:  BPFMD value
94 */
95
96#define SH_FSI_ACKMD_MASK	(0xF << 0)
97#define SH_FSI_ACKMD_512	(1 << 0)
98#define SH_FSI_ACKMD_256	(2 << 0)
99#define SH_FSI_ACKMD_128	(3 << 0)
100#define SH_FSI_ACKMD_64		(4 << 0)
101#define SH_FSI_ACKMD_32		(5 << 0)
102
103#define SH_FSI_BPFMD_MASK	(0xF << 4)
104#define SH_FSI_BPFMD_512	(1 << 4)
105#define SH_FSI_BPFMD_256	(2 << 4)
106#define SH_FSI_BPFMD_128	(3 << 4)
107#define SH_FSI_BPFMD_64		(4 << 4)
108#define SH_FSI_BPFMD_32		(5 << 4)
109#define SH_FSI_BPFMD_16		(6 << 4)
110
111struct sh_fsi_platform_info {
112	unsigned long porta_flags;
113	unsigned long portb_flags;
114	int (*set_rate)(int is_porta, int rate); /* for master mode */
115};
116
117extern struct snd_soc_dai fsi_soc_dai[2];
118extern struct snd_soc_platform fsi_soc_platform;
119
120#endif /* __SOUND_FSI_H */
121