1/* 2 * MUSB OTG driver defines 3 * 4 * Copyright 2005 Mentor Graphics Corporation 5 * Copyright (C) 2005-2006 by Texas Instruments 6 * Copyright (C) 2006-2007 Nokia Corporation 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 20 * 02110-1301 USA 21 * 22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35#ifndef __MUSB_CORE_H__ 36#define __MUSB_CORE_H__ 37 38#include <linux/slab.h> 39#include <linux/list.h> 40#include <linux/interrupt.h> 41#include <linux/errno.h> 42#include <linux/timer.h> 43#include <linux/clk.h> 44#include <linux/device.h> 45#include <linux/usb/ch9.h> 46#include <linux/usb/gadget.h> 47#include <linux/usb.h> 48#include <linux/usb/otg.h> 49#include <linux/usb/musb.h> 50 51struct musb; 52struct musb_hw_ep; 53struct musb_ep; 54 55/* Helper defines for struct musb->hwvers */ 56#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) 57#define MUSB_HWVERS_MINOR(x) (x & 0x3ff) 58#define MUSB_HWVERS_RC 0x8000 59#define MUSB_HWVERS_1300 0x52C 60#define MUSB_HWVERS_1400 0x590 61#define MUSB_HWVERS_1800 0x720 62#define MUSB_HWVERS_1900 0x784 63#define MUSB_HWVERS_2000 0x800 64 65#include "musb_debug.h" 66#include "musb_dma.h" 67 68#include "musb_io.h" 69#include "musb_regs.h" 70 71#include "musb_gadget.h" 72#include <linux/usb/hcd.h> 73#include "musb_host.h" 74 75 76 77#ifdef CONFIG_USB_MUSB_OTG 78 79#define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST) 80#define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL) 81#define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG) 82 83/* NOTE: otg and peripheral-only state machines start at B_IDLE. 84 * OTG or host-only go to A_IDLE when ID is sensed. 85 */ 86#define is_peripheral_active(m) (!(m)->is_host) 87#define is_host_active(m) ((m)->is_host) 88 89#else 90#define is_peripheral_enabled(musb) is_peripheral_capable() 91#define is_host_enabled(musb) is_host_capable() 92#define is_otg_enabled(musb) 0 93 94#define is_peripheral_active(musb) is_peripheral_capable() 95#define is_host_active(musb) is_host_capable() 96#endif 97 98#if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL) 99/* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always 100 * override that choice selection (often USB_GADGET_DUMMY_HCD). 101 */ 102#ifndef CONFIG_USB_GADGET_MUSB_HDRC 103#error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC 104#endif 105#endif /* need MUSB gadget selection */ 106 107#ifndef CONFIG_HAVE_CLK 108/* Dummy stub for clk framework */ 109#define clk_get(dev, id) NULL 110#define clk_put(clock) do {} while (0) 111#define clk_enable(clock) do {} while (0) 112#define clk_disable(clock) do {} while (0) 113#endif 114 115#ifdef CONFIG_PROC_FS 116#include <linux/fs.h> 117#define MUSB_CONFIG_PROC_FS 118#endif 119 120/****************************** PERIPHERAL ROLE *****************************/ 121 122#ifdef CONFIG_USB_GADGET_MUSB_HDRC 123 124#define is_peripheral_capable() (1) 125 126extern irqreturn_t musb_g_ep0_irq(struct musb *); 127extern void musb_g_tx(struct musb *, u8); 128extern void musb_g_rx(struct musb *, u8); 129extern void musb_g_reset(struct musb *); 130extern void musb_g_suspend(struct musb *); 131extern void musb_g_resume(struct musb *); 132extern void musb_g_wakeup(struct musb *); 133extern void musb_g_disconnect(struct musb *); 134 135#else 136 137#define is_peripheral_capable() (0) 138 139static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; } 140static inline void musb_g_reset(struct musb *m) {} 141static inline void musb_g_suspend(struct musb *m) {} 142static inline void musb_g_resume(struct musb *m) {} 143static inline void musb_g_wakeup(struct musb *m) {} 144static inline void musb_g_disconnect(struct musb *m) {} 145 146#endif 147 148/****************************** HOST ROLE ***********************************/ 149 150#ifdef CONFIG_USB_MUSB_HDRC_HCD 151 152#define is_host_capable() (1) 153 154extern irqreturn_t musb_h_ep0_irq(struct musb *); 155extern void musb_host_tx(struct musb *, u8); 156extern void musb_host_rx(struct musb *, u8); 157 158#else 159 160#define is_host_capable() (0) 161 162static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; } 163static inline void musb_host_tx(struct musb *m, u8 e) {} 164static inline void musb_host_rx(struct musb *m, u8 e) {} 165 166#endif 167 168 169/****************************** CONSTANTS ********************************/ 170 171#ifndef MUSB_C_NUM_EPS 172#define MUSB_C_NUM_EPS ((u8)16) 173#endif 174 175#ifndef MUSB_MAX_END0_PACKET 176#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) 177#endif 178 179/* host side ep0 states */ 180enum musb_h_ep0_state { 181 MUSB_EP0_IDLE, 182 MUSB_EP0_START, /* expect ack of setup */ 183 MUSB_EP0_IN, /* expect IN DATA */ 184 MUSB_EP0_OUT, /* expect ack of OUT DATA */ 185 MUSB_EP0_STATUS, /* expect ack of STATUS */ 186} __attribute__ ((packed)); 187 188/* peripheral side ep0 states */ 189enum musb_g_ep0_state { 190 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ 191 MUSB_EP0_STAGE_SETUP, /* received SETUP */ 192 MUSB_EP0_STAGE_TX, /* IN data */ 193 MUSB_EP0_STAGE_RX, /* OUT data */ 194 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ 195 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ 196 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ 197} __attribute__ ((packed)); 198 199/* 200 * OTG protocol constants. See USB OTG 1.3 spec, 201 * sections 5.5 "Device Timings" and 6.6.5 "Timers". 202 */ 203#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ 204#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ 205#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 206#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 207 208 209/*************************** REGISTER ACCESS ********************************/ 210 211/* Endpoint registers (other than dynfifo setup) can be accessed either 212 * directly with the "flat" model, or after setting up an index register. 213 */ 214 215#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) || \ 216 defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN) || defined(CONFIG_ARCH_OMAP4) 217/* REVISIT indexed access seemed to 218 * misbehave (on DaVinci) for at least peripheral IN ... 219 */ 220#define MUSB_FLAT_REG 221#endif 222 223/* TUSB mapping: "flat" plus ep0 special cases */ 224#if defined(CONFIG_USB_TUSB6010) 225#define musb_ep_select(_mbase, _epnum) \ 226 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 227#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET 228 229/* "flat" mapping: each endpoint has its own i/o address */ 230#elif defined(MUSB_FLAT_REG) 231#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum))) 232#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET 233 234/* "indexed" mapping: INDEX register controls register bank select */ 235#else 236#define musb_ep_select(_mbase, _epnum) \ 237 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 238#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET 239#endif 240 241/****************************** FUNCTIONS ********************************/ 242 243#define MUSB_HST_MODE(_musb)\ 244 { (_musb)->is_host = true; } 245#define MUSB_DEV_MODE(_musb) \ 246 { (_musb)->is_host = false; } 247 248#define test_devctl_hst_mode(_x) \ 249 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) 250 251#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") 252 253/******************************** TYPES *************************************/ 254 255/* 256 * struct musb_hw_ep - endpoint hardware (bidirectional) 257 * 258 * Ordered slightly for better cacheline locality. 259 */ 260struct musb_hw_ep { 261 struct musb *musb; 262 void __iomem *fifo; 263 void __iomem *regs; 264 265#ifdef CONFIG_USB_TUSB6010 266 void __iomem *conf; 267#endif 268 269 /* index in musb->endpoints[] */ 270 u8 epnum; 271 272 /* hardware configuration, possibly dynamic */ 273 bool is_shared_fifo; 274 bool tx_double_buffered; 275 bool rx_double_buffered; 276 u16 max_packet_sz_tx; 277 u16 max_packet_sz_rx; 278 279 struct dma_channel *tx_channel; 280 struct dma_channel *rx_channel; 281 282#ifdef CONFIG_USB_TUSB6010 283 /* TUSB has "asynchronous" and "synchronous" dma modes */ 284 dma_addr_t fifo_async; 285 dma_addr_t fifo_sync; 286 void __iomem *fifo_sync_va; 287#endif 288 289#ifdef CONFIG_USB_MUSB_HDRC_HCD 290 void __iomem *target_regs; 291 292 /* currently scheduled peripheral endpoint */ 293 struct musb_qh *in_qh; 294 struct musb_qh *out_qh; 295 296 u8 rx_reinit; 297 u8 tx_reinit; 298#endif 299 300#ifdef CONFIG_USB_GADGET_MUSB_HDRC 301 /* peripheral side */ 302 struct musb_ep ep_in; /* TX */ 303 struct musb_ep ep_out; /* RX */ 304#endif 305}; 306 307static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep) 308{ 309#ifdef CONFIG_USB_GADGET_MUSB_HDRC 310 return next_request(&hw_ep->ep_in); 311#else 312 return NULL; 313#endif 314} 315 316static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep) 317{ 318#ifdef CONFIG_USB_GADGET_MUSB_HDRC 319 return next_request(&hw_ep->ep_out); 320#else 321 return NULL; 322#endif 323} 324 325/* 326 * struct musb - Driver instance data. 327 */ 328struct musb { 329 /* device lock */ 330 spinlock_t lock; 331 struct clk *clock; 332 irqreturn_t (*isr)(int, void *); 333 struct work_struct irq_work; 334 u16 hwvers; 335 336/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 337#define MUSB_PORT_STAT_RESUME (1 << 31) 338 339 u32 port1_status; 340 341#ifdef CONFIG_USB_MUSB_HDRC_HCD 342 unsigned long rh_timer; 343 344 enum musb_h_ep0_state ep0_stage; 345 346 /* bulk traffic normally dedicates endpoint hardware, and each 347 * direction has its own ring of host side endpoints. 348 * we try to progress the transfer at the head of each endpoint's 349 * queue until it completes or NAKs too much; then we try the next 350 * endpoint. 351 */ 352 struct musb_hw_ep *bulk_ep; 353 354 struct list_head control; /* of musb_qh */ 355 struct list_head in_bulk; /* of musb_qh */ 356 struct list_head out_bulk; /* of musb_qh */ 357 358 struct timer_list otg_timer; 359#endif 360 361 /* called with IRQs blocked; ON/nonzero implies starting a session, 362 * and waiting at least a_wait_vrise_tmout. 363 */ 364 void (*board_set_vbus)(struct musb *, int is_on); 365 366 struct dma_controller *dma_controller; 367 368 struct device *controller; 369 void __iomem *ctrl_base; 370 void __iomem *mregs; 371 372#ifdef CONFIG_USB_TUSB6010 373 dma_addr_t async; 374 dma_addr_t sync; 375 void __iomem *sync_va; 376#endif 377 378 /* passed down from chip/board specific irq handlers */ 379 u8 int_usb; 380 u16 int_rx; 381 u16 int_tx; 382 383 struct otg_transceiver *xceiv; 384 385 int nIrq; 386 unsigned irq_wake:1; 387 388 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; 389#define control_ep endpoints 390 391#define VBUSERR_RETRY_COUNT 3 392 u16 vbuserr_retry; 393 u16 epmask; 394 u8 nr_endpoints; 395 396 u8 board_mode; /* enum musb_mode */ 397 int (*board_set_power)(int state); 398 399 int (*set_clock)(struct clk *clk, int is_active); 400 401 u8 min_power; /* vbus for periph, in mA/2 */ 402 403 bool is_host; 404 405 int a_wait_bcon; /* VBUS timeout in msecs */ 406 unsigned long idle_timeout; /* Next timeout in jiffies */ 407 408 /* active means connected and not suspended */ 409 unsigned is_active:1; 410 411 unsigned is_multipoint:1; 412 unsigned ignore_disconnect:1; /* during bus resets */ 413 414 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 415 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 416 unsigned dyn_fifo:1; /* dynamic FIFO supported? */ 417 418 unsigned bulk_split:1; 419#define can_bulk_split(musb,type) \ 420 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 421 422 unsigned bulk_combine:1; 423#define can_bulk_combine(musb,type) \ 424 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 425 426#ifdef CONFIG_USB_GADGET_MUSB_HDRC 427 /* is_suspended means USB B_PERIPHERAL suspend */ 428 unsigned is_suspended:1; 429 430 /* may_wakeup means remote wakeup is enabled */ 431 unsigned may_wakeup:1; 432 433 /* is_self_powered is reported in device status and the 434 * config descriptor. is_bus_powered means B_PERIPHERAL 435 * draws some VBUS current; both can be true. 436 */ 437 unsigned is_self_powered:1; 438 unsigned is_bus_powered:1; 439 440 unsigned set_address:1; 441 unsigned test_mode:1; 442 unsigned softconnect:1; 443 444 u8 address; 445 u8 test_mode_nr; 446 u16 ackpend; /* ep0 */ 447 enum musb_g_ep0_state ep0_state; 448 struct usb_gadget g; /* the gadget */ 449 struct usb_gadget_driver *gadget_driver; /* its driver */ 450#endif 451 452 struct musb_hdrc_config *config; 453 454#ifdef MUSB_CONFIG_PROC_FS 455 struct proc_dir_entry *proc_entry; 456#endif 457}; 458 459#ifdef CONFIG_PM 460struct musb_csr_regs { 461 /* FIFO registers */ 462 u16 txmaxp, txcsr, rxmaxp, rxcsr; 463 u16 rxfifoadd, txfifoadd; 464 u8 txtype, txinterval, rxtype, rxinterval; 465 u8 rxfifosz, txfifosz; 466 u8 txfunaddr, txhubaddr, txhubport; 467 u8 rxfunaddr, rxhubaddr, rxhubport; 468}; 469 470struct musb_context_registers { 471 472#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ 473 defined(CONFIG_ARCH_OMAP4) 474 u32 otg_sysconfig, otg_forcestandby; 475#endif 476 u8 power; 477 u16 intrtxe, intrrxe; 478 u8 intrusbe; 479 u16 frame; 480 u8 index, testmode; 481 482 u8 devctl, busctl, misc; 483 484 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 485}; 486 487#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ 488 defined(CONFIG_ARCH_OMAP4) 489extern void musb_platform_save_context(struct musb *musb, 490 struct musb_context_registers *musb_context); 491extern void musb_platform_restore_context(struct musb *musb, 492 struct musb_context_registers *musb_context); 493#else 494#define musb_platform_save_context(m, x) do {} while (0) 495#define musb_platform_restore_context(m, x) do {} while (0) 496#endif 497 498#endif 499 500static inline void musb_set_vbus(struct musb *musb, int is_on) 501{ 502 musb->board_set_vbus(musb, is_on); 503} 504 505#ifdef CONFIG_USB_GADGET_MUSB_HDRC 506static inline struct musb *gadget_to_musb(struct usb_gadget *g) 507{ 508 return container_of(g, struct musb, g); 509} 510#endif 511 512#ifdef CONFIG_BLACKFIN 513static inline int musb_read_fifosize(struct musb *musb, 514 struct musb_hw_ep *hw_ep, u8 epnum) 515{ 516 musb->nr_endpoints++; 517 musb->epmask |= (1 << epnum); 518 519 if (epnum < 5) { 520 hw_ep->max_packet_sz_tx = 128; 521 hw_ep->max_packet_sz_rx = 128; 522 } else { 523 hw_ep->max_packet_sz_tx = 1024; 524 hw_ep->max_packet_sz_rx = 1024; 525 } 526 hw_ep->is_shared_fifo = false; 527 528 return 0; 529} 530 531static inline void musb_configure_ep0(struct musb *musb) 532{ 533 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 534 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 535 musb->endpoints[0].is_shared_fifo = true; 536} 537 538#else 539 540static inline int musb_read_fifosize(struct musb *musb, 541 struct musb_hw_ep *hw_ep, u8 epnum) 542{ 543 void *mbase = musb->mregs; 544 u8 reg = 0; 545 546 /* read from core using indexed model */ 547 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE)); 548 /* 0's returned when no more endpoints */ 549 if (!reg) 550 return -ENODEV; 551 552 musb->nr_endpoints++; 553 musb->epmask |= (1 << epnum); 554 555 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); 556 557 /* shared TX/RX FIFO? */ 558 if ((reg & 0xf0) == 0xf0) { 559 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; 560 hw_ep->is_shared_fifo = true; 561 return 0; 562 } else { 563 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); 564 hw_ep->is_shared_fifo = false; 565 } 566 567 return 0; 568} 569 570static inline void musb_configure_ep0(struct musb *musb) 571{ 572 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 573 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 574 musb->endpoints[0].is_shared_fifo = true; 575} 576#endif /* CONFIG_BLACKFIN */ 577 578 579/***************************** Glue it together *****************************/ 580 581extern const char musb_driver_name[]; 582 583extern void musb_start(struct musb *musb); 584extern void musb_stop(struct musb *musb); 585 586extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 587extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); 588 589extern void musb_load_testpacket(struct musb *); 590 591extern irqreturn_t musb_interrupt(struct musb *); 592 593extern void musb_platform_enable(struct musb *musb); 594extern void musb_platform_disable(struct musb *musb); 595 596extern void musb_hnp_stop(struct musb *musb); 597 598extern int musb_platform_set_mode(struct musb *musb, u8 musb_mode); 599 600#if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN) || \ 601 defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ 602 defined(CONFIG_ARCH_OMAP4) 603extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout); 604#else 605#define musb_platform_try_idle(x, y) do {} while (0) 606#endif 607 608#if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN) 609extern int musb_platform_get_vbus_status(struct musb *musb); 610#else 611#define musb_platform_get_vbus_status(x) 0 612#endif 613 614extern int __init musb_platform_init(struct musb *musb, void *board_data); 615extern int musb_platform_exit(struct musb *musb); 616 617#endif /* __MUSB_CORE_H__ */ 618