1/* 2 * Copyright 2005-2009 MontaVista Software, Inc. 3 * Copyright 2008 Freescale Semiconductor, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software Foundation, 17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18 * 19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided 20 * by Hunter Wu. 21 * Power Management support by Dave Liu <daveliu@freescale.com>, 22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and 23 * Anton Vorontsov <avorontsov@ru.mvista.com>. 24 */ 25 26#include <linux/kernel.h> 27#include <linux/types.h> 28#include <linux/delay.h> 29#include <linux/pm.h> 30#include <linux/platform_device.h> 31#include <linux/fsl_devices.h> 32 33#include "ehci-fsl.h" 34 35/* configure so an HC device and id are always provided */ 36/* always called with process context; sleeping is OK */ 37 38/** 39 * usb_hcd_fsl_probe - initialize FSL-based HCDs 40 * @drvier: Driver to be used for this HCD 41 * @pdev: USB Host Controller being probed 42 * Context: !in_interrupt() 43 * 44 * Allocates basic resources for this USB host controller. 45 * 46 */ 47static int usb_hcd_fsl_probe(const struct hc_driver *driver, 48 struct platform_device *pdev) 49{ 50 struct fsl_usb2_platform_data *pdata; 51 struct usb_hcd *hcd; 52 struct resource *res; 53 int irq; 54 int retval; 55 unsigned int temp; 56 57 pr_debug("initializing FSL-SOC USB Controller\n"); 58 59 /* Need platform data for setup */ 60 pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data; 61 if (!pdata) { 62 dev_err(&pdev->dev, 63 "No platform data for %s.\n", dev_name(&pdev->dev)); 64 return -ENODEV; 65 } 66 67 /* 68 * This is a host mode driver, verify that we're supposed to be 69 * in host mode. 70 */ 71 if (!((pdata->operating_mode == FSL_USB2_DR_HOST) || 72 (pdata->operating_mode == FSL_USB2_MPH_HOST) || 73 (pdata->operating_mode == FSL_USB2_DR_OTG))) { 74 dev_err(&pdev->dev, 75 "Non Host Mode configured for %s. Wrong driver linked.\n", 76 dev_name(&pdev->dev)); 77 return -ENODEV; 78 } 79 80 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 81 if (!res) { 82 dev_err(&pdev->dev, 83 "Found HC with no IRQ. Check %s setup!\n", 84 dev_name(&pdev->dev)); 85 return -ENODEV; 86 } 87 irq = res->start; 88 89 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); 90 if (!hcd) { 91 retval = -ENOMEM; 92 goto err1; 93 } 94 95 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 96 if (!res) { 97 dev_err(&pdev->dev, 98 "Found HC with no register addr. Check %s setup!\n", 99 dev_name(&pdev->dev)); 100 retval = -ENODEV; 101 goto err2; 102 } 103 hcd->rsrc_start = res->start; 104 hcd->rsrc_len = res->end - res->start + 1; 105 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, 106 driver->description)) { 107 dev_dbg(&pdev->dev, "controller already in use\n"); 108 retval = -EBUSY; 109 goto err2; 110 } 111 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); 112 113 if (hcd->regs == NULL) { 114 dev_dbg(&pdev->dev, "error mapping memory\n"); 115 retval = -EFAULT; 116 goto err3; 117 } 118 119 /* Enable USB controller */ 120 temp = in_be32(hcd->regs + 0x500); 121 out_be32(hcd->regs + 0x500, temp | 0x4); 122 123 /* Set to Host mode */ 124 temp = in_le32(hcd->regs + 0x1a8); 125 out_le32(hcd->regs + 0x1a8, temp | 0x3); 126 127 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); 128 if (retval != 0) 129 goto err4; 130 return retval; 131 132 err4: 133 iounmap(hcd->regs); 134 err3: 135 release_mem_region(hcd->rsrc_start, hcd->rsrc_len); 136 err2: 137 usb_put_hcd(hcd); 138 err1: 139 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval); 140 return retval; 141} 142 143/* may be called without controller electrically present */ 144/* may be called with controller, bus, and devices active */ 145 146/** 147 * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs 148 * @dev: USB Host Controller being removed 149 * Context: !in_interrupt() 150 * 151 * Reverses the effect of usb_hcd_fsl_probe(). 152 * 153 */ 154static void usb_hcd_fsl_remove(struct usb_hcd *hcd, 155 struct platform_device *pdev) 156{ 157 usb_remove_hcd(hcd); 158 iounmap(hcd->regs); 159 release_mem_region(hcd->rsrc_start, hcd->rsrc_len); 160 usb_put_hcd(hcd); 161} 162 163static void mpc83xx_setup_phy(struct ehci_hcd *ehci, 164 enum fsl_usb2_phy_modes phy_mode, 165 unsigned int port_offset) 166{ 167 u32 portsc = 0; 168 switch (phy_mode) { 169 case FSL_USB2_PHY_ULPI: 170 portsc |= PORT_PTS_ULPI; 171 break; 172 case FSL_USB2_PHY_SERIAL: 173 portsc |= PORT_PTS_SERIAL; 174 break; 175 case FSL_USB2_PHY_UTMI_WIDE: 176 portsc |= PORT_PTS_PTW; 177 /* fall through */ 178 case FSL_USB2_PHY_UTMI: 179 portsc |= PORT_PTS_UTMI; 180 break; 181 case FSL_USB2_PHY_NONE: 182 break; 183 } 184 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); 185} 186 187static void mpc83xx_usb_setup(struct usb_hcd *hcd) 188{ 189 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 190 struct fsl_usb2_platform_data *pdata; 191 void __iomem *non_ehci = hcd->regs; 192 u32 temp; 193 194 pdata = 195 (struct fsl_usb2_platform_data *)hcd->self.controller-> 196 platform_data; 197 /* Enable PHY interface in the control reg. */ 198 temp = in_be32(non_ehci + FSL_SOC_USB_CTRL); 199 out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004); 200 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b); 201 202#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) 203 /* 204 * Turn on cache snooping hardware, since some PowerPC platforms 205 * wholly rely on hardware to deal with cache coherent 206 */ 207 208 /* Setup Snooping for all the 4GB space */ 209 /* SNOOP1 starts from 0x0, size 2G */ 210 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB); 211 /* SNOOP2 starts from 0x80000000, size 2G */ 212 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB); 213#endif 214 215 if ((pdata->operating_mode == FSL_USB2_DR_HOST) || 216 (pdata->operating_mode == FSL_USB2_DR_OTG)) 217 mpc83xx_setup_phy(ehci, pdata->phy_mode, 0); 218 219 if (pdata->operating_mode == FSL_USB2_MPH_HOST) { 220 unsigned int chip, rev, svr; 221 222 svr = mfspr(SPRN_SVR); 223 chip = svr >> 16; 224 rev = (svr >> 4) & 0xf; 225 226 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */ 227 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055)) 228 ehci->has_fsl_port_bug = 1; 229 230 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED) 231 mpc83xx_setup_phy(ehci, pdata->phy_mode, 0); 232 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED) 233 mpc83xx_setup_phy(ehci, pdata->phy_mode, 1); 234 } 235 236 /* put controller in host mode. */ 237 ehci_writel(ehci, 0x00000003, non_ehci + FSL_SOC_USB_USBMODE); 238#ifdef CONFIG_PPC_85xx 239 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008); 240 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080); 241#else 242 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c); 243 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040); 244#endif 245 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); 246} 247 248/* called after powerup, by probe or system-pm "wakeup" */ 249static int ehci_fsl_reinit(struct ehci_hcd *ehci) 250{ 251 mpc83xx_usb_setup(ehci_to_hcd(ehci)); 252 ehci_port_power(ehci, 0); 253 254 return 0; 255} 256 257/* called during probe() after chip reset completes */ 258static int ehci_fsl_setup(struct usb_hcd *hcd) 259{ 260 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 261 int retval; 262 263 /* EHCI registers start at offset 0x100 */ 264 ehci->caps = hcd->regs + 0x100; 265 ehci->regs = hcd->regs + 0x100 + 266 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); 267 dbg_hcs_params(ehci, "reset"); 268 dbg_hcc_params(ehci, "reset"); 269 270 /* cache this readonly data; minimize chip reads */ 271 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); 272 273 retval = ehci_halt(ehci); 274 if (retval) 275 return retval; 276 277 /* data structure init */ 278 retval = ehci_init(hcd); 279 if (retval) 280 return retval; 281 282 hcd->has_tt = 1; 283 284 ehci->sbrn = 0x20; 285 286 ehci_reset(ehci); 287 288 retval = ehci_fsl_reinit(ehci); 289 return retval; 290} 291 292struct ehci_fsl { 293 struct ehci_hcd ehci; 294 295#ifdef CONFIG_PM 296 /* Saved USB PHY settings, need to restore after deep sleep. */ 297 u32 usb_ctrl; 298#endif 299}; 300 301#ifdef CONFIG_PM 302 303static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd) 304{ 305 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 306 307 return container_of(ehci, struct ehci_fsl, ehci); 308} 309 310static int ehci_fsl_drv_suspend(struct device *dev) 311{ 312 struct usb_hcd *hcd = dev_get_drvdata(dev); 313 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); 314 void __iomem *non_ehci = hcd->regs; 315 316 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd), 317 device_may_wakeup(dev)); 318 if (!fsl_deep_sleep()) 319 return 0; 320 321 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL); 322 return 0; 323} 324 325static int ehci_fsl_drv_resume(struct device *dev) 326{ 327 struct usb_hcd *hcd = dev_get_drvdata(dev); 328 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); 329 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 330 void __iomem *non_ehci = hcd->regs; 331 332 ehci_prepare_ports_for_controller_resume(ehci); 333 if (!fsl_deep_sleep()) 334 return 0; 335 336 usb_root_hub_lost_power(hcd->self.root_hub); 337 338 /* Restore USB PHY settings and enable the controller. */ 339 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl); 340 341 ehci_reset(ehci); 342 ehci_fsl_reinit(ehci); 343 344 return 0; 345} 346 347static int ehci_fsl_drv_restore(struct device *dev) 348{ 349 struct usb_hcd *hcd = dev_get_drvdata(dev); 350 351 usb_root_hub_lost_power(hcd->self.root_hub); 352 return 0; 353} 354 355static struct dev_pm_ops ehci_fsl_pm_ops = { 356 .suspend = ehci_fsl_drv_suspend, 357 .resume = ehci_fsl_drv_resume, 358 .restore = ehci_fsl_drv_restore, 359}; 360 361#define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops) 362#else 363#define EHCI_FSL_PM_OPS NULL 364#endif /* CONFIG_PM */ 365 366static const struct hc_driver ehci_fsl_hc_driver = { 367 .description = hcd_name, 368 .product_desc = "Freescale On-Chip EHCI Host Controller", 369 .hcd_priv_size = sizeof(struct ehci_fsl), 370 371 /* 372 * generic hardware linkage 373 */ 374 .irq = ehci_irq, 375 .flags = HCD_USB2, 376 377 /* 378 * basic lifecycle operations 379 */ 380 .reset = ehci_fsl_setup, 381 .start = ehci_run, 382 .stop = ehci_stop, 383 .shutdown = ehci_shutdown, 384 385 /* 386 * managing i/o requests and associated device resources 387 */ 388 .urb_enqueue = ehci_urb_enqueue, 389 .urb_dequeue = ehci_urb_dequeue, 390 .endpoint_disable = ehci_endpoint_disable, 391 .endpoint_reset = ehci_endpoint_reset, 392 393 /* 394 * scheduling support 395 */ 396 .get_frame_number = ehci_get_frame, 397 398 /* 399 * root hub support 400 */ 401 .hub_status_data = ehci_hub_status_data, 402 .hub_control = ehci_hub_control, 403 .bus_suspend = ehci_bus_suspend, 404 .bus_resume = ehci_bus_resume, 405 .relinquish_port = ehci_relinquish_port, 406 .port_handed_over = ehci_port_handed_over, 407 408 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, 409}; 410 411static int ehci_fsl_drv_probe(struct platform_device *pdev) 412{ 413 if (usb_disabled()) 414 return -ENODEV; 415 416 return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev); 417} 418 419static int ehci_fsl_drv_remove(struct platform_device *pdev) 420{ 421 struct usb_hcd *hcd = platform_get_drvdata(pdev); 422 423 usb_hcd_fsl_remove(hcd, pdev); 424 return 0; 425} 426 427MODULE_ALIAS("platform:fsl-ehci"); 428 429static struct platform_driver ehci_fsl_driver = { 430 .probe = ehci_fsl_drv_probe, 431 .remove = ehci_fsl_drv_remove, 432 .shutdown = usb_hcd_platform_shutdown, 433 .driver = { 434 .name = "fsl-ehci", 435 .pm = EHCI_FSL_PM_OPS, 436 }, 437}; 438