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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/wlags49_h2/
1//   vim:tw=110:ts=4:
2/************************************************************************************************************
3*
4* FILE   :	HCF.C
5*
6* DATE    :	$Date: 2004/08/05 11:47:10 $   $Revision: 1.10 $
7* Original:	2004/06/02 10:22:22    Revision: 1.85      Tag: hcf7_t20040602_01
8* Original:	2004/04/15 09:24:41    Revision: 1.63      Tag: hcf7_t7_20040415_01
9* Original:	2004/04/13 14:22:44    Revision: 1.62      Tag: t7_20040413_01
10* Original:	2004/04/01 15:32:55    Revision: 1.59      Tag: t7_20040401_01
11* Original:	2004/03/10 15:39:27    Revision: 1.55      Tag: t20040310_01
12* Original:	2004/03/04 11:03:37    Revision: 1.53      Tag: t20040304_01
13* Original:	2004/03/02 14:51:21    Revision: 1.50      Tag: t20040302_03
14* Original:	2004/02/24 13:00:27    Revision: 1.43      Tag: t20040224_01
15* Original:	2004/02/19 10:57:25    Revision: 1.39      Tag: t20040219_01
16*
17* AUTHOR :	Nico Valster
18*
19* SPECIFICATION: ........
20*
21* DESCRIPTION :	HCF Routines for Hermes-II (callable via the Wireless Connection I/F or WCI)
22*				Local Support Routines for above procedures
23*
24*			Customizable via HCFCFG.H, which is included by HCF.H
25*
26*************************************************************************************************************
27*
28*
29* SOFTWARE LICENSE
30*
31* This software is provided subject to the following terms and conditions,
32* which you should read carefully before using the software.  Using this
33* software indicates your acceptance of these terms and conditions.  If you do
34* not agree with these terms and conditions, do not use the software.
35*
36* COPYRIGHT � 1994 - 1995	by AT&T.				All Rights Reserved
37* COPYRIGHT � 1996 - 2000 by Lucent Technologies.	All Rights Reserved
38* COPYRIGHT � 2001 - 2004	by Agere Systems Inc.	All Rights Reserved
39* All rights reserved.
40*
41* Redistribution and use in source or binary forms, with or without
42* modifications, are permitted provided that the following conditions are met:
43*
44* . Redistributions of source code must retain the above copyright notice, this
45*    list of conditions and the following Disclaimer as comments in the code as
46*    well as in the documentation and/or other materials provided with the
47*    distribution.
48*
49* . Redistributions in binary form must reproduce the above copyright notice,
50*    this list of conditions and the following Disclaimer in the documentation
51*    and/or other materials provided with the distribution.
52*
53* . Neither the name of Agere Systems Inc. nor the names of the contributors
54*    may be used to endorse or promote products derived from this software
55*    without specific prior written permission.
56*
57* Disclaimer
58*
59* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
60* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
61* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  ANY
62* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
63* RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
64* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
65* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
66* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
67* ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
68* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
69* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
70* DAMAGE.
71*
72*
73************************************************************************************************************/
74
75
76/************************************************************************************************************
77**
78** Implementation Notes
79**
80* -	a leading marker of //! is used. The purpose of such a sequence is to help to understand the flow
81*	An example is:	//!rc = HCF_SUCCESS;
82*	if this is superfluous because rc is already guaranteed to be 0 but it shows to the (maintenance)
83*	programmer it is an intentional omission at the place where someone could consider it most appropriate at
84*	first glance
85* -	using near pointers in a model where ss!=ds is an invitation for disaster, so be aware of how you specify
86*	your model and how you define variables which are used at interrupt time
87* -	remember that sign extension on 32 bit platforms may cause problems unless code is carefully constructed,
88*	e.g. use "(hcf_16)~foo" rather than "~foo"
89*
90************************************************************************************************************/
91
92#include "hcf.h"				// HCF and MSF common include file
93#include "hcfdef.h"				// HCF specific include file
94#include "mmd.h"				// MoreModularDriver common include file
95
96#if ! defined offsetof
97#define offsetof(s,m)   ((unsigned int)&(((s *)0)->m))
98#endif // offsetof
99
100
101/***********************************************************************************************************/
102/***************************************  PROTOTYPES  ******************************************************/
103/***********************************************************************************************************/
104HCF_STATIC int			cmd_exe( IFBP ifbp, hcf_16 cmd_code, hcf_16 par_0 );
105HCF_STATIC int			init( IFBP ifbp );
106HCF_STATIC int			put_info( IFBP ifbp, LTVP ltvp );
107#if (HCF_EXT) & HCF_EXT_MB
108HCF_STATIC int			put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp );
109#endif // HCF_EXT_MB
110#if (HCF_TYPE) & HCF_TYPE_WPA
111HCF_STATIC void			calc_mic( hcf_32* p, hcf_32 M );
112void 					calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len );
113void 					calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len );
114HCF_STATIC int			check_mic( IFBP ifbp );
115#endif // HCF_TYPE_WPA
116
117HCF_STATIC void			calibrate( IFBP ifbp );
118HCF_STATIC int			cmd_cmpl( IFBP ifbp );
119HCF_STATIC hcf_16		get_fid( IFBP ifbp );
120HCF_STATIC void			isr_info( IFBP ifbp );
121#if HCF_DMA
122HCF_STATIC DESC_STRCT*	get_frame_lst(IFBP ifbp, int tx_rx_flag);
123#endif // HCF_DMA
124HCF_STATIC void			get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) );	//char*, byte count (usually even)
125#if HCF_DMA
126HCF_STATIC void			put_frame_lst( IFBP ifbp, DESC_STRCT *descp, int tx_rx_flag );
127#endif // HCF_DMA
128HCF_STATIC void			put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) );
129HCF_STATIC void			put_frag_finalize( IFBP ifbp );
130HCF_STATIC int			setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type );
131#if (HCF_ASSERT) & HCF_ASSERT_PRINTF
132static int fw_printf(IFBP ifbp, CFG_FW_PRINTF_STRCT FAR *ltvp);
133#endif // HCF_ASSERT_PRINTF
134
135HCF_STATIC int			download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp );
136#if (HCF_ENCAP) & HCF_ENC
137HCF_STATIC hcf_8		hcf_encap( wci_bufp type );
138#endif // HCF_ENCAP
139HCF_STATIC hcf_8		null_addr[4] = { 0, 0, 0, 0 };
140#if ! defined IN_PORT_WORD			//replace I/O Macros with logging facility
141extern FILE *log_file;
142
143#define IN_PORT_WORD(port)			in_port_word( (hcf_io)(port) )
144
145static hcf_16 in_port_word( hcf_io port ) {
146hcf_16 i = (hcf_16)_inpw( port );
147	if ( log_file ) {
148		fprintf( log_file, "\nR %2.2x %4.4x", (port)&0xFF, i);
149	}
150	return i;
151} // in_port_word
152
153#define OUT_PORT_WORD(port, value)	out_port_word( (hcf_io)(port), (hcf_16)(value) )
154
155static void out_port_word( hcf_io port, hcf_16 value ) {
156	_outpw( port, value );
157	if ( log_file ) {
158		fprintf( log_file, "\nW %2.02x %4.04x", (port)&0xFF, value );
159	}
160}
161
162void IN_PORT_STRING_32( hcf_io prt, hcf_32 FAR * dst, int n)	{
163	int i = 0;
164	hcf_16 FAR * p;
165	if ( log_file ) {
166		fprintf( log_file, "\nread string_32 length %04x (%04d) at port %02.2x to addr %lp",
167				 (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF, dst);
168	}
169	while ( n-- ) {
170		p = (hcf_16 FAR *)dst;
171		*p++ = (hcf_16)_inpw( prt );
172		*p   = (hcf_16)_inpw( prt );
173		if ( log_file ) {
174			fprintf( log_file, "%s%08lx ", i++ % 0x08 ? " " : "\n", *dst);
175		}
176		dst++;
177	}
178} // IN_PORT_STRING_32
179
180void IN_PORT_STRING_8_16( hcf_io prt, hcf_8 FAR * dst, int n) {	//also handles byte alignment problems
181	hcf_16 FAR * p = (hcf_16 FAR *)dst;							//this needs more elaborate code in non-x86 platforms
182	int i = 0;
183	if ( log_file ) {
184		fprintf( log_file, "\nread string_16 length %04x (%04d) at port %02.2x to addr %lp",
185				 (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF, dst );
186	}
187	while ( n-- ) {
188		*p =(hcf_16)_inpw( prt);
189		if ( log_file ) {
190			if ( i++ % 0x10 ) {
191				fprintf( log_file, "%04x ", *p);
192			} else {
193				fprintf( log_file, "\n%04x ", *p);
194			}
195		}
196		p++;
197	}
198} // IN_PORT_STRING_8_16
199
200void OUT_PORT_STRING_32( hcf_io prt, hcf_32 FAR * src, int n)	{
201	int i = 0;
202	hcf_16 FAR * p;
203	if ( log_file ) {
204		fprintf( log_file, "\nwrite string_32 length %04x (%04d) at port %02.2x",
205				 (hcf_16)n, (hcf_16)n, (hcf_16)(prt)&0xFF);
206	}
207	while ( n-- ) {
208		p = (hcf_16 FAR *)src;
209		_outpw( prt, *p++ );
210		_outpw( prt, *p   );
211		if ( log_file ) {
212			fprintf( log_file, "%s%08lx ", i++ % 0x08 ? " " : "\n", *src);
213		}
214		src++;
215	}
216} // OUT_PORT_STRING_32
217
218void OUT_PORT_STRING_8_16( hcf_io prt, hcf_8 FAR * src, int n)	{	//also handles byte alignment problems
219	hcf_16 FAR * p = (hcf_16 FAR *)src;								//this needs more elaborate code in non-x86 platforms
220	int i = 0;
221	if ( log_file ) {
222		fprintf( log_file, "\nwrite string_16 length %04x (%04d) at port %04x", n, n, (hcf_16)prt);
223	}
224	while ( n-- ) {
225		(void)_outpw( prt, *p);
226		if ( log_file ) {
227			if ( i++ % 0x10 ) {
228				fprintf( log_file, "%04x ", *p);
229			} else {
230				fprintf( log_file, "\n%04x ", *p);
231			}
232		}
233		p++;
234	}
235} // OUT_PORT_STRING_8_16
236
237#endif // IN_PORT_WORD
238
239/************************************************************************************************************
240******************************* D A T A    D E F I N I T I O N S ********************************************
241************************************************************************************************************/
242
243#if HCF_ASSERT
244IFBP BASED assert_ifbp = NULL;			//to make asserts easily work under MMD and DHF
245#endif // HCF_ASSERT
246
247#if HCF_ENCAP
248/* SNAP header to be inserted in Ethernet-II frames */
249HCF_STATIC  hcf_8 BASED snap_header[] = { 0xAA, 0xAA, 0x03, 0x00, 0x00,	//5 bytes signature +
250										  0 };							//1 byte protocol identifier
251#endif // HCF_ENCAP
252
253#if (HCF_TYPE) & HCF_TYPE_WPA
254HCF_STATIC hcf_8 BASED mic_pad[8] = { 0x5A, 0, 0, 0, 0, 0, 0, 0 };		//MIC padding of message
255#endif // HCF_TYPE_WPA
256
257#if defined MSF_COMPONENT_ID
258CFG_IDENTITY_STRCT BASED cfg_drv_identity = {
259	sizeof(cfg_drv_identity)/sizeof(hcf_16) - 1,	//length of RID
260	CFG_DRV_IDENTITY,			// (0x0826)
261	MSF_COMPONENT_ID,
262	MSF_COMPONENT_VAR,
263	MSF_COMPONENT_MAJOR_VER,
264	MSF_COMPONENT_MINOR_VER
265} ;
266
267CFG_RANGES_STRCT BASED cfg_drv_sup_range = {
268	sizeof(cfg_drv_sup_range)/sizeof(hcf_16) - 1,	//length of RID
269	CFG_DRV_SUP_RANGE,			// (0x0827)
270
271	COMP_ROLE_SUPL,
272	COMP_ID_DUI,
273	{{	DUI_COMPAT_VAR,
274		DUI_COMPAT_BOT,
275		DUI_COMPAT_TOP
276	}}
277} ;
278
279struct CFG_RANGE3_STRCT BASED cfg_drv_act_ranges_pri = {
280	sizeof(cfg_drv_act_ranges_pri)/sizeof(hcf_16) - 1,	//length of RID
281	CFG_DRV_ACT_RANGES_PRI,		// (0x0828)
282
283	COMP_ROLE_ACT,
284	COMP_ID_PRI,
285	{
286	 { 0, 0, 0 }, 							// HCF_PRI_VAR_1 not supported by HCF 7
287	 { 0, 0, 0 }, 							// HCF_PRI_VAR_2 not supported by HCF 7
288	 {	3,									//var_rec[2] - Variant number
289		CFG_DRV_ACT_RANGES_PRI_3_BOTTOM,		//		 - Bottom Compatibility
290		CFG_DRV_ACT_RANGES_PRI_3_TOP			//		 - Top Compatibility
291	 }
292	}
293} ;
294
295
296struct CFG_RANGE4_STRCT BASED cfg_drv_act_ranges_sta = {
297	sizeof(cfg_drv_act_ranges_sta)/sizeof(hcf_16) - 1,	//length of RID
298	CFG_DRV_ACT_RANGES_STA,		// (0x0829)
299
300	COMP_ROLE_ACT,
301	COMP_ID_STA,
302	{
303#if defined HCF_STA_VAR_1
304	 {	1,									//var_rec[1] - Variant number
305		CFG_DRV_ACT_RANGES_STA_1_BOTTOM,		//		 - Bottom Compatibility
306		CFG_DRV_ACT_RANGES_STA_1_TOP			//		 - Top Compatibility
307	 },
308#else
309	 { 0, 0, 0 },
310#endif // HCF_STA_VAR_1
311#if defined HCF_STA_VAR_2
312	 {	2,									//var_rec[1] - Variant number
313		CFG_DRV_ACT_RANGES_STA_2_BOTTOM,		//		 - Bottom Compatibility
314		CFG_DRV_ACT_RANGES_STA_2_TOP			//		 - Top Compatibility
315	 },
316#else
317	 { 0, 0, 0 },
318#endif // HCF_STA_VAR_2
319// For Native_USB (Not used!)
320#if defined HCF_STA_VAR_3
321	 {	3,									//var_rec[1] - Variant number
322		CFG_DRV_ACT_RANGES_STA_3_BOTTOM,		//		 - Bottom Compatibility
323		CFG_DRV_ACT_RANGES_STA_3_TOP			//		 - Top Compatibility
324	 },
325#else
326	 { 0, 0, 0 },
327#endif // HCF_STA_VAR_3
328// Warp
329#if defined HCF_STA_VAR_4
330	 {	4,									//var_rec[1] - Variant number
331		CFG_DRV_ACT_RANGES_STA_4_BOTTOM,		//           - Bottom Compatibility
332		CFG_DRV_ACT_RANGES_STA_4_TOP			//           - Top Compatibility
333	 }
334#else
335	 { 0, 0, 0 }
336#endif // HCF_STA_VAR_4
337	}
338} ;
339
340
341struct CFG_RANGE6_STRCT BASED cfg_drv_act_ranges_hsi = {
342	sizeof(cfg_drv_act_ranges_hsi)/sizeof(hcf_16) - 1,	//length of RID
343	CFG_DRV_ACT_RANGES_HSI,		// (0x082A)
344	COMP_ROLE_ACT,
345	COMP_ID_HSI,
346	{
347#if defined HCF_HSI_VAR_0					// Controlled deployment
348	 {	0,									// var_rec[1] - Variant number
349		CFG_DRV_ACT_RANGES_HSI_0_BOTTOM,		//           - Bottom Compatibility
350		CFG_DRV_ACT_RANGES_HSI_0_TOP			//           - Top Compatibility
351	 },
352#else
353	 { 0, 0, 0 },
354#endif // HCF_HSI_VAR_0
355	 { 0, 0, 0 }, 							// HCF_HSI_VAR_1 not supported by HCF 7
356	 { 0, 0, 0 }, 							// HCF_HSI_VAR_2 not supported by HCF 7
357	 { 0, 0, 0 }, 							// HCF_HSI_VAR_3 not supported by HCF 7
358#if defined HCF_HSI_VAR_4					// Hermes-II all types
359	 {	4,									// var_rec[1] - Variant number
360		CFG_DRV_ACT_RANGES_HSI_4_BOTTOM,		//           - Bottom Compatibility
361		CFG_DRV_ACT_RANGES_HSI_4_TOP			//           - Top Compatibility
362	 },
363#else
364	 { 0, 0, 0 },
365#endif // HCF_HSI_VAR_4
366#if defined HCF_HSI_VAR_5					// WARP Hermes-2.5
367	 {	5,									// var_rec[1] - Variant number
368		CFG_DRV_ACT_RANGES_HSI_5_BOTTOM,		//           - Bottom Compatibility
369		CFG_DRV_ACT_RANGES_HSI_5_TOP			//           - Top Compatibility
370	 }
371#else
372	 { 0, 0, 0 }
373#endif // HCF_HSI_VAR_5
374	}
375} ;
376
377
378CFG_RANGE4_STRCT BASED cfg_drv_act_ranges_apf = {
379	sizeof(cfg_drv_act_ranges_apf)/sizeof(hcf_16) - 1,	//length of RID
380	CFG_DRV_ACT_RANGES_APF,		// (0x082B)
381
382	COMP_ROLE_ACT,
383	COMP_ID_APF,
384	{
385#if defined HCF_APF_VAR_1				//(Fake) Hermes-I
386	 {	1,									//var_rec[1] - Variant number
387		CFG_DRV_ACT_RANGES_APF_1_BOTTOM,		//           - Bottom Compatibility
388		CFG_DRV_ACT_RANGES_APF_1_TOP			//           - Top Compatibility
389	 },
390#else
391	 { 0, 0, 0 },
392#endif // HCF_APF_VAR_1
393#if defined HCF_APF_VAR_2				//Hermes-II
394	 {	2,									// var_rec[1] - Variant number
395		CFG_DRV_ACT_RANGES_APF_2_BOTTOM,		//           - Bottom Compatibility
396		CFG_DRV_ACT_RANGES_APF_2_TOP			//           - Top Compatibility
397	 },
398#else
399	 { 0, 0, 0 },
400#endif // HCF_APF_VAR_2
401#if defined HCF_APF_VAR_3						// Native_USB
402	 {	3,										// var_rec[1] - Variant number
403		CFG_DRV_ACT_RANGES_APF_3_BOTTOM,		//           - Bottom Compatibility	!!!!!see note below!!!!!!!
404		CFG_DRV_ACT_RANGES_APF_3_TOP			//           - Top Compatibility
405	 },
406#else
407	 { 0, 0, 0 },
408#endif // HCF_APF_VAR_3
409#if defined HCF_APF_VAR_4						// WARP Hermes 2.5
410	 {	4,										// var_rec[1] - Variant number
411		CFG_DRV_ACT_RANGES_APF_4_BOTTOM,		//           - Bottom Compatibility	!!!!!see note below!!!!!!!
412		CFG_DRV_ACT_RANGES_APF_4_TOP			//           - Top Compatibility
413	 }
414#else
415	 { 0, 0, 0 }
416#endif // HCF_APF_VAR_4
417	}
418} ;
419#define HCF_VERSION  TEXT( "HCF$Revision: 1.10 $" )
420
421static struct /*CFG_HCF_OPT_STRCT*/ {
422	hcf_16	len;					//length of cfg_hcf_opt struct
423	hcf_16	typ;					//type 0x082C
424	hcf_16	 v0;						//offset HCF_VERSION
425	hcf_16	 v1;						// MSF_COMPONENT_ID
426	hcf_16	 v2;						// HCF_ALIGN
427	hcf_16	 v3;						// HCF_ASSERT
428	hcf_16	 v4;						// HCF_BIG_ENDIAN
429	hcf_16	 v5;						// /* HCF_DLV | HCF_DLNV */
430	hcf_16	 v6;						// HCF_DMA
431	hcf_16	 v7;						// HCF_ENCAP
432	hcf_16	 v8;						// HCF_EXT
433	hcf_16	 v9;						// HCF_INT_ON
434	hcf_16	v10;						// HCF_IO
435	hcf_16	v11;						// HCF_LEGACY
436	hcf_16	v12;						// HCF_MAX_LTV
437	hcf_16	v13;						// HCF_PROT_TIME
438	hcf_16	v14;						// HCF_SLEEP
439	hcf_16	v15;						// HCF_TALLIES
440	hcf_16	v16;						// HCF_TYPE
441	hcf_16	v17;						// HCF_NIC_TAL_CNT
442	hcf_16	v18;						// HCF_HCF_TAL_CNT
443	hcf_16	v19;						// offset tallies
444	TCHAR	val[sizeof(HCF_VERSION)];
445} BASED cfg_hcf_opt = {
446	sizeof(cfg_hcf_opt)/sizeof(hcf_16) -1,
447	CFG_HCF_OPT,				// (0x082C)
448	( sizeof(cfg_hcf_opt) - sizeof(HCF_VERSION) - 4 )/sizeof(hcf_16),
449#if defined MSF_COMPONENT_ID
450	MSF_COMPONENT_ID,
451#else
452	0,
453#endif // MSF_COMPONENT_ID
454	HCF_ALIGN,
455	HCF_ASSERT,
456	HCF_BIG_ENDIAN,
457	0,									// /* HCF_DLV | HCF_DLNV*/,
458	HCF_DMA,
459	HCF_ENCAP,
460	HCF_EXT,
461	HCF_INT_ON,
462	HCF_IO,
463	HCF_LEGACY,
464	HCF_MAX_LTV,
465	HCF_PROT_TIME,
466	HCF_SLEEP,
467	HCF_TALLIES,
468	HCF_TYPE,
469#if (HCF_TALLIES) & ( HCF_TALLIES_NIC | HCF_TALLIES_HCF )
470	HCF_NIC_TAL_CNT,
471	HCF_HCF_TAL_CNT,
472	offsetof(IFB_STRCT, IFB_TallyLen ),
473#else
474	0, 0, 0,
475#endif // HCF_TALLIES_NIC / HCF_TALLIES_HCF
476	HCF_VERSION
477}; // cfg_hcf_opt
478#endif // MSF_COMPONENT_ID
479
480#if defined HCF_TALLIES_EXTRA
481	replaced by HCF_EXT_TALLIES_FW ;
482#endif // HCF_TALLIES_EXTRA
483
484#if defined MSF_COMPONENT_ID || (HCF_EXT) & HCF_EXT_MB
485#if (HCF_EXT) & HCF_EXT_MB
486HCF_STATIC LTV_STRCT BASED cfg_null = { 1, CFG_NULL, {0} };
487#endif // HCF_EXT_MB
488HCF_STATIC hcf_16* BASED xxxx[ ] = {
489#if (HCF_EXT) & HCF_EXT_MB
490	&cfg_null.len,							//CFG_NULL						0x0820
491#endif // HCF_EXT_MB
492#if defined MSF_COMPONENT_ID
493	&cfg_drv_identity.len,					//CFG_DRV_IDENTITY              0x0826
494	&cfg_drv_sup_range.len,					//CFG_DRV_SUP_RANGE             0x0827
495	&cfg_drv_act_ranges_pri.len,			//CFG_DRV_ACT_RANGES_PRI        0x0828
496	&cfg_drv_act_ranges_sta.len,			//CFG_DRV_ACT_RANGES_STA		0x0829
497	&cfg_drv_act_ranges_hsi.len,			//CFG_DRV_ACT_RANGES_HSI		0x082A
498	&cfg_drv_act_ranges_apf.len,			//CFG_DRV_ACT_RANGES_APF		0x082B
499	&cfg_hcf_opt.len,						//CFG_HCF_OPT					0x082C
500	NULL,									//IFB_PRIIdentity placeholder	0xFD02
501	NULL,									//IFB_PRISup placeholder		0xFD03
502#endif // MSF_COMPONENT_ID
503	NULL									//endsentinel
504  };
505#define xxxx_PRI_IDENTITY_OFFSET	(ARRAY_SIZE(xxxx) - 3)
506
507#endif // MSF_COMPONENT_ID / HCF_EXT_MB
508
509
510/************************************************************************************************************
511************************** T O P   L E V E L   H C F   R O U T I N E S **************************************
512************************************************************************************************************/
513
514#if HCF_DL_ONLY == 0
515/************************************************************************************************************
516*
517*.MODULE		int hcf_action( IFBP ifbp, hcf_16 action )
518*.PURPOSE		Changes the run-time Card behavior.
519*				Performs Miscellanuous actions.
520*
521*.ARGUMENTS
522*	ifbp					address of the Interface Block
523*	action					number identifying the type of change
524*	 - HCF_ACT_CCX_OFF		disable CKIP
525*	 - HCF_ACT_CCX_ON		enable CKIP
526*	 - HCF_ACT_INT_FORCE_ON	enable interrupt generation by WaveLAN NIC
527*	 - HCF_ACT_INT_OFF		disable interrupt generation by WaveLAN NIC
528*	 - HCF_ACT_INT_ON		compensate 1 HCF_ACT_INT_OFF, enable interrupt generation if balance reached
529*	 - HCF_ACT_PRS_SCAN		Hermes Probe Respons Scan (F102) command
530*	 - HCF_ACT_RX_ACK		acknowledge non-DMA receiver to Hermes
531*	 - HCF_ACT_SCAN			Hermes Inquire Scan (F101) command (non-WARP only)
532*	 - HCF_ACT_SLEEP		DDS Sleep request
533*	 - HCF_ACT_TALLIES		Hermes Inquire Tallies (F100) command
534*
535*.RETURNS
536*	HCF_SUCCESS				all (including invalid)
537*	HCF_INT_PENDING			HCF_ACT_INT_OFF, interrupt pending
538*	HCF_ERR_NO_NIC			HCF_ACT_INT_OFF, NIC presence check fails
539*
540*.CONDITIONS
541* Except for hcf_action with HCF_ACT_INT_FORCE_ON or HCF_ACT_INT_OFF as parameter or hcf_connect with an I/O
542* address (i.e. not HCF_DISCONNECT), all hcf-function calls MUST be preceeded by a call of hcf_action with
543* HCF_ACT_INT_OFF as parameter.
544* Note that hcf_connect defaults to NIC interrupt disabled mode, i.e. as if hcf_action( HCF_ACT_INT_OFF )
545* was called.
546*
547*.DESCRIPTION
548* hcf_action supports the following mode changing action-code pairs that are antonyms
549*	 - HCF_ACT_CCX_OFF / HCF_ACT_CCX_ON
550*	 - HCF_ACT_INT_[FORCE_]ON / HCF_ACT_INT_OFF
551*
552* Additionally hcf_action can start the following actions in the NIC:
553*	 - HCF_ACT_PRS_SCAN
554*	 - HCF_ACT_RX_ACK
555*	 - HCF_ACT_SCAN
556*	 - HCF_ACT_SLEEP
557*	 - HCF_ACT_TALLIES
558*
559* o HCF_ACT_INT_OFF: Sets NIC Interrupts mode Disabled.
560* This command, and the associated [Force] Enable NIC interrupts command, are only available if the HCF_INT_ON
561* compile time option is not set at 0x0000.
562*
563* o HCF_ACT_INT_ON: Sets NIC Interrupts mode Enabled.
564* Enable NIC Interrupts, depending on the number of preceding Disable NIC Interrupt calls.
565*
566* o HCF_ACT_INT_FORCE_ON: Force NIC Interrupts mode Enabled.
567* Sets NIC Interrupts mode Enabled, regardless off the number of preceding Disable NIC Interrupt calls.
568*
569* The disabling and enabling of interrupts are antonyms.
570* These actions must be balanced.
571* For each "disable interrupts" there must be a matching "enable interrupts".
572* The disable interrupts may be executed multiple times in a row without intervening enable interrupts, in
573* other words, the disable interrupts may be nested.
574* The interrupt generation mechanism is disabled at the first call with HCF_ACT_INT_OFF.
575* The interrupt generation mechanism is re-enabled when the number of calls with HCF_ACT_INT_ON matches the
576* number of calls with INT_OFF.
577*
578* It is not allowed to have more Enable NIC Interrupts calls than Disable NIC Interrupts calls.
579* The interrupt generation mechanism is initially (i.e. after hcf_connect) disabled.
580* An MSF based on a interrupt strategy must call hcf_action with INT_ON in its initialization logic.
581*
582*!	The INT_OFF/INT_ON housekeeping is initialized at 0x0000 by hcf_connect, causing the interrupt generation
583*	mechanism to be disabled at first. This suits MSF implementation based on a polling strategy.
584*
585* o HCF_ACT_CCX_OFF / HCF_ACT_CCX_ON
586*!! This can use some more explanation;?
587* Disables and Enables support in the HCF runtime code for the CCX feature. Each time one of these action
588* codes is used, the effects of the preceding use cease.
589*
590* o HCF_ACT_SLEEP: Initiates the Disconnected DeepSleep process
591* This command is only available if the HCF_DDS compile time option is set. It triggers the F/W to start the
592* sleep handshaking. Regardless whether the Host initiates a Disconnected DeepSleep (DDS) or the F/W initiates
593* a Connected DeepSleep (CDS), the Host-F/W sleep handshaking is completed when the NIC Interrupts mode is
594* enabled (by means of the balancing HCF_ACT_INT_ON), i.e. at that moment the F/W really goes into sleep mode.
595* The F/W is wokenup by the HCF when the NIC Interrupts mode are disabled, i.e. at the first HCF_ACT_INT_OFF
596* after going into sleep.
597*
598* The following Miscellanuous actions are defined:
599*
600* o HCF_ACT_RX_ACK: Receiver Acknowledgement (non-DMA, non-USB mode only)
601* Acking the receiver, frees the NIC memory used to hold the Rx frame and allows the F/W to
602* report the existence of the next Rx frame.
603* If the MSF does not need access (any longer) to the current frame, e.g. because it is rejected based on the
604* look ahead or copied to another buffer, the receiver may be acked. Acking earlier is assumed to have the
605* potential of improving the performance.
606* If the MSF does not explitly ack te receiver, the acking is done implicitly if:
607* - the received frame fits in the look ahead buffer, by the hcf_service_nic call that reported the Rx frame
608* - if not in the above step, by hcf_rcv_msg (assuming hcf_rcv_msg is called)
609* - if neither of the above implicit acks nor an explicit ack by the MSF, by the first hcf_service_nic after
610*	the hcf_service_nic that reported the Rx frame.
611* Note: If an Rx frame is already acked, an explicit ACK by the MSF acts as a NoOperation.
612*
613* o HCF_ACT_TALLIES: Inquire Tallies command
614* This command is only operational if the F/W is enabled.
615* The Inquire Tallies command requests the F/W to provide its current set of tallies.
616* See also hcf_get_info with CFG_TALLIES as parameter.
617*
618* o HCF_ACT_PRS_SCAN: Inquire Probe Respons Scan command
619* This command is only operational if the F/W is enabled.
620* The Probe Respons Scan command starts a scan sequence.
621* The HCF puts the result of this action in an MSF defined buffer (see CFG_RID_LOG_STRCT).
622*
623* o HCF_ACT_SCAN: Inquire Scan command
624* This command is only supported for HII F/W (i.e. pre-WARP) and it is operational if the F/W is enabled.
625* The Inquire Scan command starts a scan sequence.
626* The HCF puts the result of this action in an MSF defined buffer (see CFG_RID_LOG_STRCT).
627*
628* Assert fails if
629* - ifbp has a recognizable out-of-range value.
630* - NIC interrupts are not disabled while required by parameter action.
631* - an invalid code is specified in parameter action.
632* - HCF_ACT_INT_ON commands outnumber the HCF_ACT_INT_OFF commands.
633* - reentrancy, may be  caused by calling hcf_functions without adequate protection against NIC interrupts or
634*	multi-threading
635*
636* - Since the HCF does not maintain status information relative to the F/W enabled state, it is not asserted
637*	whether HCF_ACT_SCAN, HCF_ACT_PRS_SCAN or HCF_ACT_TALLIES are only used while F/W is enabled.
638*
639*.DIAGRAM
640* 0: The assert embedded in HCFLOGENTRY checks against re-entrancy. Re-entrancy could be caused by a MSF logic
641*	at task-level calling hcf_functions without shielding with HCF_ACT_ON/_OFF. However the HCF_ACT_INT_OFF
642*	action itself can per definition not be protected this way. Based on code inspection, it can be concluded,
643*	that there is no re-entrancy PROBLEM in this particular flow. It does not seem worth the trouble to
644*	explicitly check for this condition (although there was a report of an MSF which ran into this assert.
645* 2:IFB_IntOffCnt is used to balance the INT_OFF and INT_ON calls.  Disabling of the interrupts is achieved by
646*	writing a zero to the Hermes IntEn register.  In a shared interrupt environment (e.g. the mini-PCI NDIS
647*	driver) it is considered more correct to return the status HCF_INT_PENDING if and only if, the current
648*	invocation of hcf_service_nic is (apparently) called in the ISR when the ISR was activated as result of a
649*	change in HREG_EV_STAT matching a bit in HREG_INT_EN, i.e. not if invoked as result of another device
650*	generating an interrupt on the shared interrupt line.
651*	Note 1: it has been observed that under certain adverse conditions on certain platforms the writing of
652*	HREG_INT_EN can apparently fail, therefor it is paramount that HREG_INT_EN is written again with 0 for
653*	each and every call to HCF_ACT_INT_OFF.
654*	Note 2: it has been observed that under certain H/W & S/W architectures this logic is called when there is
655*	no NIC at all. To cater for this, the value of HREG_INT_EN is validated. If the unused bit 0x0100 is set,
656*	it is assumed there is no NIC.
657*	Note 3: During the download process, some versions of the F/W reset HREG_SW_0, hence checking this
658*	register for HCF_MAGIC (the classical NIC presence test) when HCF_ACT_INT_OFF is called due to another
659*	card interrupting via a shared IRQ during a download, fails.
660*4:	The construction "if ( ifbp->IFB_IntOffCnt-- == 0 )" is optimal (in the sense of shortest/quickest
661*	path in error free flows) but NOT fail safe in case of too many INT_ON invocations compared to INT_OFF).
662*	Enabling of the interrupts is achieved by writing the Hermes IntEn register.
663*	 - If the HCF is in Defunct mode, the interrupts stay disabled.
664*	 - Under "normal" conditions, the HCF is only interested in Info Events, Rx Events and Notify Events.
665*	 - When the HCF is out of Tx/Notify resources, the HCF is also interested in Alloc Events.
666*	 - via HCF_EXT, the MSF programmer can also request HREG_EV_TICK and/or HREG_EV_TX_EXC interrupts.
667*	For DMA operation, the DMA hardware handles the alloc events. The DMA engine will generate a 'TxDmaDone'
668*	event as soon as it has pumped a frame from host ram into NIC-RAM (note that the frame does not have to be
669*	transmitted then), and a 'RxDmaDone' event as soon as a received frame has been pumped from NIC-RAM into
670*	host ram.  Note that the 'alloc' event has been removed from the event-mask, because the DMA engine will
671*	react to and acknowledge this event.
672*6:	ack the "old" Rx-event. See "Rx Buffer free strategy" in hcf_service_nic above for more explanation.
673*	IFB_RxFID and IFB_RxLen must be cleared to bring both the internal HCF house keeping and the information
674*	supplied to the MSF in the state "no frame received".
675*8:	The HCF_ACT_SCAN, HCF_ACT_PRS_SCAN and HCF_ACT_TALLIES activity are merged by "clever" algebraic
676*	manipulations of the RID-values and action codes, so foregoing robustness against migration problems for
677*	ease of implementation. The assumptions about numerical relationships between CFG_TALLIES etc and
678*	HCF_ACT_TALLIES etc are checked by the "#if" statements just prior to the body of this routine, resulting
679*	in: err "maintenance" during compilation if the assumptions are no longer met. The writing of HREG_PARAM_1
680*	with 0x3FFF in case of an PRS scan, is a kludge to get around lack of specification, hence different
681*	implementation in F/W and Host.
682*	When there is no NIC RAM available, some versions of the Hermes F/W do report 0x7F00 as error in the
683*	Result field of the Status register and some F/W versions don't. To mask this difference to the MSF all
684*	return codes of the Hermes are ignored ("best" and "most simple" solution to these types of analomies with
685*	an acceptable loss due to ignoring all error situations as well).
686*	The "No inquire space" is reported via the Hermes tallies.
687*30: do not HCFASSERT( rc, rc ) since rc == HCF_INT_PENDING is no error
688*
689*.ENDDOC				END DOCUMENTATION
690*
691************************************************************************************************************/
692#if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
693#if CFG_SCAN != CFG_TALLIES - HCF_ACT_TALLIES + HCF_ACT_SCAN
694err: "maintenance" apparently inviolated the underlying assumption about the numerical values of these macros
695#endif
696#endif // HCF_TYPE_HII5
697#if CFG_PRS_SCAN != CFG_TALLIES - HCF_ACT_TALLIES + HCF_ACT_PRS_SCAN
698err: "maintenance" apparently inviolated the underlying assumption about the numerical values of these macros
699#endif
700int
701hcf_action( IFBP ifbp, hcf_16 action )
702{
703int	rc = HCF_SUCCESS;
704
705	HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
706#if HCF_INT_ON
707	HCFLOGENTRY( action == HCF_ACT_INT_FORCE_ON ? HCF_TRACE_ACTION_KLUDGE : HCF_TRACE_ACTION, action )														/* 0 */
708#if HCF_SLEEP
709	HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE || action == HCF_ACT_INT_OFF,
710			   MERGE_2( action, ifbp->IFB_IntOffCnt ) )
711#else
712	HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE, action )
713#endif // HCF_SLEEP
714	HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFF ||
715			   action == HCF_ACT_INT_OFF || action == HCF_ACT_INT_FORCE_ON,  action )
716	HCFASSERT( ifbp->IFB_IntOffCnt <= 16 || ifbp->IFB_IntOffCnt >= 0xFFFE,
717			   MERGE_2( action, ifbp->IFB_IntOffCnt ) )	//nesting more than 16 deep seems unreasonable
718#endif // HCF_INT_ON
719
720	switch (action) {
721#if HCF_INT_ON
722hcf_16	i;
723	  case HCF_ACT_INT_OFF:						// Disable Interrupt generation
724#if HCF_SLEEP
725		if ( ifbp->IFB_IntOffCnt == 0xFFFE ) {	// WakeUp test	;?tie this to the "new" super-LinkStat
726			ifbp->IFB_IntOffCnt++;						// restore conventional I/F
727			OPW(HREG_IO, HREG_IO_WAKEUP_ASYNC );		// set wakeup bit
728			OPW(HREG_IO, HREG_IO_WAKEUP_ASYNC );		// set wakeup bit to counteract the clearing by F/W
729			// 800 us latency before FW switches to high power
730			MSF_WAIT(800);								// MSF-defined function to wait n microseconds.
731//OOR		if ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_DS_OOR ) { // OutOfRange
732//				printk( "<5>ACT_INT_OFF: Deepsleep phase terminated, enable and go to AwaitConnection\n" );		//;?remove me 1 day
733//				hcf_cntl( ifbp, HCF_CNTL_ENABLE );
734//			}
735//			ifbp->IFB_DSLinkStat &= ~( CFG_LINK_STAT_DS_IR | CFG_LINK_STAT_DS_OOR);	//clear IR/OOR state
736		}
737#endif // HCF_SLEEP
738/*2*/	ifbp->IFB_IntOffCnt++;
739//!     rc = 0;
740		i = IPW( HREG_INT_EN );
741		OPW( HREG_INT_EN, 0 );
742		if ( i & 0x1000 ) {
743			rc = HCF_ERR_NO_NIC;
744		} else {
745			if ( i & IPW( HREG_EV_STAT ) ) {
746				rc = HCF_INT_PENDING;
747			}
748		}
749		break;
750
751	  case HCF_ACT_INT_FORCE_ON:				// Enforce Enable Interrupt generation
752		ifbp->IFB_IntOffCnt = 0;
753		//Fall through in HCF_ACT_INT_ON
754
755	  case HCF_ACT_INT_ON:						// Enable Interrupt generation
756/*4*/	if ( ifbp->IFB_IntOffCnt-- == 0 && ifbp->IFB_CardStat == 0 ) {
757												//determine Interrupt Event mask
758#if HCF_DMA
759			if ( ifbp->IFB_CntlOpt & USE_DMA ) {
760				i = HREG_EV_INFO | HREG_EV_RDMAD | HREG_EV_TDMAD | HREG_EV_TX_EXT;	//mask when DMA active
761			} else
762#endif // HCF_DMA
763			{
764				i = HREG_EV_INFO | HREG_EV_RX | HREG_EV_TX_EXT;						//mask when DMA not active
765				if ( ifbp->IFB_RscInd == 0 ) {
766					i |= HREG_EV_ALLOC;												//mask when no TxFID available
767				}
768			}
769#if HCF_SLEEP
770			if ( ( IPW(HREG_EV_STAT) & ( i | HREG_EV_SLEEP_REQ ) ) == HREG_EV_SLEEP_REQ ) {
771				// firmware indicates it would like to go into sleep modus
772				// only acknowledge this request if no other events that can cause an interrupt are pending
773				ifbp->IFB_IntOffCnt--;			//becomes 0xFFFE
774            	OPW( HREG_INT_EN, i | HREG_EV_TICK );
775				OPW( HREG_EV_ACK, HREG_EV_SLEEP_REQ | HREG_EV_TICK | HREG_EV_ACK_REG_READY );
776			} else
777#endif // HCF_SLEEP
778			{
779            	OPW( HREG_INT_EN, i | HREG_EV_SLEEP_REQ );
780			}
781		}
782		break;
783#endif // HCF_INT_ON
784
785#if (HCF_SLEEP) & HCF_DDS
786	  case HCF_ACT_SLEEP:						// DDS Sleep request
787		hcf_cntl( ifbp, HCF_CNTL_DISABLE );
788		cmd_exe( ifbp, HCMD_SLEEP, 0 );
789		break;
790// 	  case HCF_ACT_WAKEUP:						// DDS Wakeup request
791// 		HCFASSERT( ifbp->IFB_IntOffCnt == 0xFFFE, ifbp->IFB_IntOffCnt )
792// 		ifbp->IFB_IntOffCnt++;					// restore conventional I/F
793// 		OPW( HREG_IO, HREG_IO_WAKEUP_ASYNC );
794// 		MSF_WAIT(800);							// MSF-defined function to wait n microseconds.
795// 		rc = hcf_action( ifbp, HCF_ACT_INT_OFF );	/*bogus, IFB_IntOffCnt == 0xFFFF, so if you carefully look
796// 													 *at the #if HCF_DDS statements, HCF_ACT_INT_OFF is empty
797// 													 *for DDS. "Much" better would be to merge the flows for
798// 													 *DDS and DEEP_SLEEP
799// 													 */
800// 		break;
801#endif // HCF_DDS
802
803#if (HCF_TYPE) & HCF_TYPE_CCX
804	  case HCF_ACT_CCX_ON:						// enable CKIP
805	  case HCF_ACT_CCX_OFF:						// disable CKIP
806		ifbp->IFB_CKIPStat = action;
807		break;
808#endif // HCF_TYPE_CCX
809
810	  case HCF_ACT_RX_ACK:						//Receiver ACK
811/*6*/	if ( ifbp->IFB_RxFID ) {
812			DAWA_ACK( HREG_EV_RX );
813		}
814		ifbp->IFB_RxFID = ifbp->IFB_RxLen = 0;
815		break;
816
817/*8*/ case	HCF_ACT_PRS_SCAN:					// Hermes PRS Scan (F102)
818		OPW( HREG_PARAM_1, 0x3FFF );
819			//Fall through in HCF_ACT_TALLIES
820	  case HCF_ACT_TALLIES:						// Hermes Inquire Tallies (F100)
821#if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
822	  case HCF_ACT_SCAN:						// Hermes Inquire Scan (F101)
823#endif // HCF_TYPE_HII5
824		/*!! the assumptions about numerical relationships between CFG_TALLIES etc and HCF_ACT_TALLIES etc
825		 *   are checked by #if statements just prior to this routine resulting in: err "maintenance"	*/
826		cmd_exe( ifbp, HCMD_INQUIRE, action - HCF_ACT_TALLIES + CFG_TALLIES );
827		break;
828
829	  default:
830		HCFASSERT( DO_ASSERT, action )
831		break;
832	}
833	//! do not HCFASSERT( rc == HCF_SUCCESS, rc )														/* 30*/
834	HCFLOGEXIT( HCF_TRACE_ACTION )
835	return rc;
836} // hcf_action
837#endif // HCF_DL_ONLY
838
839
840/************************************************************************************************************
841*
842*.MODULE		int hcf_cntl( IFBP ifbp, hcf_16 cmd )
843*.PURPOSE		Connect or disconnect a specific port to a specific network.
844*!!  ;???????????????? continue needs more explanation
845*				recovers by means of "continue" when the connect proces in CCX mode fails
846*				Enables or disables data transmission and reception for the NIC.
847*				Activates static NIC configuration for a specific port at connect.
848*				Activates static configuration for all ports at enable.
849*
850*.ARGUMENTS
851*	ifbp		address of the Interface Block
852*	cmd			0x001F:	Hermes command (disable, enable, connect, disconnect, continue)
853*					HCF_CNTL_ENABLE		Enable
854*					HCF_CNTL_DISABLE    Disable
855*					HCF_CNTL_CONTINUE	Continue
856*					HCF_CNTL_CONNECT    Connect
857*					HCF_CNTL_DISCONNECT Disconnect
858*				0x0100: command qualifier (continue)
859*					HCMD_RETRY			retry flag
860*				0x0700:  port number (connect/disconnect)
861*					HCF_PORT_0          MAC Port 0
862*					HCF_PORT_1          MAC Port 1
863*					HCF_PORT_2          MAC Port 2
864*					HCF_PORT_3          MAC Port 3
865*					HCF_PORT_4          MAC Port 4
866*					HCF_PORT_5          MAC Port 5
867*					HCF_PORT_6          MAC Port 6
868*
869*.RETURNS
870*	HCF_SUCCESS
871*!!	via cmd_exe
872*	HCF_ERR_NO_NIC
873*	HCF_ERR_DEFUNCT_...
874*	HCF_ERR_TIME_OUT
875*
876*.DESCRIPTION
877* The parameter cmd contains a number of subfields.
878* The actual value for cmd is created by logical or-ing the appropriate mnemonics for the subfields.
879* The field 0x001F contains the command code
880*  - HCF_CNTL_ENABLE
881*  - HCF_CNTL_DISABLE
882*  - HCF_CNTL_CONNECT
883*  - HCF_CNTL_DISCONNECT
884*  - HCF_CNTL_CONTINUE
885*
886* For HCF_CNTL_CONTINUE, the field 0x0100 contains the retry flag HCMD_RETRY.
887* For HCF_CNTL_CONNECT and HCF_CNTL_DISCONNECT, the field 0x0700 contains the port number as HCF_PORT_#.
888* For Station as well as AccessPoint F/W, MAC Port 0 is the "normal" communication channel.
889* For AccessPoint F/W, MAC Port 1 through 6 control the WDS links.
890*
891* Note that despite the names HCF_CNTL_DISABLE and HCF_CNTL_ENABLE, hcf_cntl does not influence the NIC
892* Interrupts mode.
893*
894* The Connect is used by the MSF to bring a particular port in an inactive state as far as data transmission
895* and reception are concerned.
896* When a particular port is disconnected:
897* - the F/W disables the receiver for that port.
898* - the F/W ignores send commands for that port.
899* - all frames (Receive as well as pending Transmit) for that port on the NIC are discarded.
900*
901* When the NIC is disabled, above list applies to all ports, i.e. the result is like all ports are
902* disconnected.
903*
904* When a particular port is connected:
905* - the F/W effectuates the static configuration for that port.
906* - enables the receiver for that port.
907* - accepts send commands for that port.
908*
909* Enabling has the following effects:
910* - the F/W effectuates the static configuration for all ports.
911*	The F/W only updates its static configuration at a transition from disabled to enabled or from
912*	disconnected to connected.
913*	In order to enforce the static configuration, the MSF must assure that such a transition takes place.
914*	Due to such a disable/enable or disconnect/connect sequence, Rx/Tx frames may be lost, in other words,
915*	configuration may impact communication.
916* - The DMA Engine (if applicable) is enabled.
917* Note that the Enable Function by itself only enables data transmission and reception, it
918* does not enable the Interrupt Generation mechanism. This is done by hcf_action.
919*
920* Disabling has the following effects:
921*!!  ;?????is the following statement really true
922* - it acts as a disconnect on all ports.
923* - The DMA Engine (if applicable) is disabled.
924*
925* For impact of the disable command on the behavior of hcf_dma_tx/rx_get see the appropriate sections.
926*
927* Although the Enable/Disable and Connect/Disconnect are antonyms, there is no restriction on their sequencing,
928* in other words, they may be called multiple times in arbitrary sequence without being paired or balanced.
929* Each time one of these functions is called, the effects of the preceding calls cease.
930*
931* Assert fails if
932* - ifbp has a recognizable out-of-range value.
933* - NIC interrupts are not disabled.
934* - A command other than Continue, Enable, Disable, Connect or Disconnect is given.
935* - An invalid combination of the subfields is given or a bit outside the subfields is given.
936* - any return code besides HCF_SUCCESS.
937* - reentrancy, may be  caused by calling a hcf_function without adequate protection against NIC interrupts or
938*	multi-threading
939*
940*.DIAGRAM
941*	hcf_cntl takes successively the following actions:
942*2:	If the HCF is in Defunct mode or incompatible with the Primary or Station Supplier in the Hermes,
943*	hcf_cntl() returns immediately with HCF_ERR_NO_NIC;? as status.
944*8:	when the port is disabled, the DMA engine needs to be de-activated, so the host can safely reclaim tx
945*	packets from the tx descriptor chain.
946*
947*.ENDDOC				END DOCUMENTATION
948*
949************************************************************************************************************/
950int
951hcf_cntl( IFBP ifbp, hcf_16 cmd )
952{
953int	rc = HCF_ERR_INCOMP_FW;
954#if HCF_ASSERT
955{	int x = cmd & HCMD_CMD_CODE;
956	if ( x == HCF_CNTL_CONTINUE ) x &= ~HCMD_RETRY;
957	else if ( (x == HCMD_DISABLE || x == HCMD_ENABLE) && ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ) {
958		x &= ~HFS_TX_CNTL_PORT;
959	}
960	HCFASSERT( x==HCF_CNTL_ENABLE  || x==HCF_CNTL_DISABLE    || HCF_CNTL_CONTINUE ||
961			   x==HCF_CNTL_CONNECT || x==HCF_CNTL_DISCONNECT, cmd )
962}
963#endif // HCF_ASSERT
964// #if (HCF_SLEEP) & HCF_DDS
965// 	HCFASSERT( ifbp->IFB_IntOffCnt != 0xFFFE, cmd )
966// #endif // HCF_DDS
967	HCFLOGENTRY( HCF_TRACE_CNTL, cmd )
968	if ( ifbp->IFB_CardStat == 0 ) {																 /*2*/
969/*6*/	rc = cmd_exe( ifbp, cmd, 0 );
970#if (HCF_SLEEP) & HCF_DDS
971		ifbp->IFB_TickCnt = 0;				//start 2 second period (with 1 tick uncertanty)
972#endif // HCF_DDS
973	}
974#if HCF_DMA
975	//!rlav : note that this piece of code is always executed, regardless of the DEFUNCT bit in IFB_CardStat.
976	// The reason behind this is that the MSF should be able to get all its DMA resources back from the HCF,
977	// even if the hardware is disfunctional. Practical example under Windows : surprise removal.
978	if ( ifbp->IFB_CntlOpt & USE_DMA ) {
979		hcf_io io_port = ifbp->IFB_IOBase;
980		DESC_STRCT *p;
981		if ( cmd == HCF_CNTL_DISABLE || cmd == HCF_CNTL_ENABLE ) {
982			OUT_PORT_DWORD( (io_port + HREG_DMA_CTRL), DMA_CTRLSTAT_RESET);						/*8*/
983			ifbp->IFB_CntlOpt &= ~DMA_ENABLED;
984		}
985		if ( cmd == HCF_CNTL_ENABLE ) {
986			OUT_PORT_DWORD( (io_port + HREG_DMA_CTRL), DMA_CTRLSTAT_GO);
987			/* ;? by rewriting hcf_dma_rx_put you can probably just call hcf_dma_rx_put( ifbp->IFB_FirstDesc[DMA_RX] )
988			 * as additional beneficiary side effect, the SOP and EOP bits will also be cleared
989			 */
990			ifbp->IFB_CntlOpt |= DMA_ENABLED;
991			HCFASSERT( NT_ASSERT, NEVER_TESTED )
992			// make the entire rx descriptor chain DMA-owned, so the DMA engine can (re-)use it.
993			p = ifbp->IFB_FirstDesc[DMA_RX];
994			if (p != NULL) {   //;? Think this over again in the light of the new chaining strategy
995				if ( 1 ) 	{ //begin alternative
996					HCFASSERT( NT_ASSERT, NEVER_TESTED )
997					put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX], DMA_RX );
998					if ( ifbp->IFB_FirstDesc[DMA_RX] ) {
999						put_frame_lst( ifbp, ifbp->IFB_FirstDesc[DMA_RX]->next_desc_addr, DMA_RX );
1000					}
1001				} else {
1002					while ( p ) {
1003						//p->buf_cntl.cntl_stat |= DESC_DMA_OWNED;
1004						p->BUF_CNT |= DESC_DMA_OWNED;
1005						p = p->next_desc_addr;
1006					}
1007					// a rx chain is available so hand it over to the DMA engine
1008					p = ifbp->IFB_FirstDesc[DMA_RX];
1009					OUT_PORT_DWORD( (io_port + HREG_RXDMA_PTR32), p->desc_phys_addr);
1010				}  //end alternative
1011			}
1012		}
1013	}
1014#endif // HCF_DMA
1015	HCFASSERT( rc == HCF_SUCCESS, rc )
1016	HCFLOGEXIT( HCF_TRACE_CNTL )
1017	return rc;
1018} // hcf_cntl
1019
1020
1021/************************************************************************************************************
1022*
1023*.MODULE		int hcf_connect( IFBP ifbp, hcf_io io_base )
1024*.PURPOSE		Grants access right for the HCF to the IFB.
1025*				Initializes Card and HCF housekeeping.
1026*
1027*.ARGUMENTS
1028*	ifbp		(near) address of the Interface Block
1029*	io_base		non-USB: I/O Base address of the NIC (connect)
1030*				non-USB: HCF_DISCONNECT
1031*				USB:	 HCF_CONNECT, HCF_DISCONNECT
1032*
1033*.RETURNS
1034*	HCF_SUCCESS
1035*	HCF_ERR_INCOMP_PRI
1036*	HCF_ERR_INCOMP_FW
1037*	HCF_ERR_DEFUNCT_CMD_SEQ
1038*!!	HCF_ERR_NO_NIC really returned ;?
1039*	HCF_ERR_NO_NIC
1040*	HCF_ERR_TIME_OUT
1041*
1042*	MSF-accessible fields of Result Block:
1043*	IFB_IOBase				entry parameter io_base
1044*	IFB_IORange				HREG_IO_RANGE (0x40/0x80)
1045*	IFB_Version				version of the IFB layout
1046*	IFB_FWIdentity			CFG_FW_IDENTITY_STRCT, specifies the identity of the
1047*							"running" F/W, i.e. tertiary F/W under normal conditions
1048*	IFB_FWSup				CFG_SUP_RANGE_STRCT, specifies the supplier range of
1049*							the "running" F/W, i.e. tertiary F/W under normal conditions
1050*	IFB_HSISup				CFG_SUP_RANGE_STRCT, specifies the HW/SW I/F range of the NIC
1051*	IFB_PRIIdentity			CFG_PRI_IDENTITY_STRCT, specifies the Identity of the Primary F/W
1052*	IFB_PRISup				CFG_SUP_RANGE_STRCT, specifies the supplier range of the Primary F/W
1053*	all other				all MSF accessible fields, which are not specified above, are zero-filled
1054*
1055*.CONDITIONS
1056* It is the responsibility of the MSF to assure the correctness of the I/O Base address.
1057*
1058* Note: hcf_connect defaults to NIC interrupt disabled mode, i.e. as if hcf_action( HCF_ACT_INT_OFF )
1059* was called.
1060*
1061*.DESCRIPTION
1062* hcf_connect passes the MSF-defined location of the IFB to the HCF and grants or revokes access right for the
1063* HCF to the IFB. Revoking is done by specifying HCF_DISCONNECT rather than an I/O address for the parameter
1064* io_base.  Every call of hcf_connect in "connect" mode, must eventually be followed by a call of hcf_connect
1065* in "disconnect" mode. Clalling hcf_connect in "connect"/"disconnect" mode can not be nested.
1066* The IFB address must be used as a handle with all subsequent HCF-function calls and the HCF uses the IFB
1067* address as a handle when it performs a call(back) of an MSF-function (i.e. msf_assert).
1068*
1069* Note that not only the MSF accessible fields are cleared, but also all internal housekeeping
1070* information is re-initialized.
1071* This implies that all settings which are done via hcf_action and hcf_put_info (e.g. CFG_MB_ASSERT, CFG_REG_MB,
1072* CFG_REG_INFO_LOG) must be done again. The only field which is not cleared, is IFB_MSFSup.
1073*
1074* If HCF_INT_ON is selected as compile option, NIC interrupts are disabled.
1075*
1076* Assert fails if
1077* - ifbp is not properly aligned ( ref chapter HCF_ALIGN in 4.1.1)
1078* - I/O Base Address is not a multiple of 0x40 (note: 0x0000 is explicitly allowed).
1079*
1080*.DIAGRAM
1081*
1082*0:	Throughout hcf_connect you need to distinguish the connect from the disconnect case, which requires
1083*	some attention about what to use as "I/O" address when for which purpose.
1084*2:
1085*2a: Reset H-II by toggling reset bit in IO-register on and off.
1086*	The HCF_TYPE_PRELOADED caters for the DOS environment where H-II is loaded by a separate program to
1087*	overcome the 64k size limit posed on DOS drivers.
1088*	The macro OPW is not yet useable because the IFB_IOBase field is not set.
1089*	Note 1: hopefully the clearing and initializing of the IFB (see below) acts as a delay which meets the
1090*	specification for S/W reset
1091*	Note 2: it turns out that on some H/W constellations, the clock to access the EEProm is not lowered
1092*	to an appropriate frequency by HREG_IO_SRESET. By giving an HCMD_INI first, this problem is worked around.
1093*2b: Experimentally it is determined over a wide range of F/W versions that waiting for the for Cmd bit in
1094*	Ev register gives a workable strategy. The available documentation does not give much clues.
1095*4:	clear and initialize the IFB
1096*	The HCF house keeping info is designed such that zero is the appropriate initial value for as much as
1097*	feasible IFB-items.
1098*	The readable fields mentioned in the description section and some HCF specific fields are given their
1099*	actual value.
1100*	IFB_TickIni is initialized at best guess before calibration
1101*	Hcf_connect defaults to "no interrupt generation" (implicitly achieved by the zero-filling).
1102*6:	Register compile-time linked MSF Routine and set default filter level
1103*	cast needed to get around the "near" problem in DOS COM model
1104*	er C2446: no conversion from void (__near __cdecl *)(unsigned char __far *,unsigned int,unsigned short,int)
1105*							to   void (__far  __cdecl *)(unsigned char __far *,unsigned int,unsigned short,int)
1106*8:	If a command is apparently still active (as indicated by the Busy bit in Cmd register) this may indicate a
1107*	blocked cmd pipe line.  To unblock the following actions are done:
1108*	 - Ack everything
1109*	 - Wait for Busy bit drop  in Cmd register
1110*	 - Wait for Cmd  bit raise in Ev  register
1111*	The two waits are combined in a single HCF_WAIT_WHILE to optimize memory size. If either of these waits
1112*	fail (prot_cnt becomes 0), then something is serious wrong. Rather than PANICK, the assumption is that the
1113*	next cmd_exe will fail, causing the HCF to go into DEFUNCT mode
1114*10:	Ack everything to unblock a (possibly blocked) cmd pipe line
1115*	Note 1: it is very likely that an Alloc event is pending and very well possible that a (Send) Cmd event is
1116*	pending on non-initial calls
1117*	Note 2: it is assumed that this strategy takes away the need to ack every conceivable event after an
1118*	Hermes Initialize
1119*12:	Only H-II NEEDS the Hermes Initialize command. Due to the different semantics for H-I and H-II
1120*	Initialize command, init() does not (and can not, since it is called e.g. after a download) execute the
1121*	Hermes Initialize command. Executing the Hermes Initialize command for H-I would not harm but not do
1122*	anything useful either, so it is skipped.
1123*	The return status of cmd_exe is ignored. It is assumed that if cmd_exe fails, init fails too
1124*14:	use io_base as a flag to merge hcf_connect and hcf_disconnect into 1 routine
1125*	the call to init and its subsequent call of cmd_exe will return HCF_ERR_NO_NIC if appropriate. This status
1126*	is (badly) needed by some legacy combination of NT4 and card services which do not yield an I/O address in
1127*	time.
1128*
1129*.NOTICE
1130*	On platforms where the NULL-pointer is not a bit-pattern of all zeros, the zero-filling of the IFB results
1131*	in an incorrect initialization of pointers.
1132*	The implementation of the MailBox manipulation in put_mb_info protects against the absence of a MailBox
1133*	based on IFB_MBSize, IFB_MBWp and ifbp->IFB_MBRp. This has ramifications on the initialization of the
1134*	MailBox via hcf_put_info with the CFG_REG_MB type, but it prevents dependency on the "NULL-"ness of
1135*	IFB_MBp.
1136*
1137*.NOTICE
1138*	There are a number of problems when asserting and logging hcf_connect, e.g.
1139*	 - Asserting on re-entrancy of hcf_connect by means of
1140*	 "HCFASSERT( (ifbp->IFB_AssertTrace & HCF_ASSERT_CONNECT) == 0, 0 )" is not useful because IFB contents
1141*	 are undefined
1142*	 - Asserting before the IFB is cleared will cause mdd_assert() to interpret the garbage in IFB_AssertRtn
1143*	 as a routine address
1144*	Therefore HCFTRACE nor HCFLOGENTRY is called by hcf_connect.
1145*.ENDDOC				END DOCUMENTATION
1146*
1147************************************************************************************************************/
1148int
1149hcf_connect( IFBP ifbp, hcf_io io_base )
1150{
1151int			rc = HCF_SUCCESS;
1152hcf_io		io_addr;
1153hcf_32		prot_cnt;
1154hcf_8		*q;
1155LTV_STRCT	x;
1156#if HCF_ASSERT
1157	hcf_16 xa = ifbp->IFB_FWIdentity.typ;
1158	/* is assumed to cause an assert later on if hcf_connect is called without intervening hcf_disconnect.
1159	 * xa == CFG_FW_IDENTITY in subsequent calls without preceding hcf_disconnect,
1160	 * xa == 0 in subsequent calls with preceding hcf_disconnect,
1161	 * xa == "garbage" (any value except CFG_FW_IDENTITY is acceptable) in the initial call
1162	 */
1163#endif // HCF_ASSERT
1164
1165	if ( io_base == HCF_DISCONNECT ) {					//disconnect
1166		io_addr = ifbp->IFB_IOBase;
1167		OPW( HREG_INT_EN, 0 );
1168	} else {											//connect								/* 0 */
1169		io_addr = io_base;
1170	}
1171
1172
1173#if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0	//switch clock back for SEEPROM access  !!!
1174	OUT_PORT_WORD( io_addr + HREG_CMD, HCMD_INI );  	    //OPW not yet useable
1175	prot_cnt = INI_TICK_INI;
1176	HCF_WAIT_WHILE( (IN_PORT_WORD( io_addr +  HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1177	OUT_PORT_WORD( (io_addr + HREG_IO), HREG_IO_SRESET );	//OPW not yet useable					/* 2a*/
1178#endif // HCF_TYPE_PRELOADED
1179	for ( q = (hcf_8*)(&ifbp->IFB_Magic); q > (hcf_8*)ifbp; *--q = 0 ) /*NOP*/;						/* 4 */
1180	ifbp->IFB_Magic		= HCF_MAGIC;
1181	ifbp->IFB_Version	= IFB_VERSION;
1182#if defined MSF_COMPONENT_ID //a new IFB demonstrates how dirty the solution is
1183	xxxx[xxxx_PRI_IDENTITY_OFFSET] = NULL;		//IFB_PRIIdentity placeholder	0xFD02
1184	xxxx[xxxx_PRI_IDENTITY_OFFSET+1] = NULL;	//IFB_PRISup placeholder		0xFD03
1185#endif // MSF_COMPONENT_ID
1186#if (HCF_TALLIES) & ( HCF_TALLIES_NIC | HCF_TALLIES_HCF )
1187	ifbp->IFB_TallyLen = 1 + 2 * (HCF_NIC_TAL_CNT + HCF_HCF_TAL_CNT);	//convert # of Tallies to L value for LTV
1188	ifbp->IFB_TallyTyp = CFG_TALLIES;			//IFB_TallyTyp: set T value
1189#endif // HCF_TALLIES_NIC / HCF_TALLIES_HCF
1190	ifbp->IFB_IOBase	= io_addr;				//set IO_Base asap, so asserts via HREG_SW_2 don't harm
1191	ifbp->IFB_IORange	= HREG_IO_RANGE;
1192	ifbp->IFB_CntlOpt	= USE_16BIT;
1193#if HCF_ASSERT
1194	assert_ifbp = ifbp;
1195	ifbp->IFB_AssertLvl = 1;
1196#if (HCF_ASSERT) & HCF_ASSERT_LNK_MSF_RTN
1197	if ( io_base != HCF_DISCONNECT ) {
1198		ifbp->IFB_AssertRtn = (MSF_ASSERT_RTNP)msf_assert;											/* 6 */
1199	}
1200#endif // HCF_ASSERT_LNK_MSF_RTN
1201#if (HCF_ASSERT) & HCF_ASSERT_MB				//build the structure to pass the assert info to hcf_put_info
1202	ifbp->IFB_AssertStrct.len = sizeof(ifbp->IFB_AssertStrct)/sizeof(hcf_16) - 1;
1203	ifbp->IFB_AssertStrct.typ = CFG_MB_INFO;
1204	ifbp->IFB_AssertStrct.base_typ = CFG_MB_ASSERT;
1205	ifbp->IFB_AssertStrct.frag_cnt = 1;
1206	ifbp->IFB_AssertStrct.frag_buf[0].frag_len =
1207		( offsetof(IFB_STRCT, IFB_AssertLvl) - offsetof(IFB_STRCT, IFB_AssertLine) ) / sizeof(hcf_16);
1208	ifbp->IFB_AssertStrct.frag_buf[0].frag_addr = &ifbp->IFB_AssertLine;
1209#endif // HCF_ASSERT_MB
1210#endif // HCF_ASSERT
1211	IF_PROT_TIME( prot_cnt = ifbp->IFB_TickIni = INI_TICK_INI; )
1212#if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0
1213	//!! No asserts before Reset-bit in HREG_IO is cleared
1214	OPW( HREG_IO, 0x0000 );						//OPW useable										/* 2b*/
1215	HCF_WAIT_WHILE( (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1216	IF_PROT_TIME( HCFASSERT( prot_cnt, IPW( HREG_EV_STAT) ) )
1217	IF_PROT_TIME( if ( prot_cnt ) prot_cnt = ifbp->IFB_TickIni; )
1218#endif // HCF_TYPE_PRELOADED
1219	//!! No asserts before Reset-bit in HREG_IO is cleared
1220	HCFASSERT( DO_ASSERT, MERGE_2( HCF_ASSERT, 0xCAF0 )	) //just to proof that the complete assert machinery is working
1221	HCFASSERT( xa != CFG_FW_IDENTITY, 0 )		// assert if hcf_connect is called without intervening hcf_disconnect.
1222	HCFASSERT( ((hcf_32)(void*)ifbp & (HCF_ALIGN-1) ) == 0, (hcf_32)(void*)ifbp )
1223	HCFASSERT( (io_addr & 0x003F) == 0, io_addr )
1224												//if Busy bit in Cmd register
1225	if (IPW( HREG_CMD ) & HCMD_BUSY ) {																/* 8 */
1226												//.  Ack all to unblock a (possibly) blocked cmd pipe line
1227		OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
1228												//.  Wait for Busy bit drop  in Cmd register
1229												//.  Wait for Cmd  bit raise in Ev  register
1230		HCF_WAIT_WHILE( ( IPW( HREG_CMD ) & HCMD_BUSY ) && (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 );
1231		IF_PROT_TIME( HCFASSERT( prot_cnt, IPW( HREG_EV_STAT) ) ) /* if prot_cnt == 0, cmd_exe will fail, causing DEFUNCT */
1232	}
1233	OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
1234#if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0														/*12*/
1235	(void)cmd_exe( ifbp, HCMD_INI, 0 );
1236#endif // HCF_TYPE_PRELOADED
1237if ( io_base != HCF_DISCONNECT ) {
1238		rc = init( ifbp );																			/*14*/
1239		if ( rc == HCF_SUCCESS ) {
1240			x.len = 2;
1241			x.typ = CFG_NIC_BUS_TYPE;
1242			(void)hcf_get_info( ifbp, &x );
1243			ifbp->IFB_BusType = x.val[0];
1244			//CFG_NIC_BUS_TYPE not supported -> default 32 bits/DMA, MSF has to overrule via CFG_CNTL_OPT
1245			if ( x.len == 0 || x.val[0] == 0x0002 || x.val[0] == 0x0003 ) {
1246#if (HCF_IO) & HCF_IO_32BITS
1247				ifbp->IFB_CntlOpt &= ~USE_16BIT;			//reset USE_16BIT
1248#endif // HCF_IO_32BITS
1249#if HCF_DMA
1250				ifbp->IFB_CntlOpt |= USE_DMA;				//SET DMA
1251#else
1252				ifbp->IFB_IORange = 0x40 /*i.s.o. HREG_IO_RANGE*/;
1253#endif // HCF_DMA
1254			}
1255		}
1256	} else HCFASSERT(  ( ifbp->IFB_Magic ^= HCF_MAGIC ) == 0, ifbp->IFB_Magic ) /*NOP*/;
1257	/* of above HCFASSERT only the side effect is needed, NOP in case HCFASSERT is dummy */
1258	ifbp->IFB_IOBase = io_base;																		/* 0*/
1259	return rc;
1260} // hcf_connect
1261
1262#if HCF_DMA
1263/************************************************************************************************************
1264* Function get_frame_lst
1265*  - resolve the "last host-owned descriptor" problems when a descriptor list is reclaimed by the MSF.
1266*
1267* The FrameList to be reclaimed as well as the DescriptorList always start in IFB_FirstDesc[tx_rx_flag]
1268* and this is always the "current" DELWA Descriptor.
1269*
1270* If a FrameList is available, the last descriptor of the FrameList to turned into a new DELWA Descriptor:
1271*  - a copy is made from the information in the last descriptor of the FrameList into the current
1272*	 DELWA Descriptor
1273*  - the remainder of the DescriptorList is detached from the copy by setting the next_desc_addr at NULL
1274*  - the DMA control bits of the copy are cleared to do not confuse the MSF
1275*  - the copy of the last descriptor (i.e. the "old" DELWA Descriptor) is chained to the prev Descriptor
1276*	 of the FrameList, thus replacing the original last Descriptor of the FrameList.
1277*  - IFB_FirstDesc is changed to the address of that replaced (original) last descriptor of the FrameList,
1278*	 i.e. the "new" DELWA Descriptor.
1279*
1280* This function makes a copy of that last host-owned descriptor, so the MSF will get a copy of the descriptor.
1281* On top of that, it adjusts DMA related fields in the IFB structure.
1282	// perform a copying-scheme to circumvent the 'last host owned descriptor cannot be reclaimed' limitation imposed by H2.5's DMA hardware design
1283	// a 'reclaim descriptor' should be available in the HCF:
1284*
1285* Returns: address of the first descriptor of the FrameList
1286*
1287 8: Be careful once you start re-ordering the steps in the copy process, that it still works for cases
1288* 	of FrameLists of 1, 2 and more than 2 descriptors
1289*
1290* Input parameters:
1291* tx_rx_flag      : specifies 'transmit' or 'receive' descriptor.
1292*
1293************************************************************************************************************/
1294HCF_STATIC DESC_STRCT*
1295get_frame_lst( IFBP ifbp, int tx_rx_flag )
1296{
1297
1298DESC_STRCT *head = ifbp->IFB_FirstDesc[tx_rx_flag];
1299DESC_STRCT *copy, *p, *prev;
1300
1301	HCFASSERT( tx_rx_flag == DMA_RX || tx_rx_flag == DMA_TX, tx_rx_flag )
1302								//if FrameList
1303	if ( head ) {
1304								//.  search for last descriptor of first FrameList
1305		p = prev = head;
1306		while ( ( p->BUF_SIZE & DESC_EOP ) == 0 && p->next_desc_addr ) {
1307			if ( ( ifbp->IFB_CntlOpt & DMA_ENABLED ) == 0 ) {	//clear control bits when disabled
1308				p->BUF_CNT &= DESC_CNT_MASK;
1309			}
1310			prev = p;
1311			p = p->next_desc_addr;
1312		}
1313								//.  if DMA enabled
1314		if ( ifbp->IFB_CntlOpt & DMA_ENABLED ) {
1315								//.  .  if last descriptor of FrameList is DMA owned
1316								//.  .  or if FrameList is single (DELWA) Descriptor
1317			if ( p->BUF_CNT & DESC_DMA_OWNED || head->next_desc_addr == NULL ) {
1318								//.  .  .  refuse to return FrameList to caller
1319				head = NULL;
1320			}
1321		}
1322	}
1323								//if returnable FrameList found
1324	if ( head ) {
1325								//.  if FrameList is single (DELWA) Descriptor (implies DMA disabled)
1326 		if ( head->next_desc_addr == NULL ) {
1327								//.  .  clear DescriptorList
1328			/*;?ifbp->IFB_LastDesc[tx_rx_flag] =*/ ifbp->IFB_FirstDesc[tx_rx_flag] = NULL;
1329								//.  else
1330		} else {
1331								//.  .  strip hardware-related bits from last descriptor
1332								//.  .  remove DELWA Descriptor from head of DescriptorList
1333			copy = head;
1334	 		head = head->next_desc_addr;
1335								//.   .  exchange first (Confined) and last (possibly imprisoned) Descriptor
1336			copy->buf_phys_addr = p->buf_phys_addr;
1337			copy->buf_addr = p->buf_addr;
1338			copy->BUF_SIZE = p->BUF_SIZE &= DESC_CNT_MASK;	//get rid of DESC_EOP and possibly DESC_SOP
1339			copy->BUF_CNT = p->BUF_CNT &= DESC_CNT_MASK;	//get rid of DESC_DMA_OWNED
1340#if (HCF_EXT) & HCF_DESC_STRCT_EXT
1341			copy->DESC_MSFSup = p->DESC_MSFSup;
1342#endif // HCF_DESC_STRCT_EXT
1343								//.  .  turn into a DELWA Descriptor
1344			p->buf_addr = NULL;
1345								//.  .  chain copy to prev											/* 8*/
1346			prev->next_desc_addr = copy;
1347								//.  .  detach remainder of the DescriptorList from FrameList
1348			copy->next_desc_addr = NULL;
1349			copy->next_desc_phys_addr = 0xDEAD0000; //! just to be nice, not really needed
1350								//.  .  save the new start (i.e. DELWA Descriptor) in IFB_FirstDesc
1351			ifbp->IFB_FirstDesc[tx_rx_flag] = p;
1352		}
1353								//.  strip DESC_SOP from first descriptor
1354		head->BUF_SIZE &= DESC_CNT_MASK;
1355		//head->BUF_CNT &= DESC_CNT_MASK;  get rid of DESC_DMA_OWNED
1356		head->next_desc_phys_addr = 0xDEAD0000; //! just to be nice, not really needed
1357	}
1358								//return the just detached FrameList (if any)
1359	return head;
1360} // get_frame_lst
1361
1362
1363/************************************************************************************************************
1364* Function put_frame_lst
1365*
1366* This function
1367*
1368* Returns: address of the first descriptor of the FrameList
1369*
1370* Input parameters:
1371* tx_rx_flag      : specifies 'transmit' or 'receive' descriptor.
1372*
1373* The following list should be kept in sync with hcf_dma_tx/rx_put, in order to get them in the WCI-spec !!!!
1374* Assert fails if
1375* -	DMA is not enabled
1376* -	descriptor list is NULL
1377* -	a descriptor in the descriptor list is not double word aligned
1378* -	a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1379* -	the DELWA descriptor is not a "singleton" DescriptorList.
1380* -	the DELWA descriptor is not the first Descriptor supplied
1381* -	a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1382* -	Possibly more checks could be added !!!!!!!!!!!!!
1383
1384*.NOTICE
1385* The asserts marked with *sc* are really sanity checks for the HCF, they can (supposedly) not be influenced
1386* by incorrect MSF behavior
1387
1388		// The MSF is required to supply the HCF with a single descriptor for MSF tx reclaim purposes.
1389		// This 'reclaim descriptor' can be recognized by the fact that its buf_addr field is zero.
1390	*********************************************************************************************
1391	* Although not required from a hardware perspective:
1392	* - make each descriptor in this rx-chain DMA-owned.
1393	* - Also set the count to zero. EOP and SOP bits are also cleared.
1394	*********************************************************************************************/
1395HCF_STATIC void
1396put_frame_lst( IFBP ifbp, DESC_STRCT *descp, int tx_rx_flag )
1397{
1398	DESC_STRCT	*p = descp;
1399	hcf_16 port;
1400
1401	HCFASSERT( ifbp->IFB_CntlOpt & USE_DMA, ifbp->IFB_CntlOpt) //only hcf_dma_tx_put must also be DMA_ENABLED
1402	HCFASSERT( tx_rx_flag == DMA_RX || tx_rx_flag == DMA_TX, tx_rx_flag )
1403	HCFASSERT( p , 0 )
1404
1405	while ( p ) {
1406		HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p )
1407		HCFASSERT( (p->BUF_CNT & ~DESC_CNT_MASK) == 0, p->BUF_CNT )
1408		HCFASSERT( (p->BUF_SIZE & ~DESC_CNT_MASK) == 0, p->BUF_SIZE )
1409		p->BUF_SIZE &= DESC_CNT_MASK;					//!!this SHOULD be superfluous in case of correct MSF
1410		p->BUF_CNT &= tx_rx_flag == DMA_RX ? 0 : DESC_CNT_MASK;	//!!this SHOULD be superfluous in case of correct MSF
1411		p->BUF_CNT |= DESC_DMA_OWNED;
1412		if ( p->next_desc_addr ) {
1413//			HCFASSERT( p->buf_addr && p->buf_phys_addr  && p->BUF_SIZE && +/- p->BUF_SIZE, ... )
1414			HCFASSERT( p->next_desc_addr->desc_phys_addr, (hcf_32)p->next_desc_addr )
1415			p->next_desc_phys_addr = p->next_desc_addr->desc_phys_addr;
1416		} else {									//
1417			p->next_desc_phys_addr = 0;
1418			if ( p->buf_addr == NULL ) {			// DELWA Descriptor
1419				HCFASSERT( descp == p, (hcf_32)descp )	//singleton DescriptorList
1420				HCFASSERT( ifbp->IFB_FirstDesc[tx_rx_flag] == NULL, (hcf_32)ifbp->IFB_FirstDesc[tx_rx_flag])
1421				HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag] == NULL, (hcf_32)ifbp->IFB_LastDesc[tx_rx_flag])
1422				descp->BUF_CNT = 0; //&= ~DESC_DMA_OWNED;
1423				ifbp->IFB_FirstDesc[tx_rx_flag] = descp;
1424// part of alternative ifbp->IFB_LastDesc[tx_rx_flag] = ifbp->IFB_FirstDesc[tx_rx_flag] = descp;
1425													// if "recycling" a FrameList
1426													// (e.g. called from hcf_cntl( HCF_CNTL_ENABLE )
1427													// .  prepare for activation DMA controller
1428// part of alternative descp = descp->next_desc_addr;
1429			} else {								//a "real" FrameList, hand it over to the DMA engine
1430				HCFASSERT( ifbp->IFB_FirstDesc[tx_rx_flag], (hcf_32)descp )
1431				HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag], (hcf_32)descp )
1432				HCFASSERT( ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr == NULL,
1433						   (hcf_32)ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr)
1434//				p->buf_cntl.cntl_stat |= DESC_DMA_OWNED;
1435				ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_addr = descp;
1436				ifbp->IFB_LastDesc[tx_rx_flag]->next_desc_phys_addr = descp->desc_phys_addr;
1437				port = HREG_RXDMA_PTR32;
1438				if ( tx_rx_flag ) {
1439					p->BUF_SIZE |= DESC_EOP;	// p points at the last descriptor in the caller-supplied descriptor chain
1440					descp->BUF_SIZE |= DESC_SOP;
1441					port = HREG_TXDMA_PTR32;
1442				}
1443				OUT_PORT_DWORD( (ifbp->IFB_IOBase + port), descp->desc_phys_addr );
1444			}
1445			ifbp->IFB_LastDesc[tx_rx_flag] = p;
1446		}
1447		p = p->next_desc_addr;
1448	}
1449} // put_frame_lst
1450
1451
1452/************************************************************************************************************
1453*
1454*.MODULE		DESC_STRCT* hcf_dma_rx_get( IFBP ifbp )
1455*.PURPOSE		decapsulate a message and provides that message to the MSF.
1456*				reclaim all descriptors in the rx descriptor chain.
1457*
1458*.ARGUMENTS
1459*	ifbp		address of the Interface Block
1460*
1461*.RETURNS
1462*	pointer to a FrameList
1463*
1464*.DESCRIPTION
1465* hcf_dma_rx_get is intended to  return a received frame when such a frame is deposited in Host memory by the
1466* DMA engine. In addition hcf_dma_rx_get can be used to reclaim all descriptors in the rx descriptor chain
1467* when the DMA Engine is disabled, e.g. as part of a driver unloading strategy.
1468* hcf_dma_rx_get must be called repeatedly by the MSF when hcf_service_nic signals availability of a rx frame
1469* through the HREG_EV_RDMAD flag of IFB_DmaPackets. The calling must stop when a NULL pointer is returned, at
1470* which time the HREG_EV_RDMAD flag is also cleared by the HCF to arm the mechanism for the next frame
1471* reception.
1472* Regardless whether the DMA Engine is currently enabled (as controlled via hcf_cntl), if the DMA controller
1473* deposited an Rx-frame in the Rx-DescriptorList, this frame is detached from the Rx-DescriptorList,
1474* transformed into a FrameList (i.e.  updating the housekeeping fields in the descriptors) and returned to the
1475* caller.
1476* If no such Rx-frame is available in the Rx-DescriptorList, the behavior of hcf_dma_rx_get depends on the
1477* status of the DMA Engine.
1478* If the DMA Engine is enabled, a NULL pointer is returned.
1479* If the DMA Engine is disabled, the following strategy is used:
1480* - the complete Rx-DescriptorList is returned. The DELWA Descriptor is not part of the Rx-DescriptorList.
1481* - If there is no Rx-DescriptorList, the DELWA Descriptor is returned.
1482* - If there is no DELWA Descriptor, a NULL pointer is returned.
1483*
1484* If the MSF performs an disable/enable sequence without exhausting the Rx-DescriptorList as described above,
1485* the enable command will reset all house keeping information, i.e. already received but not yet by the MSF
1486* retrieved frames are lost and the next frame will be received starting with the oldest descriptor.
1487*
1488* The HCF can be used in 2 fashions: with and without decapsulation for data transfer.
1489* This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1490* If appropriate, decapsulation is done by moving some data inside the buffers and updating the descriptors
1491* accordingly.
1492*!! ;?????where did I describe why a simple manipulation with the count values does not suffice?
1493*
1494*.DIAGRAM
1495*
1496*.ENDDOC				END DOCUMENTATION
1497*
1498************************************************************************************************************/
1499
1500DESC_STRCT*
1501hcf_dma_rx_get (IFBP ifbp)
1502{
1503DESC_STRCT *descp;	// pointer to start of FrameList
1504
1505	descp = get_frame_lst( ifbp, DMA_RX );
1506	if ( descp && descp->buf_addr )  //!be aware of the missing curly bracket
1507
1508											//skip decapsulation at confined descriptor
1509#if HCF_ENCAP == HCF_ENC
1510#if (HCF_TYPE) & HCF_TYPE_CCX
1511	if ( ifbp->IFB_CKIPStat == HCF_ACT_CCX_OFF )
1512#endif // HCF_TYPE_CCX
1513    {
1514int i;
1515DESC_STRCT *p = descp->next_desc_addr;	//pointer to 2nd descriptor of frame
1516		HCFASSERT(p, 0)
1517		// The 2nd descriptor contains (maybe) a SNAP header plus part or whole of the payload.
1518		//determine decapsulation sub-flag in RxFS
1519		i = *(wci_recordp)&descp->buf_addr[HFS_STAT] & ( HFS_STAT_MSG_TYPE | HFS_STAT_ERR );
1520		if ( i == HFS_STAT_TUNNEL ||
1521			 ( i == HFS_STAT_1042 && hcf_encap( (wci_bufp)&p->buf_addr[HCF_DASA_SIZE] ) != ENC_TUNNEL )) {
1522			// The 2nd descriptor contains a SNAP header plus part or whole of the payload.
1523			HCFASSERT( p->BUF_CNT == (p->buf_addr[5] + (p->buf_addr[4]<<8) + 2*6 + 2 - 8), p->BUF_CNT )
1524			// perform decapsulation
1525			HCFASSERT(p->BUF_SIZE >=8, p->BUF_SIZE)
1526			// move SA[2:5] in the second buffer to replace part of the SNAP header
1527			for ( i=3; i >= 0; i--) p->buf_addr[i+8] = p->buf_addr[i];
1528			// copy DA[0:5], SA[0:1] from first buffer to second buffer
1529			for ( i=0; i<8; i++) p->buf_addr[i] = descp->buf_addr[HFS_ADDR_DEST + i];
1530			// make first buffer shorter in count
1531			descp->BUF_CNT = HFS_ADDR_DEST;
1532		}
1533	}
1534#endif // HCF_ENC
1535	if ( descp == NULL ) ifbp->IFB_DmaPackets &= (hcf_16)~HREG_EV_RDMAD;  //;?could be integrated into get_frame_lst
1536	HCFLOGEXIT( HCF_TRACE_DMA_RX_GET )
1537	return descp;
1538} // hcf_dma_rx_get
1539
1540
1541/************************************************************************************************************
1542*
1543*.MODULE		void hcf_dma_rx_put( IFBP ifbp, DESC_STRCT *descp )
1544*.PURPOSE		supply buffers for receive purposes.
1545*				supply the Rx-DELWA descriptor.
1546*
1547*.ARGUMENTS
1548*	ifbp		address of the Interface Block
1549*	descp		address of a DescriptorList
1550*
1551*.RETURNS		N.A.
1552*
1553*.DESCRIPTION
1554* This function is called by the MSF to supply the HCF with new/more buffers for receive purposes.
1555* The HCF can be used in 2 fashions: with and without encapsulation for data transfer.
1556* This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1557* As a consequence, some additional constaints apply to the number of descriptor and the buffers associated
1558* with the first 2 descriptors. Independent of the encapsulation feature, the COUNT fields are ignored.
1559* A special case is the supplying of the DELWA descriptor, which must be supplied as the first descriptor.
1560*
1561* Assert fails if
1562* - ifbp has a recognizable out-of-range value.
1563* - NIC interrupts are not disabled while required by parameter action.
1564* - in case decapsulation by the HCF is selected:
1565*	  -	The first databuffer does not have the exact size corresponding with the RxFS up to the 802.3 DestAddr
1566*		field (== 29 words).
1567*	  -	The FrameList does not consists of at least 2 Descriptors.
1568*	  -	The second databuffer does not have the minimum size of 8 bytes.
1569*!! The 2nd part of the list of asserts should be kept in sync with put_frame_lst, in order to get
1570*!! them in the WCI-spec !!!!
1571* - DMA is not enabled
1572* - descriptor list is NULL
1573* - a descriptor in the descriptor list is not double word aligned
1574* - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1575* - the DELWA descriptor is not a "singleton" DescriptorList.
1576* - the DELWA descriptor is not the first Descriptor supplied
1577* - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1578*!! - Possibly more checks could be added !!!!!!!!!!!!!
1579*
1580*.DIAGRAM
1581*
1582*
1583*.ENDDOC				END DOCUMENTATION
1584*
1585************************************************************************************************************/
1586void
1587hcf_dma_rx_put( IFBP ifbp, DESC_STRCT *descp )
1588{
1589
1590	HCFLOGENTRY( HCF_TRACE_DMA_RX_PUT, 0xDA01 )
1591	HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
1592	HCFASSERT_INT
1593
1594	put_frame_lst( ifbp, descp, DMA_RX );
1595#if HCF_ASSERT && HCF_ENCAP == HCF_ENC
1596	if ( descp->buf_addr ) {
1597		HCFASSERT( descp->BUF_SIZE == HCF_DMA_RX_BUF1_SIZE, descp->BUF_SIZE )
1598		HCFASSERT( descp->next_desc_addr, 0 ) // first descriptor should be followed by another descriptor
1599		// The second DB is for SNAP and payload purposes. It should be a minimum of 12 bytes in size.
1600		HCFASSERT( descp->next_desc_addr->BUF_SIZE >= 12, descp->next_desc_addr->BUF_SIZE )
1601	}
1602#endif // HCFASSERT / HCF_ENC
1603	HCFLOGEXIT( HCF_TRACE_DMA_RX_PUT )
1604} // hcf_dma_rx_put
1605
1606
1607/************************************************************************************************************
1608*
1609*.MODULE		DESC_STRCT* hcf_dma_tx_get( IFBP ifbp )
1610*.PURPOSE		DMA mode: reclaims and decapsulates packets in the tx descriptor chain if:
1611*				 - A Tx packet has been copied from host-RAM into NIC-RAM by the DMA engine
1612*				 - The Hermes/DMAengine have been disabled
1613*
1614*.ARGUMENTS
1615*	ifbp		address of the Interface Block
1616*
1617*.RETURNS
1618*	pointer to a reclaimed Tx packet.
1619*
1620*.DESCRIPTION
1621* impact of the disable command:
1622* When a non-empty pool of Tx descriptors exists (created by means of hcf_dma_put_tx), the MSF
1623* is supposed to empty that pool by means of hcf_dma_tx_get calls after the disable in an
1624* disable/enable sequence.
1625*
1626*.DIAGRAM
1627*
1628*.NOTICE
1629*
1630*.ENDDOC				END DOCUMENTATION
1631*
1632************************************************************************************************************/
1633DESC_STRCT*
1634hcf_dma_tx_get( IFBP ifbp )
1635{
1636DESC_STRCT *descp;	// pointer to start of FrameList
1637
1638	descp = get_frame_lst( ifbp, DMA_TX );
1639	if ( descp && descp->buf_addr )  //!be aware of the missing curly bracket
1640											//skip decapsulation at confined descriptor
1641#if HCF_ENCAP == HCF_ENC
1642		if ( ( descp->BUF_CNT == HFS_TYPE )
1643#if (HCF_TYPE) & HCF_TYPE_CCX
1644			 || ( descp->BUF_CNT == HFS_DAT )
1645#endif // HCF_TYPE_CCX
1646		) { // perform decapsulation if needed
1647			descp->next_desc_addr->buf_phys_addr -= HCF_DASA_SIZE;
1648			descp->next_desc_addr->BUF_CNT 		 += HCF_DASA_SIZE;
1649		}
1650#endif // HCF_ENC
1651	if ( descp == NULL ) {  //;?could be integrated into get_frame_lst
1652		ifbp->IFB_DmaPackets &= (hcf_16)~HREG_EV_TDMAD;
1653	}
1654	HCFLOGEXIT( HCF_TRACE_DMA_TX_GET )
1655	return descp;
1656} // hcf_dma_tx_get
1657
1658
1659/************************************************************************************************************
1660*
1661*.MODULE		void hcf_dma_tx_put( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
1662*.PURPOSE		puts a packet in the Tx DMA queue in host ram and kicks off the TxDma engine.
1663*				supply the Tx-DELWA descriptor.
1664*
1665*.ARGUMENTS
1666*	ifbp		address of the Interface Block
1667*	descp		address of Tx Descriptor Chain (i.e. a single Tx frame)
1668*	tx_cntl		indicates MAC-port and (Hermes) options
1669*
1670*.RETURNS		N.A.
1671*
1672*.DESCRIPTION
1673* The HCF can be used in 2 fashions: with and without encapsulation for data transfer.
1674* This is controlled at compile time by the HCF_ENC bit of the HCF_ENCAP system constant.
1675*
1676* Regardless of the HCF_ENCAP system constant, the descriptor list created to describe the frame to be
1677* transmitted, must supply space to contain the 802.11 header, preceding the actual frame to be transmitted.
1678* Basically, this only supplies working storage to the HCF which passes this on to the DMA engine.
1679* As a consequence the contents of this space do not matter.
1680* Nevertheless BUF_CNT must take in account this storage.
1681* This working space to contain the 802.11 header may not be fragmented, the first buffer must be
1682* sufficiently large to contain at least the 802.11 header, i.e. HFS_ADDR_DEST (29 words or 0x3A bytes).
1683* This way, the HCF can simply, regardless whether or not the HCF encapsulates the frame, write the parameter
1684* tx_cntl at offset 0x36 (HFS_TX_CNTL) in the first buffer.
1685* Note that it is allowed to have part or all of the actual frame represented by the first descriptor as long
1686* as the requirement for storage for the 802.11 header is met, i.e. the 802.3 frame starts at offset
1687* HFS_ADDR_DEST.
1688* Except for the Assert on the 1st buffer in case of Encapsualtion, the SIZE fields are ignored.
1689*
1690* In case the encapsulation feature is compiled in, there are the following additional requirements.
1691* o The BUF_CNT of the first buffer changes from a minimum of 0x3A bytes to exactly 0x3A, i.e. the workspace
1692*	to store the 802.11 header
1693* o The BUF_SIZE of the first buffer is at least the space needed to store the
1694*	- 802.11 header (29 words)
1695*	- 802.3 header, i.e. 12 bytes addressing information and 2 bytes length field
1696*	- 6 bytes SNAP-header
1697*   This results in 39 words or 0x4E bytes or HFS_TYPE.
1698*   Note that if the BUF_SIZE is larger than 0x4E, this surplus is not used.
1699* o The actual frame begins in the 2nd descriptor (which is already implied by the BUF_CNT == 0x3A requirement) and the associated buffer contains at least the 802.3 header, i.e. the 14 bytes representing addressing information and length/type field
1700*
1701*   When the HCF does not encapsulates (i.e. length/type field <= 1500),  no changes are made to descriptors
1702*   or buffers.
1703*
1704*   When the HCF actually encapsulates (i.e. length/type field > 1500), it successively writes, starting at
1705*   offset HFS_ADDR_DEST (0x3A) in the first buffer:
1706*     - the 802.3 addressing information, copied from the begin of the second buffer
1707*     - the frame length, derived from the total length of the individual fragments, corrected for the SNAP
1708*   	header length and Type field and ignoring the Destination Address, Source Address and Length field
1709* 	  - the appropriate snap header (Tunnel or 1042, depending on the value of the type field).
1710*
1711* 	 The information in the first two descriptors is adjusted accordingly:
1712* 	  - the first descriptor count is changed from 0x3A to 0x4E (HFS_TYPE), which matches 0x3A + 12 + 2 + 6
1713* 	  - the second descriptor count is decreased by 12, being the moved addressing information
1714* 	  - the second descriptor (physical) buffer address is increased by 12.
1715*
1716* When the descriptors are returned by hcf_dma_tx_get, the transformation of the first two descriptors is
1717* undone.
1718*
1719* Under any of the above scenarios, the assert BUF_CNT <= BUF_SIZE must be true for all descriptors
1720* In case of encapsulation, BUF_SIZE of the 1st descriptor is asserted to be at least HFS_TYPE (0x4E), so it is NOT tested.
1721*
1722* Assert fails if
1723* - ifbp has a recognizable out-of-range value.
1724* - tx_cntl has a recognizable out-of-range value.
1725* - NIC interrupts are not disabled while required by parameter action.
1726* - in case encapsulation by the HCF is selected:
1727*	  -	The FrameList does not consists of at least 2 Descriptors.
1728*	  -	The first databuffer does not contain exactly the (space for) the 802.11 header (== 28 words)
1729*	  -	The first databuffer does not have a size to additionally accomodate the 802.3 header and the
1730*		SNAP header of the frame after encapsulation (== 39 words).
1731*	  -	The second databuffer does not contain at least DA, SA and 'type/length' (==14 bytes or 7 words)
1732*!! The 2nd part of the list of asserts should be kept in sync with put_frame_lst, in order to get
1733*!! them in the WCI-spec !!!!
1734* - DMA is not enabled
1735* - descriptor list is NULL
1736* - a descriptor in the descriptor list is not double word aligned
1737* - a count of size field of a descriptor contains control bits, i.e. bits in the high order nibble.
1738* - the DELWA descriptor is not a "singleton" DescriptorList.
1739* - the DELWA descriptor is not the first Descriptor supplied
1740* - a non_DMA descriptor is supplied before the DELWA Descriptor is supplied
1741*!! - Possibly more checks could be added !!!!!!!!!!!!!
1742*.DIAGRAM
1743*
1744*.NOTICE
1745*
1746*.ENDDOC				END DOCUMENTATION
1747*
1748*
1749*1:	Write tx_cntl parameter to HFS_TX_CNTL field into the Hermes-specific header in buffer 1
1750*4:	determine whether encapsulation is needed and write the type (tunnel or 1042) already at the appropriate
1751*	offset in the 1st buffer
1752*6:	Build the encapsualtion enveloppe in the free space at the end of the 1st buffer
1753*	- Copy DA/SA fields from the 2nd buffer
1754*   - Calculate total length of the message (snap-header + type-field + the length of all buffer fragments
1755*     associated with the 802.3 frame (i.e all descriptors except the first), but not the DestinationAddress,
1756*     SourceAddress and lenght-field)
1757*     Assert the message length
1758*	  Write length. Note that the message is in BE format, hence on LE platforms the length must be converted
1759*	  ;? THIS IS NOT WHAT CURRENTLY IS IMPLEMENTED
1760*	- Write snap header. Note that the last byte of the snap header is NOT copied, that byte is already in
1761*	  place as result of the call to hcf_encap.
1762*	Note that there are many ways to skin a cat. To express the offsets in the 1st buffer while writing
1763*	the snap header, HFS_TYPE is choosen as a reference point to make it easier to grasp that the snap header
1764*	and encapsualtion type are at least relative in the right.
1765*8:	modify 1st descriptor to reflect moved part of the 802.3 header + Snap-header
1766*	modify 2nd descriptor to skip the moved part of the 802.3 header (DA/SA
1767*10: set each descriptor to 'DMA owned',  clear all other control bits.
1768*	Set SOP bit on first descriptor. Set EOP bit on last descriptor.
1769*12: Either append the current frame to an existing descriptor list or
1770*14: create a list beginning with the current frame
1771*16: remember the new end of the list
1772*20: hand the frame over to the DMA engine
1773************************************************************************************************************/
1774void
1775hcf_dma_tx_put( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
1776{
1777DESC_STRCT	*p = descp->next_desc_addr;
1778int			i;
1779
1780#if HCF_ASSERT
1781	int x = ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ? tx_cntl & ~HFS_TX_CNTL_PORT : tx_cntl;
1782	HCFASSERT( (x & ~HCF_TX_CNTL_MASK ) == 0, tx_cntl )
1783#endif // HCF_ASSERT
1784	HCFLOGENTRY( HCF_TRACE_DMA_TX_PUT, 0xDA03 )
1785	HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
1786	HCFASSERT_INT
1787	HCFASSERT( ( ifbp->IFB_CntlOpt & (USE_DMA|DMA_ENABLED) ) == (USE_DMA|DMA_ENABLED), ifbp->IFB_CntlOpt)
1788
1789	if ( descp->buf_addr ) {
1790		*(hcf_16*)(descp->buf_addr + HFS_TX_CNTL) = tx_cntl;											/*1*/
1791#if HCF_ENCAP == HCF_ENC
1792		HCFASSERT( descp->next_desc_addr, 0 )									//at least 2 descripors
1793		HCFASSERT( descp->BUF_CNT == HFS_ADDR_DEST, descp->BUF_CNT )	//exact length required for 1st buffer
1794		HCFASSERT( descp->BUF_SIZE >= HCF_DMA_TX_BUF1_SIZE, descp->BUF_SIZE )	//minimal storage for encapsulation
1795		HCFASSERT( p->BUF_CNT >= 14, p->BUF_CNT );					//at least DA, SA and 'type' in 2nd buffer
1796
1797#if (HCF_TYPE) & HCF_TYPE_CCX
1798		/* if we are doing PPK +/- CMIC, or we are sending a DDP frame */
1799		if ( ( ifbp->IFB_CKIPStat == HCF_ACT_CCX_ON ) ||
1800			 ( ( p->BUF_CNT >= 20 )		 && ( ifbp->IFB_CKIPStat == HCF_ACT_CCX_OFF ) &&
1801			 ( p->buf_addr[12] == 0xAA ) && ( p->buf_addr[13] == 0xAA ) &&
1802			 ( p->buf_addr[14] == 0x03 ) && ( p->buf_addr[15] == 0x00 ) &&
1803			 ( p->buf_addr[16] == 0x40 ) && ( p->buf_addr[17] == 0x96 ) &&
1804			 ( p->buf_addr[18] == 0x00 ) && ( p->buf_addr[19] == 0x00 )))
1805		{
1806			/* copy the DA/SA to the first buffer */
1807			for ( i = 0; i < HCF_DASA_SIZE; i++ ) {
1808				descp->buf_addr[i + HFS_ADDR_DEST] = p->buf_addr[i];
1809			}
1810			/* calculate the length of the second fragment only */
1811			i = 0;
1812			do { i += p->BUF_CNT; } while( p = p->next_desc_addr );
1813			i -= HCF_DASA_SIZE ;
1814			/* convert the length field to big endian, using the endian friendly macros */
1815			i = CNV_SHORT_TO_BIG(i);		//!! this converts ONLY on LE platforms, how does that relate to the non-CCX code
1816			*(hcf_16*)(&descp->buf_addr[HFS_LEN]) = (hcf_16)i;
1817			descp->BUF_CNT = HFS_DAT;
1818			// modify 2nd descriptor to skip the 'Da/Sa' fields
1819			descp->next_desc_addr->buf_phys_addr += HCF_DASA_SIZE;
1820			descp->next_desc_addr->BUF_CNT		 -= HCF_DASA_SIZE;
1821		}
1822		else
1823#endif // HCF_TYPE_CCX
1824		{
1825			descp->buf_addr[HFS_TYPE-1] = hcf_encap(&descp->next_desc_addr->buf_addr[HCF_DASA_SIZE]);		/*4*/
1826			if ( descp->buf_addr[HFS_TYPE-1] != ENC_NONE ) {
1827				for ( i=0; i < HCF_DASA_SIZE; i++ ) {														/*6*/
1828					descp->buf_addr[i + HFS_ADDR_DEST] = descp->next_desc_addr->buf_addr[i];
1829				}
1830				i = sizeof(snap_header) + 2 - ( 2*6 + 2 );
1831				do { i += p->BUF_CNT; } while ( ( p = p->next_desc_addr ) != NULL );
1832				*(hcf_16*)(&descp->buf_addr[HFS_LEN]) = CNV_END_SHORT(i);	//!! this converts on ALL platforms, how does that relate to the CCX code
1833				for ( i=0; i < sizeof(snap_header) - 1; i++) {
1834					descp->buf_addr[HFS_TYPE - sizeof(snap_header) + i] = snap_header[i];
1835				}
1836				descp->BUF_CNT = HFS_TYPE;																	/*8*/
1837				descp->next_desc_addr->buf_phys_addr	+= HCF_DASA_SIZE;
1838				descp->next_desc_addr->BUF_CNT			-= HCF_DASA_SIZE;
1839			}
1840		}
1841#endif // HCF_ENC
1842    }
1843	put_frame_lst( ifbp, descp, DMA_TX );
1844	HCFLOGEXIT( HCF_TRACE_DMA_TX_PUT )
1845} // hcf_dma_tx_put
1846
1847#endif // HCF_DMA
1848
1849#if HCF_DL_ONLY == 0
1850/************************************************************************************************************
1851*
1852*.MODULE		hcf_8 hcf_encap( wci_bufp type )
1853*.PURPOSE		test whether RFC1042 or Bridge-Tunnel encapsulation is needed.
1854*
1855*.ARGUMENTS
1856*	type		(Far) pointer to the (Big Endian) Type/Length field in the message
1857*
1858*.RETURNS
1859*	ENC_NONE		len/type is "len" ( (BIG_ENDIAN)type <= 1500 )
1860*	ENC_TUNNEL		len/type is "type" and 0x80F3 or 0x8137
1861*	ENC_1042		len/type is "type" but not 0x80F3 or 0x8137
1862*
1863*.CONDITIONS
1864*	NIC Interrupts	d.c
1865*
1866*.DESCRIPTION
1867* Type must point to the Len/Type field of the message, this is the 2-byte field immediately after the 6 byte
1868* Destination Address and 6 byte Source Address.  The 2 successive bytes addressed by type are interpreted as
1869* a Big Endian value.  If that value is less than or equal to 1500, the message is assumed to be in 802.3
1870* format.  Otherwise the message is assumed to be in Ethernet-II format.  Depending on the value of Len/Typ,
1871* Bridge Tunnel or RFC1042 encapsulation is needed.
1872*
1873*.DIAGRAM
1874*
1875*  1:	presume 802.3, hence preset return value at ENC_NONE
1876*  2:	convert type from "network" Endian format to native Endian
1877*  4:	the litmus test to distinguish type and len.
1878*	The hard code "magic" value of 1500 is intentional and should NOT be replaced by a mnemonic because it is
1879*	not related at all to the maximum frame size supported  by the Hermes.
1880*  6:	check type against:
1881*		0x80F3	//AppleTalk Address Resolution Protocol (AARP)
1882*		0x8137	//IPX
1883*	to determine the type of encapsulation
1884*
1885*.ENDDOC				END DOCUMENTATION
1886*
1887************************************************************************************************************/
1888#if HCF_ENCAP	//i.e HCF_ENC or HCF_ENC_SUP
1889#if ! ( (HCF_ENCAP) & HCF_ENC_SUP )
1890HCF_STATIC
1891#endif // HCF_ENCAP
1892hcf_8
1893hcf_encap( wci_bufp type )
1894{
1895
1896hcf_8	rc = ENC_NONE;																					/* 1 */
1897hcf_16	t = (hcf_16)(*type<<8) + *(type+1);																/* 2 */
1898
1899	if ( t > 1500 ) {																					/* 4 */
1900		if ( t == 0x8137 || t == 0x80F3 ) {
1901			rc = ENC_TUNNEL;																			/* 6 */
1902		} else {
1903			rc = ENC_1042;
1904		}
1905	}
1906	return rc;
1907} // hcf_encap
1908#endif // HCF_ENCAP
1909#endif // HCF_DL_ONLY
1910
1911
1912/************************************************************************************************************
1913*
1914*.MODULE		int hcf_get_info( IFBP ifbp, LTVP ltvp )
1915*.PURPOSE		Obtains transient and persistent configuration information from the Card and from the HCF.
1916*
1917*.ARGUMENTS
1918*	ifbp		address of the Interface Block
1919*	ltvp		address of LengthTypeValue structure specifying the "what" and the "how much" of the
1920*				information to be collected from the HCF or from the Hermes
1921*
1922*.RETURNS
1923*	HCF_ERR_LEN			The provided buffer was too small
1924*	HCF_SUCCESS			Success
1925*!!	via cmd_exe ( type >= CFG_RID_FW_MIN )
1926*	HCF_ERR_NO_NIC		NIC removed during retrieval
1927*	HCF_ERR_TIME_OUT	Expected Hermes event did not occure in expected time
1928*!!	via cmd_exe and setup_bap (type >= CFG_RID_FW_MIN )
1929*	HCF_ERR_DEFUNCT_...	HCF is in defunct mode (bits 0x7F reflect cause)
1930*
1931*.DESCRIPTION
1932* The T-field of the LTV-record (provided by the MSF in parameter ltvp) specifies the RID wanted. The RID
1933* information identified by the T-field is copied into the V-field.
1934* On entry, the L-field specifies the size of the buffer, also called the "Initial DataLength". The L-value
1935* includes the size of the T-field, but not the size of the L-field itself.
1936* On return, the L-field indicates the number of words actually contained by the Type and Value fields.
1937* As the size of the Type field in the LTV-record is included in the "Initial DataLength" of the record, the
1938* V-field can contain at most "Initial DataLength" - 1 words of data.
1939* Copying stops if either the complete Information is copied or if the number of words indicated by the
1940* "Initial DataLength" were copied.  The "Initial DataLength" acts as a safe guard against Configuration
1941* Information blocks that have different sizes for different F/W versions, e.g. when later versions support
1942* more tallies than earlier versions.
1943* If the size of Value field of the RID exceeds the size of the "Initial DataLength" -1, as much data
1944* as fits is copied, and an error status of HCF_ERR_LEN is returned.
1945*
1946* It is the responsibility of the MSF to detect card removal and re-insertion and not call the HCF when the
1947* NIC is absent. The MSF cannot, however, timely detect a Card removal if the Card is removed while
1948* hcf_get_info is in progress.  Therefore, the HCF performs its own check on Card presence after the read
1949* operation of the NIC data.  If the Card is not present or removed during the execution of hcf_get_info,
1950* HCF_ERR_NO_NIC is returned and the content of the Data Buffer is unpredictable. This check is not performed
1951* in case of the "HCF embedded" pseudo RIDs like CFG_TALLIES.
1952*
1953* Assert fails if
1954* - ifbp has a recognizable out-of-range value.
1955* - reentrancy, may be  caused by calling hcf_functions without adequate protection
1956*	against NIC interrupts or multi-threading.
1957* - ltvp is a NULL pointer.
1958* - length field of the LTV-record at entry is 0 or 1 or has an excessive value (i.e. exceeds HCF_MAX_LTV).
1959* - type field of the LTV-record is invalid.
1960*
1961*.DIAGRAM
1962*	Hcf_get_mb_info copies the contents of the oldest MailBox Info block in the MailBox to PC RAM. If len is
1963*	less than the size of the MailBox Info block, only as much as fits in the PC RAM buffer is copied. After
1964*	the copying the MailBox Read pointer is updated to point to the next MailBox Info block, hence the
1965*	remainder of an "oversized" MailBox Info block is lost. The truncation of the MailBox Info block is NOT
1966*	reflected in the return status. Note that hcf_get_info guarantees the length of the PC RAM buffer meets
1967*	the minimum requirements of at least 2, so no PC RAM buffer overrun.
1968*
1969*	Calling hcf_get_mb_info when their is no MailBox Info block available or when there is no MailBox at all,
1970*	results in a "NULL" MailBox Info block.
1971*
1972*12:	see NOTICE
1973*17: The return status of cmd_wait and the first hcfio_in_string can be ignored, because when one fails, the
1974*	other fails via the IFB_DefunctStat mechanism
1975*20: "HCFASSERT( rc == HCF_SUCCESS, rc )" is not suitable because this will always trigger as side effect of
1976*	the HCFASSERT in hcf_put_info which calls hcf_get_info to figure out whether the RID exists at all.
1977
1978*.NOTICE
1979*
1980*	"HCF embedded" pseudo RIDs:
1981*	CFG_MB_INFO, CFG_TALLIES, CFG_DRV_IDENTITY, CFG_DRV_SUP_RANGE, CFG_DRV_ACT_RANGES_PRI,
1982*	CFG_DRV_ACT_RANGES_STA, CFG_DRV_ACT_RANGES_HSI
1983*	Note the HCF_ERR_LEN is NOT adequately set, when L >= 2 but less than needed
1984*
1985*	Remarks: Transfers operation information and transient and persistent configuration information from the
1986*	Card and from the HCF to the MSF.
1987*	The exact layout of the provided data structure depends on the action code. Copying stops if either the
1988*	complete Configuration Information is copied or if the number of bytes indicated by len is copied.  Len
1989*	acts as a safe guard against Configuration Information blocks which have different sizes for different
1990*	Hermes versions, e.g. when later versions support more tallies than earlier versions. It is a conscious
1991*	decision that unused parts of the PC RAM buffer are not cleared.
1992*
1993*	Remarks: The only error against which is protected is the "Read error" as result of Card removal. Only the
1994*	last hcf_io_string need to be protected because if the first fails the second will fail as well. Checking
1995*	for cmd_exe errors is supposed superfluous because problems in cmd_exe are already caught or will be
1996*	caught by hcf_enable.
1997*
1998*	CFG_MB_INFO: copy the oldest MailBox Info Block or the "null" block if none available.
1999*
2000*	The mechanism to HCF_ASSERT on invalid typ-codes in the LTV record is based on the following strategy:
2001*	  - during the pseudo-asynchronous Hermes commands (diagnose, download)	only CFG_MB_INFO is acceptable
2002*	  -	some codes (e.g. CFG_TALLIES) are explicitly handled by the HCF which implies that these codes
2003*		are valid
2004*	  - all other codes in the range 0xFC00 through 0xFFFF are passed to the Hermes.  The Hermes returns an
2005*		LTV record with a zero value in the L-field for all Typ-codes it does not recognize. This is
2006*		defined and intended behavior, so HCF_ASSERT does not catch on this phenomena.
2007*	  -	all remaining codes are invalid and cause an ASSERT.
2008*
2009*.CONDITIONS
2010* In case of USB, HCF_MAX_MSG ;?USED;? to limit the amount of data that can be retrieved via hcf_get_info.
2011*
2012*
2013*.ENDDOC				END DOCUMENTATION
2014*
2015************************************************************************************************************/
2016int
2017hcf_get_info( IFBP ifbp, LTVP ltvp )
2018{
2019
2020int			rc = HCF_SUCCESS;
2021hcf_16		len = ltvp->len;
2022hcf_16		type = ltvp->typ;
2023wci_recordp	p = &ltvp->len;		//destination word pointer (in LTV record)
2024hcf_16		*q = NULL;				/* source word pointer  Note!! DOS COM can't cope with FAR
2025									 * as a consequence MailBox must be near which is usually true anyway
2026									 */
2027int			i;
2028
2029	HCFLOGENTRY( HCF_TRACE_GET_INFO, ltvp->typ )
2030	HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
2031	HCFASSERT_INT
2032	HCFASSERT( ltvp, 0 )
2033	HCFASSERT( 1 < ltvp->len && ltvp->len <= HCF_MAX_LTV + 1, MERGE_2( ltvp->typ, ltvp->len ) )
2034
2035	ltvp->len = 0;								//default to: No Info Available
2036#if defined MSF_COMPONENT_ID || (HCF_EXT) & HCF_EXT_MB //filter out all specials
2037	for ( i = 0; ( q = xxxx[i] ) != NULL && q[1] != type; i++ ) /*NOP*/;
2038#endif // MSF_COMPONENT_ID / HCF_EXT_MB
2039#if HCF_TALLIES
2040	if ( type == CFG_TALLIES ) {													/*3*/
2041		(void)hcf_action( ifbp, HCF_ACT_TALLIES );
2042		q = (hcf_16*)&ifbp->IFB_TallyLen;
2043	}
2044#endif // HCF_TALLIES
2045#if (HCF_EXT) & HCF_EXT_MB
2046	if ( type == CFG_MB_INFO ) {
2047		if ( ifbp->IFB_MBInfoLen ) {
2048			if ( ifbp->IFB_MBp[ifbp->IFB_MBRp] == 0xFFFF ) {
2049				ifbp->IFB_MBRp = 0; //;?Probably superfluous
2050			}
2051			q = &ifbp->IFB_MBp[ifbp->IFB_MBRp];
2052			ifbp->IFB_MBRp += *q + 1;	//update read pointer
2053			if ( ifbp->IFB_MBp[ifbp->IFB_MBRp] == 0xFFFF ) {
2054				ifbp->IFB_MBRp = 0;
2055			}
2056			ifbp->IFB_MBInfoLen = ifbp->IFB_MBp[ifbp->IFB_MBRp];
2057		}
2058	}
2059#endif // HCF_EXT_MB
2060	if ( q != NULL ) {						//a special or CFG_TALLIES or CFG_MB_INFO
2061		i = min( len, *q ) + 1;				//total size of destination (including T-field)
2062		while ( i-- ) {
2063			*p++ = *q;
2064#if (HCF_TALLIES) & HCF_TALLIES_RESET
2065			if ( q > &ifbp->IFB_TallyTyp && type == CFG_TALLIES ) {
2066				*q = 0;
2067			}
2068#endif // HCF_TALLIES_RESET
2069			q++;
2070		}
2071	} else {								// not a special nor CFG_TALLIES nor CFG_MB_INFO
2072		if ( type == CFG_CNTL_OPT ) {										//read back effective options
2073			ltvp->len = 2;
2074			ltvp->val[0] = ifbp->IFB_CntlOpt;
2075#if (HCF_EXT) & HCF_EXT_NIC_ACCESS
2076		} else if ( type == CFG_PROD_DATA ) {  //only needed for some test tool on top of H-II NDIS driver
2077hcf_io		io_port;
2078wci_bufp	pt;					//pointer with the "right" type, just to help ease writing macros with embedded assembly
2079			OPW( HREG_AUX_PAGE, (hcf_16)(PLUG_DATA_OFFSET >> 7) );
2080			OPW( HREG_AUX_OFFSET, (hcf_16)(PLUG_DATA_OFFSET & 0x7E) );
2081			io_port = ifbp->IFB_IOBase + HREG_AUX_DATA;		//to prevent side effects of the MSF-defined macro
2082			p = ltvp->val;					//destination char pointer (in LTV record)
2083			i = len - 1;
2084			if (i > 0 ) {
2085				pt = (wci_bufp)p;	//just to help ease writing macros with embedded assembly
2086				IN_PORT_STRING_8_16( io_port, pt, i ); //space used by T: -1
2087			}
2088		} else if ( type == CFG_CMD_HCF ) {
2089#define P ((CFG_CMD_HCF_STRCT FAR *)ltvp)
2090			HCFASSERT( P->cmd == CFG_CMD_HCF_REG_ACCESS, P->cmd )		//only Hermes register access supported
2091			if ( P->cmd == CFG_CMD_HCF_REG_ACCESS ) {
2092				HCFASSERT( P->mode < ifbp->IFB_IOBase, P->mode )		//Check Register space
2093				ltvp->len = min( len, 4 );								//RESTORE ltv length
2094				P->add_info = IPW( P->mode );
2095			}
2096#undef P
2097#endif // HCF_EXT_NIC_ACCESS
2098#if (HCF_ASSERT) & HCF_ASSERT_PRINTF
2099        } else if (type == CFG_FW_PRINTF) {
2100           rc = fw_printf(ifbp, (CFG_FW_PRINTF_STRCT*)ltvp);
2101#endif // HCF_ASSERT_PRINTF
2102		} else if ( type >= CFG_RID_FW_MIN ) {
2103//;? by using HCMD_BUSY option when calling cmd_exe, using a get_frag with length 0 just to set up the
2104//;? BAP and calling cmd_cmpl, you could merge the 2 Busy waits. Whether this really helps (and what
2105//;? would be the optimal sequence in cmd_exe and get_frag) would have to be MEASURED
2106/*17*/		if ( ( rc = cmd_exe( ifbp, HCMD_ACCESS, type ) ) == HCF_SUCCESS &&
2107				 ( rc = setup_bap( ifbp, type, 0, IO_IN ) ) == HCF_SUCCESS ) {
2108				get_frag( ifbp, (wci_bufp)&ltvp->len, 2*len+2 BE_PAR(2) );
2109				if ( IPW( HREG_STAT ) == 0xFFFF ) {					//NIC removal test
2110					ltvp->len = 0;
2111					HCFASSERT( DO_ASSERT, type )
2112				}
2113			}
2114/*12*/	} else HCFASSERT( DO_ASSERT, type ) /*NOP*/; //NOP in case HCFASSERT is dummy
2115	}
2116	if ( len < ltvp->len ) {
2117		ltvp->len = len;
2118		if ( rc == HCF_SUCCESS ) {
2119			rc = HCF_ERR_LEN;
2120		}
2121	}
2122	HCFASSERT( rc == HCF_SUCCESS || ( rc == HCF_ERR_LEN && ifbp->IFB_AssertTrace & 1<<HCF_TRACE_PUT_INFO ),
2123			   MERGE_2( type, rc ) )																/*20*/
2124	HCFLOGEXIT( HCF_TRACE_GET_INFO )
2125	return rc;
2126} // hcf_get_info
2127
2128
2129/************************************************************************************************************
2130*
2131*.MODULE		int hcf_put_info( IFBP ifbp, LTVP ltvp )
2132*.PURPOSE		Transfers operation and configuration information to the Card and to the HCF.
2133*
2134*.ARGUMENTS
2135*	ifbp		address of the Interface Block
2136*	ltvp		specifies the RID (as defined by Hermes I/F) or pseudo-RID (as defined by WCI)
2137*
2138*.RETURNS
2139*	HCF_SUCCESS
2140*!!	via cmd_exe
2141*	HCF_ERR_NO_NIC 		NIC removed during data retrieval
2142*	HCF_ERR_TIME_OUT	Expected F/W event did not occur in time
2143*	HCF_ERR_DEFUNCT_...
2144*!!	via download				CFG_DLNV_START <= type <= CFG_DL_STOP
2145*!!	via put_info				CFG_RID_CFG_MIN <= type <= CFG_RID_CFG_MAX
2146*!!	via put_frag
2147*
2148*.DESCRIPTION
2149* The L-field of the LTV-record (provided by the MSF in parameter ltvp) specifies the size of the buffer.
2150* The L-value includes the size of the T-field, but not the size of the L-field.
2151* The T- field specifies the RID placed in the V-field by the MSF.
2152*
2153* Not all CFG-codes can be used for hcf_put_info.  The following CFG-codes are valid for hcf_put_info:
2154* o One of the CFG-codes in the group "Network Parameters, Static Configuration Entities"
2155* Changes made by hcf_put_info to CFG_codes in this group will not affect the F/W
2156* and HCF behavior until hcf_cntl_port( HCF_PORT_ENABLE) is called.
2157* o One of the CFG-codes in the group "Network Parameters, Dynamic Configuration Entities"
2158* Changes made by hcf_put_info to CFG_codes will affect the F/W and HCF behavior immediately.
2159* o CFG_PROG.
2160* This code is used to initiate and terminate the process to download data either to
2161* volatile or to non-volatile RAM on the NIC as well as for the actual download.
2162* o CFG-codes related to the HCF behavior.
2163* The related CFG-codes are:
2164*  - CFG_REG_MB
2165*  - CFG_REG_ASSERT_RTNP
2166*  - CFG_REG_INFO_LOG
2167*  - CFG_CMD_NIC
2168*  - CFG_CMD_DONGLE
2169*  - CFG_CMD_HCF
2170*  - CFG_NOTIFY
2171*
2172* All LTV-records "unknown" to the HCF are forwarded to the F/W.
2173*
2174* Assert fails if
2175* - ifbp has a recognizable out-of-range value.
2176* - ltvp is a NULL pointer.
2177* - hcf_put_info was called without prior call to hcf_connect
2178* - type field of the LTV-record is invalid, i.e. neither HCF nor F/W can handle the value.
2179* - length field of the LTV-record at entry is less than 1 or exceeds MAX_LTV_SIZE.
2180* - registering a MailBox with size less than 60 or a non-aligned buffer address is used.
2181* - reentrancy, may be  caused by calling hcf_functions without adequate protection against
2182*	NIC interrupts or multi-threading.
2183*
2184*.DIAGRAM
2185*
2186*.NOTICE
2187*	Remarks:  In case of Hermes Configuration LTVs, the codes for the type are "cleverly" chosen to be
2188*	identical to the RID. Hermes Configuration information is copied from the provided data structure into the
2189*	Card.
2190*	In case of HCF Configuration LTVs, the type values are chosen in a range which does not overlap the
2191*	RID-range.
2192*
2193*20:
2194*
2195*.ENDDOC				END DOCUMENTATION
2196*
2197************************************************************************************************************/
2198
2199int
2200hcf_put_info( IFBP ifbp, LTVP ltvp )
2201{
2202int rc = HCF_SUCCESS;
2203
2204	HCFLOGENTRY( HCF_TRACE_PUT_INFO, ltvp->typ )
2205	HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
2206	HCFASSERT_INT
2207	HCFASSERT( ltvp, 0 )
2208	HCFASSERT( 1 < ltvp->len && ltvp->len <= HCF_MAX_LTV + 1, ltvp->len )
2209
2210											//all codes between 0xFA00 and 0xFCFF are passed to Hermes
2211#if (HCF_TYPE) & HCF_TYPE_WPA
2212 {	hcf_16 i;
2213	hcf_32 FAR * key_p;
2214
2215	if ( ltvp->typ == CFG_ADD_TKIP_DEFAULT_KEY || ltvp->typ == CFG_ADD_TKIP_MAPPED_KEY ) {
2216		key_p = (hcf_32*)((CFG_ADD_TKIP_MAPPED_KEY_STRCT FAR *)ltvp)->tx_mic_key;
2217		i = TX_KEY;		//i.e. TxKeyIndicator == 1, KeyID == 0
2218		if ( ltvp->typ == CFG_ADD_TKIP_DEFAULT_KEY ) {
2219			key_p = (hcf_32*)((CFG_ADD_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)->tx_mic_key;
2220			i = CNV_LITTLE_TO_SHORT(((CFG_ADD_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)->tkip_key_id_info);
2221		}
2222		if ( i & TX_KEY ) {	/* TxKeyIndicator == 1
2223							   (either really set by MSF in case of DEFAULT or faked by HCF in case of MAPPED ) */
2224			ifbp->IFB_MICTxCntl = (hcf_16)( HFS_TX_CNTL_MIC | (i & KEY_ID )<<8 );
2225			ifbp->IFB_MICTxKey[0] = CNV_LONGP_TO_LITTLE( key_p );
2226			ifbp->IFB_MICTxKey[1] = CNV_LONGP_TO_LITTLE( (key_p+1) );
2227		}
2228		i = ( i & KEY_ID ) * 2;
2229		ifbp->IFB_MICRxKey[i]   = CNV_LONGP_TO_LITTLE( (key_p+2) );
2230		ifbp->IFB_MICRxKey[i+1] = CNV_LONGP_TO_LITTLE( (key_p+3) );
2231	}
2232#define P ((CFG_REMOVE_TKIP_DEFAULT_KEY_STRCT FAR *)ltvp)
2233	if ( ( ltvp->typ == CFG_REMOVE_TKIP_MAPPED_KEY )	||
2234		 ( ltvp->typ == CFG_REMOVE_TKIP_DEFAULT_KEY &&
2235		   ( (ifbp->IFB_MICTxCntl >> 8) & KEY_ID ) == CNV_SHORT_TO_LITTLE(P->tkip_key_id )
2236		 )
2237		) { ifbp->IFB_MICTxCntl = 0; }		//disable MIC-engine
2238#undef P
2239 }
2240#endif // HCF_TYPE_WPA
2241
2242	if ( ltvp->typ == CFG_PROG ) {
2243		rc = download( ifbp, (CFG_PROG_STRCT FAR *)ltvp );
2244	} else switch (ltvp->typ) {
2245#if (HCF_ASSERT) & HCF_ASSERT_RT_MSF_RTN
2246	  case CFG_REG_ASSERT_RTNP:											//Register MSF Routines
2247#define P ((CFG_REG_ASSERT_RTNP_STRCT FAR *)ltvp)
2248		ifbp->IFB_AssertRtn = P->rtnp;
2249//		ifbp->IFB_AssertLvl = P->lvl;		//TODO not yet supported so default is set in hcf_connect
2250		HCFASSERT( DO_ASSERT, MERGE_2( HCF_ASSERT, 0xCAF1 ) )	//just to proof that the complete assert machinery is working
2251#undef P
2252		break;
2253#endif // HCF_ASSERT_RT_MSF_RTN
2254#if (HCF_EXT) & HCF_EXT_INFO_LOG
2255	  case CFG_REG_INFO_LOG:											//Register Log filter
2256		ifbp->IFB_RIDLogp = ((CFG_RID_LOG_STRCT FAR*)ltvp)->recordp;
2257		break;
2258#endif // HCF_EXT_INFO_LOG
2259	  case CFG_CNTL_OPT:												//overrule option
2260		HCFASSERT( ( ltvp->val[0] & ~(USE_DMA | USE_16BIT) ) == 0, ltvp->val[0] )
2261		if ( ( ltvp->val[0] & USE_DMA ) == 0 ) ifbp->IFB_CntlOpt &= ~USE_DMA;
2262		ifbp->IFB_CntlOpt |=  ltvp->val[0] & USE_16BIT;
2263		break;
2264#if (HCF_EXT) & HCF_EXT_MB
2265	  case CFG_REG_MB:													//Register MailBox
2266#define P ((CFG_REG_MB_STRCT FAR *)ltvp)
2267		HCFASSERT( ( (hcf_32)P->mb_addr & 0x0001 ) == 0, (hcf_32)P->mb_addr )
2268		HCFASSERT( (P)->mb_size >= 60, (P)->mb_size )
2269		ifbp->IFB_MBp = P->mb_addr;
2270		/* if no MB present, size must be 0 for ;?the old;? put_info_mb to work correctly */
2271		ifbp->IFB_MBSize = ifbp->IFB_MBp == NULL ? 0 : P->mb_size;
2272		ifbp->IFB_MBWp = ifbp->IFB_MBRp	= 0;
2273		ifbp->IFB_MBp[0] = 0;											//flag the MailBox as empty
2274		ifbp->IFB_MBInfoLen = 0;
2275		HCFASSERT( ifbp->IFB_MBSize >= 60 || ifbp->IFB_MBp == NULL, ifbp->IFB_MBSize )
2276#undef P
2277		break;
2278	  case CFG_MB_INFO:													//store MailBoxInfoBlock
2279		rc = put_info_mb( ifbp, (CFG_MB_INFO_STRCT FAR *)ltvp );
2280		break;
2281#endif // HCF_EXT_MB
2282
2283#if (HCF_EXT) & HCF_EXT_NIC_ACCESS
2284	  case CFG_CMD_NIC:
2285#define P ((CFG_CMD_NIC_STRCT FAR *)ltvp)
2286		OPW( HREG_PARAM_2, P->parm2 );
2287		OPW( HREG_PARAM_1, P->parm1 );
2288		rc = cmd_exe( ifbp, P->cmd, P->parm0 );
2289		P->hcf_stat = (hcf_16)rc;
2290		P->stat = IPW( HREG_STAT );
2291		P->resp0 = IPW( HREG_RESP_0 );
2292		P->resp1 = IPW( HREG_RESP_1 );
2293		P->resp2 = IPW( HREG_RESP_2 );
2294		P->ifb_err_cmd = ifbp->IFB_ErrCmd;
2295		P->ifb_err_qualifier = ifbp->IFB_ErrQualifier;
2296#undef P
2297		break;
2298	  case CFG_CMD_HCF:
2299#define P ((CFG_CMD_HCF_STRCT FAR *)ltvp)
2300		HCFASSERT( P->cmd == CFG_CMD_HCF_REG_ACCESS, P->cmd )		//only Hermes register access supported
2301		if ( P->cmd == CFG_CMD_HCF_REG_ACCESS ) {
2302			HCFASSERT( P->mode < ifbp->IFB_IOBase, P->mode )		//Check Register space
2303			OPW( P->mode, P->add_info);
2304		}
2305#undef P
2306		break;
2307#endif // HCF_EXT_NIC_ACCESS
2308
2309#if (HCF_ASSERT) & HCF_ASSERT_PRINTF
2310      case CFG_FW_PRINTF_BUFFER_LOCATION:
2311        ifbp->IFB_FwPfBuff = *(CFG_FW_PRINTF_BUFFER_LOCATION_STRCT*)ltvp;
2312        break;
2313#endif // HCF_ASSERT_PRINTF
2314
2315	  default:						//pass everything unknown above the "FID" range to the Hermes or Dongle
2316		rc = put_info( ifbp, ltvp );
2317	}
2318	//DO NOT !!! HCFASSERT( rc == HCF_SUCCESS, rc )												/* 20 */
2319	HCFLOGEXIT( HCF_TRACE_PUT_INFO )
2320	return rc;
2321} // hcf_put_info
2322
2323
2324#if HCF_DL_ONLY == 0
2325/************************************************************************************************************
2326*
2327*.MODULE		int hcf_rcv_msg( IFBP ifbp, DESC_STRCT *descp, unsigned int offset )
2328*.PURPOSE		All: decapsulate a message.
2329*				pre-HermesII.5: verify MIC.
2330*				non-USB, non-DMA mode: Transfer a message from the NIC to the Host and acknowledge reception.
2331*				USB: Transform a message from proprietary USB format to 802.3 format
2332*
2333*.ARGUMENTS
2334*	ifbp		address of the Interface Block
2335*	descp		Pointer to the Descriptor List location.
2336*	offset		USB: not used
2337*				non-USB: specifies the beginning of the data to be obtained (0 corresponds with DestAddr field
2338*				of frame).
2339*
2340*.RETURNS
2341*	HCF_SUCCESS			No SSN error ( or HCF_ERR_MIC already reported by hcf_service_nic)
2342*	HCF_ERR_MIC			message contains an erroneous MIC ( HCF_SUCCESS is reported if HCF_ERR_MIC is already
2343*						reported by hcf_service_nic)
2344* 	HCF_ERR_NO_NIC		NIC removed during data retrieval
2345* 	HCF_ERR_DEFUNCT...
2346*
2347*.DESCRIPTION
2348* The Receive Message Function can be executed by the MSF to obtain the Data Info fields of the message that
2349* is reported to be available by the Service NIC Function.
2350*
2351* The Receive Message Function copies the message data available in the Card memory into a buffer structure
2352* provided by the MSF.
2353* Only data of the message indicated by the Service NIC Function can be obtained.
2354* Execution of the Service NIC function may result in the availability of a new message, but it definitely
2355* makes the message reported by the preceding Service NIC function, unavailable.
2356*
2357* in non-USB/non-DMA mode, hcf_rcv_msg starts the copy process at the (non-negative) offset requested by the
2358* parameter offset, relative to HFS_ADDR_DEST, e.g offset 0 starts copying from the Destination Address, the
2359* very begin of the 802.3 frame message. Offset must either lay within the part of the 802.3 frame as stored
2360* by hcf_service_nic in the lookahead buffer or be just behind it, i.e. the first byte not yet read.
2361* When offset is within lookahead, data is copied from lookahead.
2362* When offset is beyond lookahead, data is read directly from RxFS in NIC with disregard of the actual value
2363* of offset
2364*
2365*.NOTICE:
2366* o at entry: look ahead buffer as passed with hcf_service_nic is still accessible and unchanged
2367* o at exit: Receive Frame in NIC memory is released
2368*
2369* Description:
2370* Starting at the byte indicated by the Offset value, the bytes are copied from the Data Info
2371* Part of the current Receive Frame Structure to the Host memory data buffer structure
2372* identified by descp.
2373* The maximum value for Offset is the number of characters of the 802.3 frame read into the
2374* look ahead buffer by hcf_service_nic (i.e. the look ahead buffer size minus
2375* Control and 802.11 fields)
2376* If Offset is less than the maximum value, copying starts from the look ahead buffer till the
2377* end of that buffer is reached
2378* Then (or if the maximum value is specified for Offset), the
2379* message is directly copied from NIC memory to Host memory.
2380* If an invalid (i.e. too large) offset is specified, an assert catches but the buffer contents are
2381* undefined.
2382* Copying stops if either:
2383* o the end of the 802.3 frame is reached
2384* o the Descriptor with a NULL pointer in the next_desc_addr field is reached
2385*
2386* When the copying stops, the receiver is ack'ed, thus freeing the NIC memory where the frame is stored
2387* As a consequence, hcf_rcv_msg can only be called once for any particular Rx frame.
2388*
2389* For the time being (PCI Bus mastering not yet supported), only the following fields of each
2390* of the descriptors in the descriptor list must be set by the MSF:
2391* o buf_cntl.buf_dim[1]
2392* o *next_desc_addr
2393* o *buf_addr
2394* At return from hcf_rcv_msg, the field buf_cntl.buf_dim[0] of the used Descriptors reflects
2395* the number of bytes in the buffer corresponding with the Descriptor.
2396* On the last used Descriptor, buf_cntl.buf_dim[0] is less or equal to buf_cntl.buf_dim[1].
2397* On all preceding Descriptors buf_cntl.buf_dim[0] is equal to buf_cntl.buf_dim[1].
2398* On all succeeding (unused) Descriptors, buf_cntl.buf_dim[0] is zero.
2399* Note: this I/F is based on the assumptions how the I/F needed for PCI Bus mastering will
2400* be, so it may change.
2401*
2402* The most likely handling of HCF_ERR_NO_NIC by the MSF is to drop the already copied
2403* data as elegantly as possible under the constraints and requirements posed by the (N)OS.
2404* If no received Frame Structure is pending, "Success" rather than "Read error" is returned.
2405* This error constitutes a logic flaw in the MSF
2406* The HCF can only catch a minority of this
2407* type of errors
2408* Based on consistency ideas, the HCF catches none of these errors.
2409*
2410* Assert fails if
2411* - ifbp has a recognizable out-of-range value
2412* - there is no unacknowledged Rx-message available
2413* - offset is out of range (outside look ahead buffer)
2414* - descp is a NULL pointer
2415* - any of the descriptors is not double word aligned
2416* - reentrancy, may be  caused by calling hcf_functions without adequate protection
2417* 	against NIC interrupts or multi-threading.
2418* - Interrupts are enabled.
2419*
2420*.DIAGRAM
2421*
2422*.NOTICE
2423* - by using unsigned int as type for offset, no need to worry about negative offsets
2424* - Asserting on being enabled/present is superfluous, since a non-zero IFB_lal implies that hcf_service_nic
2425*   was called and detected a Rx-message. A zero IFB_lal will set the BUF_CNT field of at least the first
2426*   descriptor to zero.
2427*
2428*.ENDDOC				END DOCUMENTATION
2429*
2430************************************************************************************************************/
2431int
2432hcf_rcv_msg( IFBP ifbp, DESC_STRCT *descp, unsigned int offset )
2433{
2434int			rc = HCF_SUCCESS;
2435wci_bufp	cp;										//char oriented working pointer
2436hcf_16		i;
2437int			tot_len = ifbp->IFB_RxLen - offset;		//total length
2438wci_bufp	lap = ifbp->IFB_lap + offset;			//start address in LookAhead Buffer
2439hcf_16		lal = ifbp->IFB_lal - offset;			//available data within LookAhead Buffer
2440hcf_16		j;
2441
2442	HCFLOGENTRY( HCF_TRACE_RCV_MSG, offset )
2443	HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
2444	HCFASSERT_INT
2445	HCFASSERT( descp, HCF_TRACE_RCV_MSG )
2446	HCFASSERT( ifbp->IFB_RxLen, HCF_TRACE_RCV_MSG )
2447	HCFASSERT( ifbp->IFB_RxLen >= offset, MERGE_2( offset, ifbp->IFB_RxLen ) )
2448	HCFASSERT( ifbp->IFB_lal >= offset, offset )
2449	HCFASSERT( (ifbp->IFB_CntlOpt & USE_DMA) == 0, 0xDADA )
2450
2451	if ( tot_len < 0 ) {
2452		lal = 0; tot_len = 0;				//suppress all copying activity in the do--while loop
2453	}
2454	do {									//loop over all available fragments
2455		// obnoxious hcf.c(1480) : warning C4769: conversion of near pointer to long integer
2456		HCFASSERT( ((hcf_32)descp & 3 ) == 0, (hcf_32)descp )
2457		cp = descp->buf_addr;
2458		j = min( (hcf_16)tot_len, descp->BUF_SIZE );	//minimum of "what's` available" and fragment size
2459		descp->BUF_CNT = j;
2460		tot_len -= j;						//adjust length still to go
2461		if ( lal ) {						//if lookahead Buffer not yet completely copied
2462			i = min( lal, j );				//minimum of "what's available" in LookAhead and fragment size
2463			lal -= i;						//adjust length still available in LookAhead
2464			j -= i;							//adjust length still available in current fragment
2465			/*;? while loop could be improved by moving words but that is complicated on platforms with
2466			 * alignment requirements*/
2467			while ( i-- ) *cp++ = *lap++;
2468		}
2469		if ( j ) {	//if LookAhead Buffer exhausted but still space in fragment, copy directly from NIC RAM
2470			get_frag( ifbp, cp, j BE_PAR(0) );
2471			CALC_RX_MIC( cp, j );
2472		}
2473	} while ( ( descp = descp->next_desc_addr ) != NULL );
2474#if (HCF_TYPE) & HCF_TYPE_WPA
2475	if ( ifbp->IFB_RxFID ) {
2476		rc = check_mic( ifbp );				//prevents MIC error report if hcf_service_nic already consumed all
2477	}
2478#endif // HCF_TYPE_WPA
2479	(void)hcf_action( ifbp, HCF_ACT_RX_ACK );		//only 1 shot to get the data, so free the resources in the NIC
2480	HCFASSERT( rc == HCF_SUCCESS, rc )
2481	HCFLOGEXIT( HCF_TRACE_RCV_MSG )
2482	return rc;
2483} // hcf_rcv_msg
2484#endif // HCF_DL_ONLY
2485
2486
2487#if HCF_DL_ONLY == 0
2488/************************************************************************************************************
2489*
2490*.MODULE		int hcf_send_msg( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
2491*.PURPOSE		Encapsulate a message and append padding and MIC.
2492*				non-USB: Transfers the resulting message from Host to NIC and initiates transmission.
2493*				USB: Transfer resulting message into a flat buffer.
2494*
2495*.ARGUMENTS
2496*	ifbp		address of the Interface Block
2497*	descp		pointer to the DescriptorList or NULL
2498*	tx_cntl		indicates MAC-port and (Hermes) options
2499*					HFS_TX_CNTL_SPECTRALINK
2500*					HFS_TX_CNTL_PRIO
2501*					HFS_TX_CNTL_TX_OK
2502*					HFS_TX_CNTL_TX_EX
2503*					HFS_TX_CNTL_TX_DELAY
2504*					HFS_TX_CNTL_TX_CONT
2505*					HCF_PORT_0				 MAC Port 0 (default)
2506*					HCF_PORT_1 (AP only)	 MAC Port 1
2507*					HCF_PORT_2 (AP only)	 MAC Port 2
2508*					HCF_PORT_3 (AP only)	 MAC Port 3
2509*					HCF_PORT_4 (AP only)	 MAC Port 4
2510*					HCF_PORT_5 (AP only)	 MAC Port 5
2511*					HCF_PORT_6 (AP only)	 MAC Port 6
2512*
2513*.RETURNS
2514*	HCF_SUCCESS
2515*	HCF_ERR_DEFUNCT_..
2516*	HCF_ERR_TIME_OUT
2517*
2518*.DESCRIPTION:
2519* The Send Message Function embodies 2 functions:
2520* o transfers a message (including MAC header) from the provided buffer structure in Host memory to the Transmit
2521* Frame Structure (TxFS) in NIC memory.
2522* o Issue a send command to the F/W to actually transmit the contents of the TxFS.
2523*
2524* Control is based on the Resource Indicator IFB_RscInd.
2525* The Resource Indicator is maintained by the HCF and should only be interpreted but not changed by the MSF.
2526* The MSF must check IFB_RscInd to be non-zero before executing the call to the Send Message Function.
2527* When no resources are available, the MSF must handle the queuing of the Transmit frame and check the
2528* Resource Indicator periodically after calling hcf_service_nic.
2529*
2530* The Send Message Functions transfers a message to NIC memory when it is called with a non-NULL descp.
2531* Before the Send Message Function is invoked this way, the Resource Indicator (IFB_RscInd) must be checked.
2532* If the Resource is not available, Send Message Function execution must be postponed until after processing of
2533* a next hcf_service_nic it appears that the Resource has become available.
2534* The message is copied from the buffer structure identified by descp to the NIC.
2535* Copying stops if a NULL pointer in the next_desc_addr field is reached.
2536* Hcf_send_msg does not check for transmit buffer overflow, because the F/W does this protection.
2537* In case of a transmit buffer overflow, the surplus which does not fit in the buffer is simply dropped.
2538*
2539* The Send Message Function activates the F/W to actually send the message to the medium when the
2540* HFS_TX_CNTL_TX_DELAY bit of the tx_cntl parameter is not set.
2541* If the descp parameter of the current call is non-NULL, the message as represented by descp is send.
2542* If the descp parameter of the current call is NULL, and if the preceding call of the Send Message Function had
2543* a non-NULL descp and the preceding call had the HFS_TX_CNTL_TX_DELAY bit of tx_cntl set, then the message as
2544* represented by the descp of the preceding call is send.
2545*
2546* Hcf_send_msg supports encapsulation (see HCF_ENCAP) of Ethernet-II frames.
2547* An Ethernet-II frame is transferred to the Transmit Frame structure as an 802.3 frame.
2548* Hcf_send_msg distinguishes between an 802.3 and an Ethernet-II frame by looking at the data length/type field
2549* of the frame. If this field contains a value larger than 1514, the frame is considered to be an Ethernet-II
2550* frame, otherwise it is treated as an 802.3 frame.
2551* To ease implementation of the HCF, this type/type field must be located in the first descriptor structure,
2552* i.e. the 1st fragment must have a size of at least 14 (to contain DestAddr, SrcAddr and Len/Type field).
2553* An Ethernet-II frame is encapsulated by inserting a SNAP header between the addressing information and the
2554* type field.  This insertion is transparent for the MSF.
2555* The HCF contains a fixed table that stores a number of types. If the value specified by the type/type field
2556* occurs in this table, Bridge Tunnel Encapsulation is used, otherwise RFC1042 encapsulation is used.
2557* Bridge Tunnel uses	AA AA 03 00 00 F8 as SNAP header,
2558* RFC1042 uses	AA AA 03 00 00 00 as SNAP header.
2559* The table currently contains:
2560* 0 0x80F3	AppleTalk Address Resolution Protocol (AARP)
2561* 0 0x8137	IPX
2562*
2563* The algorithm to distinguish between 802.3 and Ethernet-II frames limits the maximum length for frames of
2564* 802.3 frames to 1514 bytes.
2565* Encapsulation can be suppressed by means of the system constant HCF_ENCAP, e.g. to support proprietary
2566* protocols with 802.3 like frames with a size larger than 1514 bytes.
2567*
2568* In case the HCF encapsulates the frame, the number of bytes that is actually transmitted is determined by the
2569* cumulative value of the buf_cntl.buf_dim[0] fields.
2570* In case the HCF does not encapsulate the frame, the number of bytes that is actually transmitted is not
2571* determined by the cumulative value of the buf_cntl.buf_dim[DESC_CNTL_CNT] fields of the desc_strct's but by
2572* the Length field of the 802.3 frame.
2573* If there is a conflict between the cumulative value of the buf_cntl.buf_dim[0] fields and the
2574* 802.3 Length field the 802.3 Length field determines the number of bytes actually transmitted by the NIC while
2575* the cumulative value of the buf_cntl.buf_dim[0] fields determines the position of the MIC, hence a mismatch
2576* will result in MIC errors on the Receiving side.
2577* Currently this problem is flagged on the Transmit side by an Assert.
2578* The following fields of each of the descriptors in the descriptor list must be set by the MSF:
2579* o buf_cntl.buf_dim[0]
2580* o *next_desc_addr
2581* o *buf_addr
2582*
2583* All bits of the tx_cntl parameter except HFS_TX_CNTL_TX_DELAY and the HCF_PORT# bits are passed to the F/W via
2584* the HFS_TX_CNTL field of the TxFS.
2585*
2586* Note that hcf_send_msg does not detect NIC absence.  The MSF is supposed to have its own -platform dependent-
2587* way to recognize card removal/insertion.
2588* The total system must be robust against card removal and there is no principal difference between card removal
2589* just after hcf_send_msg returns but before the actual transmission took place or sometime earlier.
2590*
2591* Assert fails if
2592* - ifbp has a recognizable out-of-range value
2593* - descp is a NULL pointer
2594* - no resources for PIF available.
2595* - Interrupts are enabled.
2596* - reentrancy, may be  caused by calling hcf_functions without adequate protection
2597*	against NIC interrupts or multi-threading.
2598*
2599*.DIAGRAM
2600*4:	for the normal case (i.e. no HFS_TX_CNTL_TX_DELAY option active), a fid is acquired via the
2601*	routine get_fid.  If no FID is acquired, the remainder is skipped without an error notification.  After
2602*	all, the MSF is not supposed to call hcf_send_msg when no Resource is available.
2603*7:	The ControlField of the TxFS is written.  Since put_frag can only return the fatal Defunct or "No NIC", the
2604*	return status can be ignored because when it fails, cmd_wait will fail as well.  (see also the note on the
2605*	need for a return code below).
2606*	Note that HFS_TX_CNTL has different values for H-I, H-I/SSN and H-II and HFS_ADDR_DEST has different
2607*	values for H-I (regardless of SSN) and H-II.
2608*	By writing 17, 1 or 2 ( implying 16, 0 or 1 garbage word after HFS_TX_CNTL) the BAP just gets to
2609*	HFS_ADDR_DEST for H-I, H-I/SSN and H-II respectively.
2610*10: if neither encapsulation nor MIC calculation is needed, splitting the first fragment in two does not
2611*	really help but it makes the flow easier to follow to do not optimize on this difference
2612*
2613*	hcf_send_msg checks whether the frame is an Ethernet-II rather than an "official" 802.3 frame.
2614*	The E-II check is based on the length/type field in the MAC header. If this field has a value larger than
2615*	1500, E-II is assumed. The implementation of this test fails if the length/type field is not in the first
2616*	descriptor.  If E-II is recognized, a SNAP header is inserted. This SNAP header represents either RFC1042
2617*	or Bridge-Tunnel encapsulation, depending on the return status of the support routine hcf_encap.
2618*
2619*.NOTICE
2620*	hcf_send_msg leaves the responsibility to only send messages on enabled ports at the MSF level.
2621*	This is considered the strategy which is sufficiently adequate for all "robust" MSFs, have the least
2622*	processor utilization and being still acceptable robust at the WCI !!!!!
2623*
2624*	hcf_send_msg does not NEED a return value to report NIC absence or removal during the execution of
2625*	hcf_send_msg(), because the MSF and higher layers must be able to cope anyway with the NIC being removed
2626*	after a successful completion of hcf_send_msg() but before the actual transmission took place.
2627*	To accommodate user expectations the current implementation does report NIC absence.
2628*	Defunct blocks all NIC access and will (also) be reported on a number of other calls.
2629*
2630*	hcf_send_msg does not check for transmit buffer overflow because the Hermes does this protection.
2631*	In case of a transmit buffer overflow, the surplus which does not fit in the buffer is simply dropped.
2632*	Note that this possibly results in the transmission of incomplete frames.
2633*
2634*	After some deliberation with F/W team, it is decided that - being in the twilight zone of not knowing
2635*	whether the problem at hand is an MSF bug, HCF buf, F/W bug, H/W malfunction or even something else - there
2636*	is no "best thing to do" in case of a failing send, hence the HCF considers the TxFID ownership to be taken
2637*	over by the F/W and hopes for an Allocate event in due time
2638*
2639*.ENDDOC				END DOCUMENTATION
2640*
2641************************************************************************************************************/
2642int
2643hcf_send_msg( IFBP ifbp, DESC_STRCT *descp, hcf_16 tx_cntl )
2644{
2645int			rc = HCF_SUCCESS;
2646DESC_STRCT	*p /* = descp*/;		//working pointer
2647hcf_16		len;					// total byte count
2648hcf_16		i;
2649
2650hcf_16		fid = 0;
2651
2652	HCFASSERT( ifbp->IFB_RscInd || descp == NULL, ifbp->IFB_RscInd )
2653	HCFASSERT( (ifbp->IFB_CntlOpt & USE_DMA) == 0, 0xDADB )
2654
2655	HCFLOGENTRY( HCF_TRACE_SEND_MSG, tx_cntl )
2656	HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
2657	HCFASSERT_INT
2658	/* obnoxious c:/hcf/hcf.c(1480) : warning C4769: conversion of near pointer to long integer,
2659	 * so skip */
2660	HCFASSERT( ((hcf_32)descp & 3 ) == 0, (hcf_32)descp )
2661#if HCF_ASSERT
2662{	int x = ifbp->IFB_FWIdentity.comp_id == COMP_ID_FW_AP ? tx_cntl & ~HFS_TX_CNTL_PORT : tx_cntl;
2663	HCFASSERT( (x & ~HCF_TX_CNTL_MASK ) == 0, tx_cntl )
2664}
2665#endif // HCF_ASSERT
2666
2667	if ( descp ) ifbp->IFB_TxFID = 0;				//cancel a pre-put message
2668
2669#if (HCF_EXT) & HCF_EXT_TX_CONT				// Continuous transmit test
2670	if ( tx_cntl == HFS_TX_CNTL_TX_CONT ) {
2671	 	fid = get_fid(ifbp);
2672	 	if (fid != 0 ) {
2673											//setup BAP to begin of TxFS
2674			(void)setup_bap( ifbp, fid, 0, IO_OUT );
2675											//copy all the fragments in a transparent fashion
2676		 	for ( p = descp; p; p = p->next_desc_addr ) {
2677			/* obnoxious warning C4769: conversion of near pointer to long integer */
2678				HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p )
2679				put_frag( ifbp, p->buf_addr, p->BUF_CNT BE_PAR(0) );
2680			}
2681			rc = cmd_exe( ifbp, HCMD_THESEUS | HCMD_BUSY | HCMD_STARTPREAMBLE, fid );
2682			if ( ifbp->IFB_RscInd == 0 ) {
2683				ifbp->IFB_RscInd = get_fid( ifbp );
2684			}
2685		}
2686											// een slecht voorbeeld doet goed volgen ;?
2687		HCFLOGEXIT( HCF_TRACE_SEND_MSG )
2688		return rc;
2689	}
2690#endif // HCF_EXT_TX_CONT
2691									/* the following initialization code is redundant for a pre-put message
2692									 * but moving it inside the "if fid" logic makes the merging with the
2693									 * USB flow awkward
2694									 */
2695#if (HCF_TYPE) & HCF_TYPE_WPA
2696	tx_cntl |= ifbp->IFB_MICTxCntl;
2697#endif // HCF_TYPE_WPA
2698	fid = ifbp->IFB_TxFID;
2699	if (fid == 0 && ( fid = get_fid( ifbp ) ) != 0 ) 		/* 4 */
2700			/* skip the next compound statement if:
2701			   - pre-put message or
2702			   - no fid available (which should never occur if the MSF adheres to the WCI)
2703			 */
2704	{		// to match the closing curly bracket of above "if" in case of HCF_TYPE_USB
2705											//calculate total length ;? superfluous unless CCX or Encapsulation
2706		len = 0;
2707		p = descp;
2708		do len += p->BUF_CNT; while ( ( p = p->next_desc_addr ) != NULL );
2709		p = descp;
2710//;?	HCFASSERT( len <= HCF_MAX_MSG, len )
2711/*7*/	(void)setup_bap( ifbp, fid, HFS_TX_CNTL, IO_OUT );
2712#if (HCF_TYPE) & HCF_TYPE_TX_DELAY
2713		HCFASSERT( ( descp != NULL ) ^ ( tx_cntl & HFS_TX_CNTL_TX_DELAY ), tx_cntl )
2714		if ( tx_cntl & HFS_TX_CNTL_TX_DELAY ) {
2715			tx_cntl &= ~HFS_TX_CNTL_TX_DELAY;		//!!HFS_TX_CNTL_TX_DELAY no longer available
2716			ifbp->IFB_TxFID = fid;
2717			fid = 0;								//!!fid no longer available, be careful when modifying code
2718		}
2719#endif // HCF_TYPE_TX_DELAY
2720		OPW( HREG_DATA_1, tx_cntl ) ;
2721		OPW( HREG_DATA_1, 0 );
2722#if ! ( (HCF_TYPE) & HCF_TYPE_CCX )
2723		HCFASSERT( p->BUF_CNT >= 14, p->BUF_CNT )
2724											/* assume DestAddr/SrcAddr/Len/Type ALWAYS contained in 1st fragment
2725											 * otherwise life gets too cumbersome for MIC and Encapsulation !!!!!!!!
2726		if ( p->BUF_CNT >= 14 ) {	alternatively: add a safety escape !!!!!!!!!!!! }	*/
2727#endif // HCF_TYPE_CCX
2728		CALC_TX_MIC( NULL, -1 );		//initialize MIC
2729/*10*/	put_frag( ifbp, p->buf_addr, HCF_DASA_SIZE BE_PAR(0) );	//write DA, SA with MIC calculation
2730		CALC_TX_MIC( p->buf_addr, HCF_DASA_SIZE );		//MIC over DA, SA
2731		CALC_TX_MIC( null_addr, 4 );		//MIC over (virtual) priority field
2732#if (HCF_TYPE) & HCF_TYPE_CCX
2733		//!!be careful do not use positive test on HCF_ACT_CCX_OFF, because IFB_CKIPStat is initially 0
2734		if(( ifbp->IFB_CKIPStat == HCF_ACT_CCX_ON ) ||
2735           ((GET_BUF_CNT(p) >= 20 )   && ( ifbp->IFB_CKIPStat == HCF_ACT_CCX_OFF ) &&
2736            (p->buf_addr[12] == 0xAA) && (p->buf_addr[13] == 0xAA) &&
2737            (p->buf_addr[14] == 0x03) && (p->buf_addr[15] == 0x00) &&
2738            (p->buf_addr[16] == 0x40) && (p->buf_addr[17] == 0x96) &&
2739            (p->buf_addr[18] == 0x00) && (p->buf_addr[19] == 0x00)))
2740        {
2741            i = HCF_DASA_SIZE;
2742
2743            OPW( HREG_DATA_1, CNV_SHORT_TO_BIG( len - i ));
2744
2745            /* need to send out the remainder of the fragment */
2746			put_frag( ifbp, &p->buf_addr[i], GET_BUF_CNT(p) - i BE_PAR(0) );
2747        }
2748        else
2749#endif // HCF_TYPE_CCX
2750		{
2751											//if encapsulation needed
2752#if HCF_ENCAP == HCF_ENC
2753											//write length (with SNAP-header,Type, without //DA,SA,Length ) no MIC calc.
2754			if ( ( snap_header[sizeof(snap_header)-1] = hcf_encap( &p->buf_addr[HCF_DASA_SIZE] ) ) != ENC_NONE ) {
2755				OPW( HREG_DATA_1, CNV_END_SHORT( len + (sizeof(snap_header) + 2) - ( 2*6 + 2 ) ) );
2756											//write splice with MIC calculation
2757				put_frag( ifbp, snap_header, sizeof(snap_header) BE_PAR(0) );
2758				CALC_TX_MIC( snap_header, sizeof(snap_header) );	//MIC over 6 byte SNAP
2759				i = HCF_DASA_SIZE;
2760			} else
2761#endif // HCF_ENC
2762			{
2763				OPW( HREG_DATA_1, *(wci_recordp)&p->buf_addr[HCF_DASA_SIZE] );
2764				i = 14;
2765			}
2766											//complete 1st fragment starting with Type with MIC calculation
2767			put_frag( ifbp, &p->buf_addr[i], p->BUF_CNT - i BE_PAR(0) );
2768			CALC_TX_MIC( &p->buf_addr[i], p->BUF_CNT - i );
2769		}
2770											//do the remaining fragments with MIC calculation
2771		while ( ( p = p->next_desc_addr ) != NULL ) {
2772			/* obnoxious c:/hcf/hcf.c(1480) : warning C4769: conversion of near pointer to long integer,
2773			 * so skip */
2774			HCFASSERT( ((hcf_32)p & 3 ) == 0, (hcf_32)p )
2775			put_frag( ifbp, p->buf_addr, p->BUF_CNT BE_PAR(0) );
2776			CALC_TX_MIC( p->buf_addr, p->BUF_CNT );
2777		}
2778											//pad message, finalize MIC calculation and write MIC to NIC
2779		put_frag_finalize( ifbp );
2780	}
2781	if ( fid ) {
2782/*16*/	rc = cmd_exe( ifbp, HCMD_BUSY | HCMD_TX | HCMD_RECL, fid );
2783		ifbp->IFB_TxFID = 0;
2784			/* probably this (i.e. no RscInd AND "HREG_EV_ALLOC") at this point in time occurs so infrequent,
2785			 * that it might just as well be acceptable to skip this
2786			 * "optimization" code and handle that additional interrupt once in a while
2787			 */
2788// 180 degree error in logic ;? #if ALLOC_15
2789/*20*/	if ( ifbp->IFB_RscInd == 0 ) {
2790			ifbp->IFB_RscInd = get_fid( ifbp );
2791		}
2792// #endif // ALLOC_15
2793	}
2794//	HCFASSERT( level::ifbp->IFB_RscInd, ifbp->IFB_RscInd )
2795	HCFLOGEXIT( HCF_TRACE_SEND_MSG )
2796	return rc;
2797} // hcf_send_msg
2798#endif // HCF_DL_ONLY
2799
2800
2801#if HCF_DL_ONLY == 0
2802/************************************************************************************************************
2803*
2804*.MODULE		int hcf_service_nic( IFBP ifbp, wci_bufp bufp, unsigned int len )
2805*.PURPOSE		Services (most) NIC events.
2806*				Provides received message
2807*				Provides status information.
2808*
2809*.ARGUMENTS
2810*	ifbp		address of the Interface Block
2811*  In non-DMA mode:
2812*	bufp		address of char buffer, sufficiently large to hold the first part of the RxFS up through HFS_TYPE
2813*	len			length in bytes of buffer specified by bufp
2814*				value between HFS_TYPE + 2 and HFS_ADDR_DEST + HCF_MAX_MSG
2815*
2816*.RETURNS
2817*	HCF_SUCCESS
2818*	HCF_ERR_MIC	message contains an erroneous MIC (only if frame fits completely in bufp)
2819*
2820*.DESCRIPTION
2821*
2822* MSF-accessible fields of Result Block
2823* - IFB_RxLen			0 or Frame size.
2824* - IFB_MBInfoLen		0 or the L-field of the oldest MBIB.
2825* - IFB_RscInd
2826* - IFB_HCF_Tallies		updated if a corresponding event occurred.
2827* - IFB_NIC_Tallies		updated if a Tally Info frame received from the NIC.
2828* - IFB_DmaPackets
2829* - IFB_TxFsStat
2830* - IFB_TxFsSwSup
2831* - IFB_LinkStat		reflects new link status or 0x0000 if no change relative to previous hcf_service_nic call.
2832or
2833* - IFB_LinkStat		link status, 0x8000 reflects change relative to previous hcf_service_nic call.
2834*
2835* When IFB_MBInfoLen is non-zero, at least one MBIB is available.
2836*
2837* IFB_RxLen	reflects the number of received bytes in 802.3 view (Including DestAddr, SrcAddr and Length,
2838* excluding MIC-padding, MIC and sum check) of active Rx Frame Structure. If no Rx Data s available, IFB_RxLen
2839* equals 0x0000.
2840* Repeated execution causes the Service NIC Function to provide information about subsequently received
2841* messages, irrespective whether a hcf_rcv_msg or hcf_action(HCF_ACT_RX) is performed in between.
2842*
2843* When IFB_RxLen is non-zero, a Received Frame Structure is available to be routed to the protocol stack.
2844* When Monitor Mode is not active, this is guaranteed to be an error-free non-WMP frame.
2845* In case of Monitor Mode, it may also be a frame with an error or a WMP frame.
2846* Erroneous frames have a non-zero error-sub field in the HFS_STAT field in the look ahead buffer.
2847*
2848* If a Receive message is available in NIC RAM, the Receive Frame Structure is (partly) copied from the NIC to
2849* the buffer identified by bufp.
2850* Copying stops either after len bytes or when the complete 802.3 frame is copied.
2851* During the copying the message is decapsulated (if appropriate).
2852* If the frame is read completely by hcf_service_nic (i.e. the frame fits completely in the lookahead buffer),
2853* the frame is automatically ACK'ed to the F/W and still available via the look ahead buffer and hcf_rcv_msg.
2854* Only if the frame is read completely by hcf_service_nic, hcf_service_nic checks the MIC and sets the return
2855* status accordingly.  In this case, hcf_rcv_msg does not check the MIC.
2856*
2857* The MIC calculation algorithm works more efficient if the length of the look ahead buffer is
2858* such that it fits exactly 4 n bytes of the 802.3 frame, i.e. len == HFS_ADDR_DEST + 4*n.
2859*
2860* The Service NIC Function supports the NIC event service handling process.
2861* It performs the appropriate actions to service the NIC, such that the event cause is eliminated and related
2862* information is saved.
2863* The Service NIC Function is executed by the MSF ISR or polling routine as first step to determine the event
2864* cause(s).  It is the responsibility of the MSF to perform all not directly NIC related interrupt service
2865* actions, e.g. in a PC environment this includes servicing the PIC, and managing the Processor Interrupt
2866* Enabling/Disabling.
2867* In case of a polled based system, the Service NIC Function must be executed "frequently".
2868* The Service NIC Function may have side effects related to the Mailbox and Resource Indicator (IFB_RscInd).
2869*
2870* hcf_service_nic returns:
2871* - The length of the data in the available MBIB (IFB_MBInfoLen)
2872* - Changes in the link status (IFB_LinkStat)
2873* - The length of the data in the available Receive Frame Structure (IFB_RxLen)
2874* - updated IFB_RscInd
2875* - Updated Tallies
2876*
2877* hcf_service_nic is presumed to neither interrupt other HCF-tasks nor to be interrupted by other HCF-tasks.
2878* A way to achieve this is to precede hcf_service_nic as well as all other HCF-tasks with a call to
2879* hcf_action to disable the card interrupts and, after all work is completed, with a call to hcf_action to
2880* restore (which is not necessarily the same as enabling) the card interrupts.
2881* In case of a polled environment, it is assumed that the MSF programmer is sufficiently familiar with the
2882* specific requirements of that environment to translate the interrupt strategy to a polled strategy.
2883*
2884* hcf_service_nic services the following Hermes events:
2885* - HREG_EV_INFO		Asynchronous Information Frame
2886* - HREG_EV_INFO_DROP	WMAC did not have sufficient RAM to build Unsolicited Information Frame
2887* - HREG_EV_TX_EXC		(if applicable, i.e. selected via HCF_EXT_INT_TX_EX bit of HCF_EXT)
2888* - HREG_EV_SLEEP_REQ	(if applicable, i.e. selected via HCF_DDS/HCF_CDS bit of HCF_SLEEP)
2889* ** in non_DMA mode
2890* - HREG_EV_ALLOC		Asynchronous part of Allocation/Reclaim completed while out of resources at
2891* 						completion of hcf_send_msg/notify
2892* - HREG_EV_RX			the detection of the availability of received messages
2893* 						including WaveLAN Management Protocol (WMP) message processing
2894* ** in DMA mode
2895* - HREG_EV_RDMAD
2896* - HREG_EV_TDMAD
2897*!! hcf_service_nic does not service the following Hermes events:
2898*!! 	HREG_EV_TX 			(the "OK" Tx Event) is no longer supported by the WCI, if it occurs it is unclear
2899*!! 						what the cause is, so no meaningful strategy is available. Not acking the bit is
2900*!! 						probably the best help that can be given to the debugger.
2901*!! 	HREG_EV_CMD			handled in cmd_wait.
2902*!! 	HREG_EV_FW_DMA 		(i.e. HREG_EV_RXDMA, HREG_EV_TXDMA and_EV_LPESC) are either not used or used
2903*!! 						between the F/W and the DMA engine.
2904*!! 	HREG_EV_ACK_REG_READY is only applicable for H-II (i.e. not HII.5 and up, see DAWA)
2905*
2906*	If, in non-DMA mode, a Rx message is available, its length is reflected by the IFB_RxLen field of the IFB.
2907*	This length reflects the data itself and the Destination Address, Source Address and DataLength/Type field
2908*	but not the SNAP-header in case of decapsulation by the HCF.  If no message is available, IFB_RxLen is
2909*	zero.  Former versions of the HCF handled WMP messages and supported a "monitor" mode in hcf_service_nic,
2910*	which deposited certain or all Rx messages in the MailBox. The responsibility to handle these frames is
2911*	moved to the MSF. The HCF offers as supports hcf_put_info with CFG_MB_INFO as parameter to emulate the old
2912* 	implementation under control of the MSF.
2913*
2914* **Rx Buffer free strategy
2915*	When hcf_service_nic reports the availability of a non-DMA message, the MSF can access that message by
2916*	means of hcf_rcv_msg. It must be prevented that the LAN Controller writes new data in the NIC buffer
2917*	before the MSF is finished with the current message. The NIC buffer is returned to the LAN Controller
2918*	when:
2919*	 - the complete frame fits in the lookahead buffer or
2920*	 - hcf_rcv_msg is called or
2921*	 - hcf_action with HCF_ACT_RX is called or
2922*	 - hcf_service_nic is called again
2923*	It can be reasoned that hcf_action( INT_ON ) should not be given before the MSF has completely processed
2924*	a reported Rx-frame. The reason is that the INT_ON action is guaranteed to cause a (Rx-)interrupt (the
2925*	MSF is processing a Rx-frame, hence the Rx-event bit in the Hermes register must be active). This
2926*	interrupt will cause hcf_service_nic to be called, which will cause the ack-ing of the "last" Rx-event
2927*	to the Hermes, causing the Hermes to discard the associated NIC RAM buffer.
2928* Assert fails if
2929* - ifbp is zero or other recognizable out-of-range value.
2930* - hcf_service_nic is called without a prior call to hcf_connect.
2931* - interrupts are enabled.
2932* - reentrancy, may be  caused by calling hcf_functions without adequate protection
2933*	against NIC interrupts or multi-threading.
2934*
2935*
2936*.DIAGRAM
2937*1:	IFB_LinkStat is cleared, if a LinkStatus frame is received, IFB_LinkStat will be updated accordingly
2938*	by isr_info.
2939or
2940*1:	IFB_LinkStat change indication is cleared. If a LinkStatus frame is received, IFB_LinkStat will be updated
2941*	accordingly by isr_info.
2942*2: IFB_RxLen must be cleared before the NIC presence check otherwise:
2943*	 -	this value may stay non-zero if the NIC is pulled out at an inconvenient moment.
2944*	 -	the RxAck on a zero-FID needs a zero-value for IFB_RxLen to work
2945*	 Note that as side-effect of the hcf_action call, the remainder of Rx related info is re-initialized as
2946*	 well.
2947*4:	In case of Defunct mode, the information supplied by Hermes is unreliable, so the body of
2948*	hcf_service_nic is skipped. Since hcf_cntl turns into a NOP if Primary or Station F/W is incompatible,
2949*	hcf_service_nic is also skipped in those cases.
2950*	To prevent that hcf_service_nic reports bogus information to the MSF with all - possibly difficult to
2951*	debug - undesirable side effects, it is paramount to check the NIC presence. In former days the presence
2952*	test was based on the Hermes register HREG_SW_0. Since in HCF_ACT_INT_OFF is choosen for strategy based on
2953*	HREG_EV_STAT, this is now also used in hcf_service_nic. The motivation to change strategy is partly
2954*	due to inconsistent F/W implementations with respect to HREG_SW_0 manipulation around reset and download.
2955*	Note that in polled environments Card Removal is not detected by INT_OFF which makes the check in
2956*	hcf_service_nic even more important.
2957*8:	The event status register of the Hermes is sampled
2958*	The assert checks for unexpected events ;?????????????????????????????????????.
2959*	 - HREG_EV_INFO_DROP is explicitly excluded from the acceptable HREG_EV_STAT bits because it indicates
2960*	   a too heavily loaded system.
2961*	 - HREG_EV_ACK_REG_READY is 0x0000 for H-I (and hopefully H-II.5)
2962*
2963*
2964*	HREG_EV_TX_EXC is accepted (via HREG_EV_TX_EXT) if and only if HCF_EXT_INT_TX_EX set in the HCF_EXT
2965*	definition at compile time.
2966*	The following activities are handled:
2967*	 -	Alloc events are handled by hcf_send_msg (and notify). Only if there is no "spare" resource, the
2968*		alloc event is superficially serviced by hcf_service_nic to create a pseudo-resource with value
2969*		0x001. This value is recognized by get_fid (called by hcf_send_msg and notify) where the real
2970*		TxFid is retrieved and the Hermes is acked and - hopefully - the "normal" case with a spare TxFid
2971*		in IFB_RscInd is restored.
2972*	 -	Info drop events are handled by incrementing a tally
2973*	 -	LinkEvent (including solicited and unsolicited tallies) are handled by procedure isr_info.
2974*	-	TxEx (if selected at compile time) is handled by copying the significant part of the TxFS
2975*		into the IFB for further processing by the MSF.
2976*		Note the complication of the zero-FID protection sub-scheme in DAWA.
2977*	Note, the Ack of all of above events is handled at the end of hcf_service_nic
2978*16: In case of  non-DMA ( either not compiled in or due to a run-time choice):
2979*	If an Rx-frame is available, first the FID of that frame is read, including the complication of the
2980*	zero-FID protection sub-scheme in DAWA. Note that such a zero-FID is acknowledged at the end of
2981*	hcf_service_nic and that this depends on the IFB_RxLen initialization in the begin of hcf_service_nic.
2982*	The Assert validates the HCF assumption about Hermes implementation upon which the range of
2983*	Pseudo-RIDs is based.
2984*	Then the control fields up to the start of the 802.3 frame are read from the NIC into the lookahead buffer.
2985*	The status field is converted to native Endianess.
2986*	The length is, after implicit Endianess conversion if needed, and adjustment for the 14 bytes of the
2987*	802.3 MAC header, stored in IFB_RxLen.
2988*	In MAC Monitor mode, 802.11 control frames with a TOTAL length of 14 are received, so without this
2989*	length adjustment, IFB_RxLen could not be used to distinguish these frames from "no frame".
2990*	No MIC calculation processes are associated with the reading of these Control fields.
2991*26: This length test feels like superfluous robustness against malformed frames, but it turned out to be
2992*	needed in the real (hostile) world.
2993*	The decapsulation check needs sufficient data to represent DA, SA, L, SNAP and Type which amounts to
2994*	22 bytes. In MAC Monitor mode, 802.11 control frames with a smaller length are received. To prevent
2995*	that the implementation goes haywire, a check on the length is needed.
2996*	The actual decapsulation takes place on the fly in the copying process by overwriting the SNAP header.
2997*	Note that in case of decapsulation the SNAP header is not passed to the MSF, hence IFB_RxLen must be
2998*	compensated for the SNAP header length.
2999*	The 22 bytes needed for decapsulation are (more than) sufficient for the exceptional handling of the
3000*	MIC algorithm of the L-field (replacing the 2 byte L-field with 4 0x00 bytes).
3001*30: The 12 in the no-SSN branch corresponds with the get_frag, the 2 with the IPW of the SSN branch
3002*32: If Hermes reported MIC-presence, than the MIC engine is initialized with the non-dummy MIC calculation
3003*	routine address and appropriate key.
3004*34: The 8 bytes after the DA, SA, L are read and it is checked whether decapsulation is needed i.e.:
3005*	  - the Hermes reported Tunnel encapsulation or
3006*	  - the Hermes reported 1042 Encapsulation and hcf_encap reports that the HCF would not have used
3007*		1042 as the encapsulation mechanism
3008*	Note that the first field of the RxFS in bufp has Native Endianess due to the conversion done by the
3009*	BE_PAR in get_frag.
3010*36: The Type field is the only word kept (after moving) of the just read 8 bytes, it is moved to the
3011*	L-field.  The original L-field and 6 byte SNAP header are discarded, so IFB_RxLen and buf_addr must
3012*	be adjusted by 8.
3013*40: Determine how much of the frame (starting with DA) fits in the Lookahead buffer, then read the not-yet
3014*	read data into the lookahead buffer.
3015*	If the lookahead buffer contains the complete message, check the MIC. The majority considered this
3016*	I/F more appropriate then have the MSF call hcf_get_data only to check the MIC.
3017*44: Since the complete message is copied from NIC RAM to PC RAM, the Rx can be acknowledged to the Hermes
3018*	to optimize the flow ( a better chance to get new Rx data in the next pass through hcf_service_nic ).
3019*	This acknowledgement can not be done via hcf_action( HCF_ACT_RX_ACK ) because this also clears
3020*	IFB_RxLEN thus corrupting the I/F to the MSF.
3021*;?: In case of DMA (compiled in and activated):
3022
3023
3024*54: Limiting the number of places where the F/W is acked (e.g. the merging of the Rx-ACK with the other
3025*	ACKs), is supposed to diminish the potential of race conditions in the F/W.
3026*	Note 1: The CMD event is acknowledged in cmd_cmpl
3027*	Note 2: HREG_EV_ACK_REG_READY is 0x0000 for H-I (and hopefully H-II.5)
3028*	Note 3: The ALLOC event is acknowledged in get_fid (except for the initialization flow)
3029*
3030*.NOTICE
3031* The Non-DMA HREG_EV_RX is handled different compared with the other F/W events.
3032* The HREG_EV_RX event is acknowledged by the first hcf_service_nic call after the
3033* hcf_service_nic call that reported the occurrence of this event.
3034* This acknowledgment
3035* makes the next Receive Frame Structure (if any) available.
3036* An updated IFB_RxLen
3037* field reflects this availability.
3038*
3039*.NOTICE
3040* The minimum size for Len must supply space for:
3041* -	an F/W dependent number of bytes of Control Info field including the 802.11 Header field
3042* -	Destination Address
3043* -	Source Address
3044* -	Length field
3045* -	[ SNAP Header]
3046* -	[ Ethernet-II Type]
3047* This results in 68 for Hermes-I and 80 for Hermes-II
3048* This way the minimum amount of information is available needed by the HCF to determine whether the frame
3049* must be decapsulated.
3050*.ENDDOC				END DOCUMENTATION
3051*
3052************************************************************************************************************/
3053int
3054hcf_service_nic( IFBP ifbp, wci_bufp bufp, unsigned int len )
3055{
3056
3057int			rc = HCF_SUCCESS;
3058hcf_16		stat;
3059wci_bufp	buf_addr;
3060hcf_16 		i;
3061
3062	HCFLOGENTRY( HCF_TRACE_SERVICE_NIC, ifbp->IFB_IntOffCnt )
3063	HCFASSERT( ifbp->IFB_Magic == HCF_MAGIC, ifbp->IFB_Magic )
3064	HCFASSERT_INT
3065
3066	ifbp->IFB_LinkStat = 0; // ;? to be obsoleted ASAP												/* 1*/
3067	ifbp->IFB_DSLinkStat &= ~CFG_LINK_STAT_CHANGE;													/* 1*/
3068	(void)hcf_action( ifbp, HCF_ACT_RX_ACK );														/* 2*/
3069	if ( ifbp->IFB_CardStat == 0 && ( stat = IPW( HREG_EV_STAT ) ) != 0xFFFF ) {					/* 4*/
3070/*		IF_NOT_DMA( HCFASSERT( !( stat & ~HREG_EV_BASIC_MASK, stat ) )
3071 *		IF_NOT_USE_DMA( HCFASSERT( !( stat & ~HREG_EV_BASIC_MASK, stat ) )
3072 *		IF_USE_DMA( HCFASSERT( !( stat & ~( HREG_EV_BASIC_MASK ^ ( HREG_EV_...DMA.... ), stat ) )
3073 */
3074																									/* 8*/
3075		if ( ifbp->IFB_RscInd == 0 && stat & HREG_EV_ALLOC ) { //Note: IFB_RscInd is ALWAYS 1 for DMA
3076			ifbp->IFB_RscInd = 1;
3077		}
3078		IF_TALLY( if ( stat & HREG_EV_INFO_DROP ) ifbp->IFB_HCF_Tallies.NoBufInfo++; )
3079#if (HCF_EXT) & HCF_EXT_INT_TICK
3080		if ( stat & HREG_EV_TICK ) {
3081			ifbp->IFB_TickCnt++;
3082		}
3083#endif // HCF_EXT_INT_TICK
3084		if ( stat & HREG_EV_INFO ) {
3085			isr_info( ifbp );
3086		}
3087#if (HCF_EXT) & HCF_EXT_INT_TX_EX
3088		if ( stat & HREG_EV_TX_EXT && ( i = IPW( HREG_TX_COMPL_FID ) ) != 0 /*DAWA*/ ) {
3089			DAWA_ZERO_FID( HREG_TX_COMPL_FID )
3090			(void)setup_bap( ifbp, i, 0, IO_IN );
3091			get_frag( ifbp, &ifbp->IFB_TxFsStat, HFS_SWSUP BE_PAR(1) );
3092		}
3093#endif // HCF_EXT_INT_TX_EX
3094//!rlav DMA engine will handle the rx event, not the driver
3095#if HCF_DMA
3096		if ( !( ifbp->IFB_CntlOpt & USE_DMA ) ) //!! be aware of the logical indentations
3097#endif // HCF_DMA
3098/*16*/	  if ( stat & HREG_EV_RX && ( ifbp->IFB_RxFID = IPW( HREG_RX_FID ) ) != 0 ) { //if 0 then DAWA_ACK
3099			HCFASSERT( bufp, len )
3100			HCFASSERT( len >= HFS_DAT + 2, len )
3101			DAWA_ZERO_FID( HREG_RX_FID )
3102			HCFASSERT( ifbp->IFB_RxFID < CFG_PROD_DATA, ifbp->IFB_RxFID)
3103			(void)setup_bap( ifbp, ifbp->IFB_RxFID, 0, IO_IN );
3104			get_frag( ifbp, bufp, HFS_ADDR_DEST BE_PAR(1) );
3105			ifbp->IFB_lap = buf_addr = bufp + HFS_ADDR_DEST;
3106			ifbp->IFB_RxLen = (hcf_16)(bufp[HFS_DAT_LEN] + (bufp[HFS_DAT_LEN+1]<<8) + 2*6 + 2);
3107/*26*/		if ( ifbp->IFB_RxLen >= 22 ) {		// convenient for MIC calculation (5 DWs + 1 "skipped" W)
3108												//.  get DA,SA,Len/Type and (SNAP,Type or 8 data bytes)
3109/*30*/			get_frag( ifbp, buf_addr, 22 BE_PAR(0) );
3110/*32*/			CALC_RX_MIC( bufp, -1 );		//.  initialize MIC
3111				CALC_RX_MIC( buf_addr, HCF_DASA_SIZE );	//.  MIC over DA, SA
3112				CALC_RX_MIC( null_addr, 4 );	//.  MIC over (virtual) priority field
3113				CALC_RX_MIC( buf_addr+14, 8 );	//.  skip Len, MIC over SNAP,Type or 8 data bytes)
3114				buf_addr += 22;
3115#if (HCF_TYPE) & HCF_TYPE_CCX
3116//!!be careful do not use positive test on HCF_ACT_CCX_OFF, because IFB_CKIPStat is initially 0
3117				if( ifbp->IFB_CKIPStat != HCF_ACT_CCX_ON  )
3118#endif // HCF_TYPE_CCX
3119				{
3120#if HCF_ENCAP == HCF_ENC
3121					HCFASSERT( len >= HFS_DAT + 2 + sizeof(snap_header), len )
3122/*34*/ 				i = *(wci_recordp)&bufp[HFS_STAT] & ( HFS_STAT_MSG_TYPE | HFS_STAT_ERR );
3123					if ( i == HFS_STAT_TUNNEL ||
3124						 ( i == HFS_STAT_1042 && hcf_encap( (wci_bufp)&bufp[HFS_TYPE] ) != ENC_TUNNEL ) ) {
3125												//.  copy E-II Type to 802.3 LEN field
3126/*36*/					bufp[HFS_LEN  ] = bufp[HFS_TYPE  ];
3127						bufp[HFS_LEN+1] = bufp[HFS_TYPE+1];
3128												//.  discard Snap by overwriting with data
3129						ifbp->IFB_RxLen -= (HFS_TYPE - HFS_LEN);
3130						buf_addr -= ( HFS_TYPE - HFS_LEN ); // this happens to bring us at a DW boundary of 36
3131					}
3132#endif // HCF_ENC
3133				}
3134			}
3135/*40*/		ifbp->IFB_lal = min( (hcf_16)(len - HFS_ADDR_DEST), ifbp->IFB_RxLen );
3136			i = ifbp->IFB_lal - ( buf_addr - ( bufp + HFS_ADDR_DEST ) );
3137			get_frag( ifbp, buf_addr, i BE_PAR(0) );
3138			CALC_RX_MIC( buf_addr, i );
3139#if (HCF_TYPE) & HCF_TYPE_WPA
3140			if ( ifbp->IFB_lal == ifbp->IFB_RxLen ) {
3141				rc = check_mic( ifbp );
3142			}
3143#endif // HCF_TYPE_WPA
3144/*44*/		if ( len - HFS_ADDR_DEST >= ifbp->IFB_RxLen ) {
3145				ifbp->IFB_RxFID = 0;
3146			} else { /* IFB_RxFID is cleared, so  you do not get another Rx_Ack at next entry of hcf_service_nic */
3147				stat &= (hcf_16)~HREG_EV_RX;	//don't ack Rx if processing not yet completed
3148			}
3149		}
3150		// in case of DMA: signal availability of rx and/or tx packets to MSF
3151		IF_USE_DMA( ifbp->IFB_DmaPackets |= stat & ( HREG_EV_RDMAD | HREG_EV_TDMAD ); )
3152		// rlav : pending HREG_EV_RDMAD or HREG_EV_TDMAD events get acknowledged here.
3153/*54*/	stat &= (hcf_16)~( HREG_EV_SLEEP_REQ | HREG_EV_CMD | HREG_EV_ACK_REG_READY | HREG_EV_ALLOC | HREG_EV_FW_DMA );
3154//a positive mask would be easier to understand /*54*/	stat &= (hcf_16)~( HREG_EV_SLEEP_REQ | HREG_EV_CMD | HREG_EV_ACK_REG_READY | HREG_EV_ALLOC | HREG_EV_FW_DMA );
3155		IF_USE_DMA( stat &= (hcf_16)~HREG_EV_RX; )
3156		if ( stat ) {
3157			DAWA_ACK( stat );	/*DAWA*/
3158		}
3159	}
3160	HCFLOGEXIT( HCF_TRACE_SERVICE_NIC )
3161	return rc;
3162} // hcf_service_nic
3163#endif // HCF_DL_ONLY
3164
3165
3166/************************************************************************************************************
3167************************** H C F   S U P P O R T   R O U T I N E S ******************************************
3168************************************************************************************************************/
3169
3170
3171/************************************************************************************************************
3172*
3173*.SUBMODULE		void calc_mic( hcf_32* p, hcf_32 m )
3174*.PURPOSE		calculate MIC on a quad byte.
3175*
3176*.ARGUMENTS
3177*	p			address of the MIC
3178*	m			32 bit value to be processed by the MIC calculation engine
3179*
3180*.RETURNS		N.A.
3181*
3182*.DESCRIPTION
3183* calc_mic is the implementation of the MIC algorithm. It is a monkey-see monkey-do copy of
3184* Michael::appendByte()
3185* of Appendix C of ..........
3186*
3187*
3188*.DIAGRAM
3189*
3190*.NOTICE
3191*.ENDDOC				END DOCUMENTATION
3192*
3193************************************************************************************************************/
3194
3195#if (HCF_TYPE) & HCF_TYPE_WPA
3196
3197#define ROL32( A, n ) ( ((A) << (n)) | ( ((A)>>(32-(n)))  & ( (1UL << (n)) - 1 ) ) )
3198#define ROR32( A, n ) ROL32( (A), 32-(n) )
3199
3200#define L	*p
3201#define R	*(p+1)
3202
3203void
3204calc_mic( hcf_32* p, hcf_32 m )
3205{
3206#if HCF_BIG_ENDIAN
3207	m = (m >> 16) | (m << 16);
3208#endif // HCF_BIG_ENDIAN
3209	L ^= m;
3210	R ^= ROL32( L, 17 );
3211	L += R;
3212	R ^= ((L & 0xff00ff00) >> 8) | ((L & 0x00ff00ff) << 8);
3213	L += R;
3214	R ^= ROL32( L, 3 );
3215	L += R;
3216	R ^= ROR32( L, 2 );
3217	L += R;
3218} // calc_mic
3219#undef R
3220#undef L
3221#endif // HCF_TYPE_WPA
3222
3223
3224
3225#if (HCF_TYPE) & HCF_TYPE_WPA
3226/************************************************************************************************************
3227*
3228*.SUBMODULE		void calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len )
3229*.PURPOSE		calculate MIC on a single fragment.
3230*
3231*.ARGUMENTS
3232*	ifbp		address of the Interface Block
3233*	bufp		(byte) address of buffer
3234*	len			length in bytes of buffer specified by bufp
3235*
3236*.RETURNS		N.A.
3237*
3238*.DESCRIPTION
3239* calc_mic_rx_frag ........
3240*
3241* The MIC is located in the IFB.
3242* The MIC is separate for Tx and Rx, thus allowing hcf_send_msg to occur between hcf_service_nic and
3243* hcf_rcv_msg.
3244*
3245*
3246*.DIAGRAM
3247*
3248*.NOTICE
3249*.ENDDOC				END DOCUMENTATION
3250*
3251************************************************************************************************************/
3252void
3253calc_mic_rx_frag( IFBP ifbp, wci_bufp p, int len )
3254{
3255static union { hcf_32 x32; hcf_16 x16[2]; hcf_8 x8[4]; } x;	//* area to accumulate 4 bytes input for MIC engine
3256int i;
3257
3258	if ( len == -1 ) {								//initialize MIC housekeeping
3259		i = *(wci_recordp)&p[HFS_STAT];
3260		/* i = CNV_SHORTP_TO_LITTLE(&p[HFS_STAT]); should not be neede to prevent alignment poroblems
3261		 * since len == -1 if and only if p is lookahaead buffer which MUST be word aligned
3262		 * to be re-investigated by NvR
3263		 */
3264
3265		if ( ( i & HFS_STAT_MIC ) == 0 ) {
3266			ifbp->IFB_MICRxCarry = 0xFFFF;			//suppress MIC calculation
3267		} else {
3268			ifbp->IFB_MICRxCarry = 0;
3269//*	Note that "coincidentally" the bit positions used in HFS_STAT
3270//*	correspond with the offset of the key in IFB_MICKey
3271			i = ( i & HFS_STAT_MIC_KEY_ID ) >> 10;	/* coincidentally no shift needed for i itself */
3272			ifbp->IFB_MICRx[0] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICRxKey[i  ]);
3273			ifbp->IFB_MICRx[1] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICRxKey[i+1]);
3274		}
3275	} else {
3276		if ( ifbp->IFB_MICRxCarry == 0 ) {
3277			x.x32 = CNV_LONGP_TO_LITTLE(p);
3278			p += 4;
3279			if ( len < 4 ) {
3280				ifbp->IFB_MICRxCarry = (hcf_16)len;
3281			} else {
3282				ifbp->IFB_MICRxCarry = 4;
3283				len -= 4;
3284			}
3285		} else while ( ifbp->IFB_MICRxCarry < 4 && len ) {		//note for hcf_16 applies: 0xFFFF > 4
3286			x.x8[ifbp->IFB_MICRxCarry++] = *p++;
3287			len--;
3288		}
3289		while ( ifbp->IFB_MICRxCarry == 4 ) {	//contrived so we have only 1 call to calc_mic so we could bring it in-line
3290			calc_mic( ifbp->IFB_MICRx, x.x32 );
3291			x.x32 = CNV_LONGP_TO_LITTLE(p);
3292			p += 4;
3293			if ( len < 4 ) {
3294				ifbp->IFB_MICRxCarry = (hcf_16)len;
3295			}
3296			len -= 4;
3297		}
3298	}
3299} // calc_mic_rx_frag
3300#endif // HCF_TYPE_WPA
3301
3302
3303#if (HCF_TYPE) & HCF_TYPE_WPA
3304/************************************************************************************************************
3305*
3306*.SUBMODULE		void calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len )
3307*.PURPOSE		calculate MIC on a single fragment.
3308*
3309*.ARGUMENTS
3310*	ifbp		address of the Interface Block
3311*	bufp		(byte) address of buffer
3312*	len			length in bytes of buffer specified by bufp
3313*
3314*.RETURNS		N.A.
3315*
3316*.DESCRIPTION
3317* calc_mic_tx_frag ........
3318*
3319* The MIC is located in the IFB.
3320* The MIC is separate for Tx and Rx, thus allowing hcf_send_msg to occur between hcf_service_nic and
3321* hcf_rcv_msg.
3322*
3323*
3324*.DIAGRAM
3325*
3326*.NOTICE
3327*.ENDDOC				END DOCUMENTATION
3328*
3329************************************************************************************************************/
3330void
3331calc_mic_tx_frag( IFBP ifbp, wci_bufp p, int len )
3332{
3333static union { hcf_32 x32; hcf_16 x16[2]; hcf_8 x8[4]; } x;	//* area to accumulate 4 bytes input for MIC engine
3334
3335														//if initialization request
3336	if ( len == -1 ) {
3337														//.  presume MIC calculation disabled
3338		ifbp->IFB_MICTxCarry = 0xFFFF;
3339														//.  if MIC calculation enabled
3340		if ( ifbp->IFB_MICTxCntl ) {
3341														//.  .  clear MIC carry
3342			ifbp->IFB_MICTxCarry = 0;
3343														//.  .  initialize MIC-engine
3344			ifbp->IFB_MICTx[0] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICTxKey[0]);	/*Tx always uses Key 0 */
3345			ifbp->IFB_MICTx[1] = CNV_LONG_TO_LITTLE(ifbp->IFB_MICTxKey[1]);
3346		}
3347														//else
3348	} else {
3349														//.  if MIC enabled (Tx) / if MIC present (Rx)
3350														//.  and no carry from previous calc_mic_frag
3351		if ( ifbp->IFB_MICTxCarry == 0 ) {
3352														//.  .  preset accu with 4 bytes from buffer
3353			x.x32 = CNV_LONGP_TO_LITTLE(p);
3354														//.  .  adjust pointer accordingly
3355			p += 4;
3356														//.  .  if buffer contained less then 4 bytes
3357			if ( len < 4 ) {
3358														//.  .  .  promote valid bytes in accu to carry
3359														//.  .  .  flag accu to contain incomplete double word
3360				ifbp->IFB_MICTxCarry = (hcf_16)len;
3361														//.  .  else
3362			} else {
3363														//.  .  .  flag accu to contain complete double word
3364				ifbp->IFB_MICTxCarry = 4;
3365														//.  .  adjust remaining buffer length
3366				len -= 4;
3367			}
3368														//.  else if MIC enabled
3369														//.  and if carry bytes from previous calc_mic_tx_frag
3370														//.  .  move (1-3) bytes from carry into accu
3371		} else while ( ifbp->IFB_MICTxCarry < 4 && len ) {		/* note for hcf_16 applies: 0xFFFF > 4 */
3372			x.x8[ifbp->IFB_MICTxCarry++] = *p++;
3373			len--;
3374		}
3375														//.  while accu contains complete double word
3376														//.  and MIC enabled
3377		while ( ifbp->IFB_MICTxCarry == 4 ) {
3378														//.  .  pass accu to MIC engine
3379			calc_mic( ifbp->IFB_MICTx, x.x32 );
3380														//.  .  copy next 4 bytes from buffer to accu
3381			x.x32 = CNV_LONGP_TO_LITTLE(p);
3382														//.  .  adjust buffer pointer
3383			p += 4;
3384														//.  .  if buffer contained less then 4 bytes
3385														//.  .  .  promote valid bytes in accu to carry
3386														//.  .  .  flag accu to contain incomplete double word
3387			if ( len < 4 ) {
3388				ifbp->IFB_MICTxCarry = (hcf_16)len;
3389			}
3390														//.  .  adjust remaining buffer length
3391			len -= 4;
3392		}
3393	}
3394} // calc_mic_tx_frag
3395#endif // HCF_TYPE_WPA
3396
3397
3398#if HCF_PROT_TIME
3399/************************************************************************************************************
3400*
3401*.SUBMODULE		void calibrate( IFBP ifbp )
3402*.PURPOSE		calibrates the S/W protection counter against the Hermes Timer tick.
3403*
3404*.ARGUMENTS
3405*	ifbp		address of the Interface Block
3406*
3407*.RETURNS		N.A.
3408*
3409*.DESCRIPTION
3410* calibrates the S/W protection counter against the Hermes Timer tick
3411* IFB_TickIni is the value used to initialize the S/W protection counter such that the expiration period
3412* more or less independent of the processor speed. If IFB_TickIni is not yet calibrated, it is done now.
3413* This calibration is "reasonably" accurate because the Hermes is in a quiet state as a result of the
3414* Initialize command.
3415*
3416*
3417*.DIAGRAM
3418*
3419*1:	IFB_TickIni is initialized at INI_TICK_INI by hcf_connect. If calibrate succeeds, IFB_TickIni is
3420*	guaranteed to be changed. As a consequence there will be only 1 shot at calibration (regardless of the
3421*	number of init calls) under normal circumstances.
3422*2:	Calibration is done HCF_PROT_TIME_CNT times. This diminish the effects of jitter and interference,
3423*	especially in a pre-emptive environment. HCF_PROT_TIME_CNT is in the range of 16 through 32 and derived
3424*	from the HCF_PROT_TIME specified by the MSF programmer. The divisor needed to scale HCF_PROT_TIME into the
3425*	16-32 range, is used as a multiplicator after the calibration, to scale the found value back to the
3426*	requested range. This way a compromise is achieved between accuracy and duration of the calibration
3427*	process.
3428*3:	Acknowledge the Timer Tick Event.
3429*	Each cycle is limited to at most INI_TICK_INI samples of the TimerTick status of the Hermes.
3430*	Since the start of calibrate is unrelated to the Hermes Internal Timer, the first interval may last from 0
3431*	to the normal interval, all subsequent intervals should be the full length of the Hermes Tick interval.
3432*	The Hermes Timer Tick is not reprogrammed by the HCF, hence it is running at the default of 10 k
3433*	microseconds.
3434*4:	If the Timer Tick Event is continuously up (prot_cnt still has the value INI_TICK_INI) or no Timer Tick
3435*	Event occurred before the protection counter expired, reset IFB_TickIni to INI_TICK_INI,
3436*	set the defunct bit of IFB_CardStat (thus rendering the Hermes inoperable) and exit the calibrate routine.
3437*8:	ifbp->IFB_TickIni is multiplied to scale the found value back to the requested range as explained under 2.
3438*
3439*.NOTICE
3440* o Although there are a number of viewpoints possible, calibrate() uses as error strategy that a single
3441*	failure of the Hermes TimerTick is considered fatal.
3442* o There is no hard and concrete time-out value defined for Hermes activities. The default 1 seconds is
3443*	believed to be sufficiently "relaxed" for real life and to be sufficiently short to be still useful in an
3444*	environment with humans.
3445* o Note that via IFB_DefunctStat time outs in cmd_wait and in hcfio_string block all Hermes access till the
3446*	next init so functions which call a mix of cmd_wait and hcfio_string only need to check the return status
3447*	of the last call
3448* o The return code is preset at Time out.
3449*	The additional complication that no calibrated value for the protection count can be assumed since
3450*	calibrate() does not yet have determined a calibrated value (a catch 22), is handled by setting the
3451*	initial value at INI_TICK_INI (by hcf_connect). This approach is considered safe, because:
3452*	  - the HCF does not use the pipeline mechanism of Hermes commands.
3453*	  - the likelihood of failure (the only time when protection count is relevant) is small.
3454*	  - the time will be sufficiently large on a fast machine (busy bit drops on good NIC before counter
3455*		expires)
3456*	  - the time will be sufficiently small on a slow machine (counter expires on bad NIC before the end user
3457*	  	switches the power off in despair
3458*	The time needed to wrap a 32 bit counter around is longer than many humans want to wait, hence the more or
3459*	less arbitrary value of 0x40000L is chosen, assuming it does not take too long on an XT and is not too
3460*	short on a scream-machine.
3461*
3462*.ENDDOC				END DOCUMENTATION
3463*
3464************************************************************************************************************/
3465HCF_STATIC void
3466calibrate( IFBP ifbp )
3467{
3468int		cnt = HCF_PROT_TIME_CNT;
3469hcf_32	prot_cnt;
3470
3471	HCFTRACE( ifbp, HCF_TRACE_CALIBRATE );
3472	if ( ifbp->IFB_TickIni == INI_TICK_INI ) {													/*1*/
3473		ifbp->IFB_TickIni = 0;																	/*2*/
3474			while ( cnt-- ) {
3475				prot_cnt = INI_TICK_INI;
3476				OPW( HREG_EV_ACK, HREG_EV_TICK );												/*3*/
3477				while ( (IPW( HREG_EV_STAT ) & HREG_EV_TICK) == 0 && --prot_cnt ) {
3478					ifbp->IFB_TickIni++;
3479				}
3480				if ( prot_cnt == 0 || prot_cnt == INI_TICK_INI ) {								/*4*/
3481					ifbp->IFB_TickIni = INI_TICK_INI;
3482					ifbp->IFB_DefunctStat = HCF_ERR_DEFUNCT_TIMER;
3483					ifbp->IFB_CardStat |= CARD_STAT_DEFUNCT;
3484					HCFASSERT( DO_ASSERT, prot_cnt )
3485				}
3486			}
3487		ifbp->IFB_TickIni <<= HCF_PROT_TIME_SHFT;												/*8*/
3488	}
3489	HCFTRACE( ifbp, HCF_TRACE_CALIBRATE | HCF_TRACE_EXIT );
3490} // calibrate
3491#endif // HCF_PROT_TIME
3492
3493
3494#if HCF_DL_ONLY == 0
3495#if (HCF_TYPE) & HCF_TYPE_WPA
3496/************************************************************************************************************
3497*
3498*.SUBMODULE		int check_mic( IFBP ifbp )
3499*.PURPOSE		verifies the MIC of a received non-USB frame.
3500*
3501*.ARGUMENTS
3502*	ifbp		address of the Interface Block
3503*
3504*.RETURNS
3505*	HCF_SUCCESS
3506*	HCF_ERR_MIC
3507*
3508*.DESCRIPTION
3509*
3510*
3511*.DIAGRAM
3512*
3513*4:	test whether or not a MIC is reported by the Hermes
3514*14: the calculated MIC and the received MIC are compared, the return status is set when there is a mismatch
3515*
3516*.NOTICE
3517*.ENDDOC				END DOCUMENTATION
3518*
3519************************************************************************************************************/
3520int
3521check_mic( IFBP ifbp )
3522{
3523int		rc = HCF_SUCCESS;
3524hcf_32 x32[2];				//* area to save rcvd 8 bytes MIC
3525
3526													//if MIC present in RxFS
3527	if ( *(wci_recordp)&ifbp->IFB_lap[-HFS_ADDR_DEST] & HFS_STAT_MIC ) {
3528	//or if ( ifbp->IFB_MICRxCarry != 0xFFFF )
3529		CALC_RX_MIC( mic_pad, 8 );					//.  process up to 3 remaining bytes of data and append 5 to 8 bytes of padding to MIC calculation
3530		get_frag( ifbp, (wci_bufp)x32, 8 BE_PAR(0));//.  get 8 byte MIC from NIC
3531													//.  if calculated and received MIC do not match
3532													//.  .  set status at HCF_ERR_MIC
3533/*14*/  if ( x32[0] != CNV_LITTLE_TO_LONG(ifbp->IFB_MICRx[0]) ||
3534        	 x32[1] != CNV_LITTLE_TO_LONG(ifbp->IFB_MICRx[1])	  ) {
3535			rc = HCF_ERR_MIC;
3536		}
3537	}
3538													//return status
3539	return rc;
3540} // check_mic
3541#endif // HCF_TYPE_WPA
3542#endif // HCF_DL_ONLY
3543
3544
3545/************************************************************************************************************
3546*
3547*.SUBMODULE		int cmd_cmpl( IFBP ifbp )
3548*.PURPOSE		waits for Hermes Command Completion.
3549*
3550*.ARGUMENTS
3551*	ifbp		address of the Interface Block
3552*
3553*.RETURNS
3554*	IFB_DefunctStat
3555*	HCF_ERR_TIME_OUT
3556*	HCF_ERR_DEFUNCT_CMD_SEQ
3557*	HCF_SUCCESS
3558*
3559*.DESCRIPTION
3560*
3561*
3562*.DIAGRAM
3563*
3564*2:	Once cmd_cmpl is called, the Busy option bit in IFB_Cmd must be cleared
3565*4:	If Status register and command code don't match either:
3566*	 - the Hermes and Host are out of sync ( a fatal error)
3567*	 - error bits are reported via the Status Register.
3568*	Out of sync is considered fatal and brings the HCF in Defunct mode
3569*	Errors reported via the Status Register should be caused by sequence violations in Hermes command
3570*	sequences and hence these bugs should have been found during engineering testing. Since there is no
3571*	strategy to cope with this problem, it might as well be ignored at run time. Note that for any particular
3572*	situation where a strategy is formulated to handle the consequences of a particular bug causing a
3573*	particular Error situation reported via the Status Register, the bug should be removed rather than adding
3574*	logic to cope with the consequences of the bug.
3575*	There have been HCF versions where an error report via the Status Register even brought the HCF in defunct
3576*	mode (although it was not yet named like that at that time). This is particular undesirable behavior for a
3577*	general library.
3578*	Simply reporting the error (as "interesting") is debatable. There also have been HCF versions with this
3579*	strategy using the "vague" HCF_FAILURE code.
3580*	The error is reported via:
3581*	 - MiscErr tally of the HCF Tally set
3582*	 - the (informative) fields IFB_ErrCmd and IFB_ErrQualifier
3583*	 - the assert mechanism
3584*8:	Here the Defunct case and the Status error are separately treated
3585*
3586*
3587*.ENDDOC				END DOCUMENTATION
3588*
3589************************************************************************************************************/
3590HCF_STATIC int
3591cmd_cmpl( IFBP ifbp )
3592{
3593
3594PROT_CNT_INI
3595int		rc = HCF_SUCCESS;
3596hcf_16	stat;
3597
3598	HCFLOGENTRY( HCF_TRACE_CMD_CPL, ifbp->IFB_Cmd )
3599	ifbp->IFB_Cmd &= ~HCMD_BUSY;												/* 2 */
3600	HCF_WAIT_WHILE( (IPW( HREG_EV_STAT) & HREG_EV_CMD) == 0 );					/* 4 */
3601	stat = IPW( HREG_STAT );
3602#if HCF_PROT_TIME
3603	if ( prot_cnt == 0 ) {
3604		IF_TALLY( ifbp->IFB_HCF_Tallies.MiscErr++; )
3605		rc = HCF_ERR_TIME_OUT;
3606		HCFASSERT( DO_ASSERT, ifbp->IFB_Cmd )
3607	} else
3608#endif // HCF_PROT_TIME
3609	{
3610		DAWA_ACK( HREG_EV_CMD );
3611/*4*/	if ( stat != (ifbp->IFB_Cmd & HCMD_CMD_CODE) ) {
3612/*8*/		if ( ( (stat ^ ifbp->IFB_Cmd ) & HCMD_CMD_CODE) != 0 ) {
3613				rc = ifbp->IFB_DefunctStat = HCF_ERR_DEFUNCT_CMD_SEQ;
3614				ifbp->IFB_CardStat |= CARD_STAT_DEFUNCT;
3615			}
3616			IF_TALLY( ifbp->IFB_HCF_Tallies.MiscErr++; )
3617			ifbp->IFB_ErrCmd = stat;
3618			ifbp->IFB_ErrQualifier = IPW( HREG_RESP_0 );
3619			HCFASSERT( DO_ASSERT, MERGE_2( IPW( HREG_PARAM_0 ), ifbp->IFB_Cmd ) )
3620			HCFASSERT( DO_ASSERT, MERGE_2( ifbp->IFB_ErrQualifier, ifbp->IFB_ErrCmd ) )
3621		}
3622	}
3623	HCFASSERT( rc == HCF_SUCCESS, rc)
3624	HCFLOGEXIT( HCF_TRACE_CMD_CPL )
3625	return rc;
3626} // cmd_cmpl
3627
3628
3629/************************************************************************************************************
3630*
3631*.SUBMODULE		int cmd_exe( IFBP ifbp, int cmd_code, int par_0 )
3632*.PURPOSE		Executes synchronous part of Hermes Command and - optionally - waits for Command Completion.
3633*
3634*.ARGUMENTS
3635*	ifbp		address of the Interface Block
3636*	cmd_code
3637*	par_0
3638*
3639*.RETURNS
3640*	IFB_DefunctStat
3641*	HCF_ERR_DEFUNCT_CMD_SEQ
3642*	HCF_SUCCESS
3643*	HCF_ERR_TO_BE_ADDED	<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
3644*
3645*.DESCRIPTION
3646* Executes synchronous Hermes Command and waits for Command Completion
3647*
3648* The general HCF strategy is to wait for command completion. As a consequence:
3649* - the read of the busy bit before writing the command register is superfluous
3650* - the Hermes requirement that no Inquiry command may be executed if there is still an unacknowledged
3651*	Inquiry command outstanding, is automatically met.
3652* The Tx command uses the "Busy" bit in the cmd_code parameter to deviate from this general HCF strategy.
3653* The idea is that by not busy-waiting on completion of this frequently used command the processor
3654* utilization is diminished while using the busy-wait on all other seldom used commands the flow is kept
3655* simple.
3656*
3657*
3658*
3659*.DIAGRAM
3660*
3661*1:	skip the body of cmd_exe when in defunct mode or when - based on the S/W Support register write and
3662*	read back test - there is apparently no NIC.
3663*	Note: we gave up on the "old" strategy to write the S/W Support register at magic only when needed. Due to
3664*	the intricateness of Hermes F/W varieties ( which behave differently as far as corruption of the S/W
3665*	Support register is involved), the increasing number of Hermes commands which do an implicit initialize
3666*	(thus modifying the S/W Support register) and the workarounds of some OS/Support S/W induced aspects (e.g.
3667*	the System Soft library at WinNT which postpones the actual mapping of I/O space up to 30 seconds after
3668*	giving the go-ahead), the "magic" strategy is now reduced to a simple write and read back. This means that
3669*	problems like a bug tramping over the memory mapped Hermes registers will no longer be noticed as side
3670*	effect of the S/W Support register check.
3671*2:	check whether the preceding command skipped the busy wait and if so, check for command completion
3672*
3673*.NOTICE
3674*.ENDDOC				END DOCUMENTATION
3675*
3676************************************************************************************************************/
3677
3678HCF_STATIC int
3679cmd_exe( IFBP ifbp, hcf_16 cmd_code, hcf_16 par_0 )	//if HCMD_BUSY of cmd_code set, then do NOT wait for completion
3680{
3681int rc;
3682
3683	HCFLOGENTRY( HCF_TRACE_CMD_EXE, cmd_code )
3684	HCFASSERT( (cmd_code & HCMD_CMD_CODE) != HCMD_TX || cmd_code & HCMD_BUSY, cmd_code ) //Tx must have Busy bit set
3685	OPW( HREG_SW_0, HCF_MAGIC );
3686	if ( IPW( HREG_SW_0 ) == HCF_MAGIC ) {														/* 1 */
3687		rc = ifbp->IFB_DefunctStat;
3688	}
3689	else rc = HCF_ERR_NO_NIC;
3690	if ( rc == HCF_SUCCESS ) {
3691		//;?is this a hot idea, better MEASURE performance impact
3692/*2*/	if ( ifbp->IFB_Cmd & HCMD_BUSY ) {
3693			rc = cmd_cmpl( ifbp );
3694		}
3695		OPW( HREG_PARAM_0, par_0 );
3696		OPW( HREG_CMD, cmd_code &~HCMD_BUSY );
3697		ifbp->IFB_Cmd = cmd_code;
3698		if ( (cmd_code & HCMD_BUSY) == 0 ) {	//;?is this a hot idea, better MEASURE performance impact
3699			rc = cmd_cmpl( ifbp );
3700		}
3701	}
3702	HCFASSERT( rc == HCF_SUCCESS, MERGE_2( rc, cmd_code ) )
3703	HCFLOGEXIT( HCF_TRACE_CMD_EXE )
3704	return rc;
3705} // cmd_exe
3706
3707
3708/************************************************************************************************************
3709*
3710*.SUBMODULE		int download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp )
3711*.PURPOSE		downloads F/W image into NIC and initiates execution of the downloaded F/W.
3712*
3713*.ARGUMENTS
3714*	ifbp		address of the Interface Block
3715*	ltvp		specifies the pseudo-RID (as defined by WCI)
3716*
3717*.RETURNS
3718*
3719*.DESCRIPTION
3720*
3721*
3722*.DIAGRAM
3723*1:	First, Ack everything to unblock a (possibly) blocked cmd pipe line
3724*	Note 1: it is very likely that an Alloc event is pending and very well possible that a (Send) Cmd event is
3725*	pending
3726*	Note 2: it is assumed that this strategy takes away the need to ack every conceivable event after an
3727*	Hermes Initialize
3728*
3729*
3730*.ENDDOC				END DOCUMENTATION
3731*
3732************************************************************************************************************/
3733HCF_STATIC int
3734download( IFBP ifbp, CFG_PROG_STRCT FAR *ltvp )						//Hermes-II download (volatile only)
3735{
3736hcf_16				i;
3737int					rc = HCF_SUCCESS;
3738wci_bufp			cp;
3739hcf_io				io_port = ifbp->IFB_IOBase + HREG_AUX_DATA;
3740
3741	HCFLOGENTRY( HCF_TRACE_DL, ltvp->typ )
3742#if (HCF_TYPE) & HCF_TYPE_PRELOADED
3743	HCFASSERT( DO_ASSERT, ltvp->mode )
3744#else
3745													//if initial "program" LTV
3746	if ( ifbp->IFB_DLMode == CFG_PROG_STOP && ltvp->mode == CFG_PROG_VOLATILE) {
3747													//.  switch Hermes to initial mode
3748/*1*/	OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ );
3749		rc = cmd_exe( ifbp, HCMD_INI, 0 );	/* HCMD_INI can not be part of init() because that is called on
3750											 * other occasions as well */
3751		rc = init( ifbp );
3752	}
3753													//if final "program" LTV
3754	if ( ltvp->mode == CFG_PROG_STOP && ifbp->IFB_DLMode == CFG_PROG_VOLATILE) {
3755													//.  start tertiary (or secondary)
3756		OPW( HREG_PARAM_1, (hcf_16)(ltvp->nic_addr >> 16) );
3757		rc = cmd_exe( ifbp, HCMD_EXECUTE, (hcf_16) ltvp->nic_addr );
3758		if (rc == HCF_SUCCESS) {
3759			rc = init( ifbp );	/*;? do we really want to skip init if cmd_exe failed, i.e.
3760								 *	 IFB_FW_Comp_Id is than possibly incorrect */
3761	  	}
3762													//else (non-final)
3763	} else {
3764													//.  if mode == Readback SEEPROM
3765		{											//.  .  get number of words to program
3766			HCFASSERT( ltvp->segment_size, *ltvp->host_addr )
3767			i = ltvp->segment_size/2;
3768													//.  .  copy data (words) from LTV via AUX port to NIC
3769			cp = (wci_bufp)ltvp->host_addr;						//OUT_PORT_STRING_8_16 macro may modify its parameters
3770													//.  .  if mode == volatile programming
3771			if ( ltvp->mode == CFG_PROG_VOLATILE ) {
3772													//.  .  .  set up NIC RAM addressability via AUX port
3773				OPW( HREG_AUX_PAGE, (hcf_16)(ltvp->nic_addr >> 16 << 9 | (ltvp->nic_addr & 0xFFFF) >> 7 ) );
3774				OPW( HREG_AUX_OFFSET, (hcf_16)(ltvp->nic_addr & 0x007E) );
3775				OUT_PORT_STRING_8_16( io_port, cp, i );		//!!!WORD length, cp MUST be a char pointer
3776			}
3777		}
3778	}
3779	ifbp->IFB_DLMode = ltvp->mode;					//save state in IFB_DLMode
3780#endif // HCF_TYPE_PRELOADED
3781	HCFASSERT( rc == HCF_SUCCESS, rc )
3782	HCFLOGEXIT( HCF_TRACE_DL )
3783	return rc;
3784} // download
3785
3786
3787#if (HCF_ASSERT) & HCF_ASSERT_PRINTF
3788/**************************************************
3789* Certain Hermes-II firmware versions can generate
3790* debug information. This debug information is
3791* contained in a buffer in nic-RAM, and can be read
3792* via the aux port.
3793**************************************************/
3794HCF_STATIC int
3795fw_printf(IFBP ifbp, CFG_FW_PRINTF_STRCT FAR *ltvp)
3796{
3797    int rc = HCF_SUCCESS;
3798    hcf_16 fw_cnt;
3799//    hcf_32 DbMsgBuffer = 0x29D2, DbMsgCount= 0x000029D0;
3800//    hcf_16 DbMsgSize=0x00000080;
3801    hcf_32 DbMsgBuffer;
3802    CFG_FW_PRINTF_BUFFER_LOCATION_STRCT *p = &ifbp->IFB_FwPfBuff;
3803    ltvp->len = 1;
3804    if ( p->DbMsgSize != 0 ) {
3805        // first, check the counter in nic-RAM and compare it to the latest counter value of the HCF
3806        OPW( HREG_AUX_PAGE, (hcf_16)(p->DbMsgCount >> 7) );
3807        OPW( HREG_AUX_OFFSET, (hcf_16)(p->DbMsgCount & 0x7E) );
3808        fw_cnt = ((IPW( HREG_AUX_DATA) >>1 ) & ((hcf_16)p->DbMsgSize - 1));
3809        if ( fw_cnt != ifbp->IFB_DbgPrintF_Cnt ) {
3810//    DbgPrint("fw_cnt=%d IFB_DbgPrintF_Cnt=%d\n", fw_cnt, ifbp->IFB_DbgPrintF_Cnt);
3811            DbMsgBuffer = p->DbMsgBuffer + ifbp->IFB_DbgPrintF_Cnt * 6; // each entry is 3 words
3812            OPW( HREG_AUX_PAGE, (hcf_16)(DbMsgBuffer >> 7) );
3813            OPW( HREG_AUX_OFFSET, (hcf_16)(DbMsgBuffer & 0x7E) );
3814            ltvp->msg_id     = IPW(HREG_AUX_DATA);
3815            ltvp->msg_par    = IPW(HREG_AUX_DATA);
3816            ltvp->msg_tstamp = IPW(HREG_AUX_DATA);
3817            ltvp->len = 4;
3818            ifbp->IFB_DbgPrintF_Cnt++;
3819            ifbp->IFB_DbgPrintF_Cnt &= (p->DbMsgSize - 1);
3820        }
3821    }
3822    return rc;
3823};
3824#endif // HCF_ASSERT_PRINTF
3825
3826
3827#if HCF_DL_ONLY == 0
3828/************************************************************************************************************
3829*
3830*.SUBMODULE		hcf_16 get_fid( IFBP ifbp )
3831*.PURPOSE		get allocated FID for either transmit or notify.
3832*
3833*.ARGUMENTS
3834*	ifbp		address of the Interface Block
3835*
3836*.RETURNS
3837*	0	no FID available
3838*	<>0	FID number
3839*
3840*.DESCRIPTION
3841*
3842*
3843*.DIAGRAM
3844*	The preference is to use a "pending" alloc. If no alloc is pending, then - if available - the "spare" FID
3845*	is used.
3846*	If the spare FID is used, IFB_RscInd (representing the spare FID) must be cleared
3847*	If the pending alloc is used, the alloc event must be acknowledged to the Hermes.
3848*	In case the spare FID was depleted and the IFB_RscInd has been "faked" as pseudo resource with a 0x0001
3849*	value by hcf_service_nic, IFB_RscInd has to be "corrected" again to its 0x0000 value.
3850*
3851*	Note that due to the Hermes-II H/W problems which are intended to be worked around by DAWA, the Alloc bit
3852*	in the Event register is no longer a reliable indication of the presence/absence of a FID. The "Clear FID"
3853*	part of the DAWA logic, together with the choice of the definition of the return information from get_fid,
3854*	handle this automatically, i.e. without additional code in get_fid.
3855*.ENDDOC				END DOCUMENTATION
3856*
3857************************************************************************************************************/
3858HCF_STATIC hcf_16
3859get_fid( IFBP ifbp )
3860{
3861
3862hcf_16 fid = 0;
3863#if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
3864PROT_CNT_INI
3865#endif // HCF_TYPE_HII5
3866
3867	IF_DMA( HCFASSERT(!(ifbp->IFB_CntlOpt & USE_DMA), ifbp->IFB_CntlOpt) )
3868
3869	if ( IPW( HREG_EV_STAT) & HREG_EV_ALLOC) {
3870		fid = IPW( HREG_ALLOC_FID );
3871		HCFASSERT( fid, ifbp->IFB_RscInd )
3872		DAWA_ZERO_FID( HREG_ALLOC_FID )
3873#if ( (HCF_TYPE) & HCF_TYPE_HII5 ) == 0
3874		HCF_WAIT_WHILE( ( IPW( HREG_EV_STAT ) & HREG_EV_ACK_REG_READY ) == 0 );
3875		HCFASSERT( prot_cnt, IPW( HREG_EV_STAT ) )
3876#endif // HCF_TYPE_HII5
3877		DAWA_ACK( HREG_EV_ALLOC );			//!!note that HREG_EV_ALLOC is written only once
3878// 180 degree error in logic ;? #if ALLOC_15
3879		if ( ifbp->IFB_RscInd == 1 ) {
3880			ifbp->IFB_RscInd = 0;
3881		}
3882//#endif // ALLOC_15
3883	} else {
3884// 180 degree error in logic ;? #if ALLOC_15
3885		fid = ifbp->IFB_RscInd;
3886//#endif // ALLOC_15
3887		ifbp->IFB_RscInd = 0;
3888	}
3889	return fid;
3890} // get_fid
3891#endif // HCF_DL_ONLY
3892
3893
3894/************************************************************************************************************
3895*
3896*.SUBMODULE		void get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
3897*.PURPOSE		reads with 16/32 bit I/O via BAP1 port from NIC RAM to Host memory.
3898*
3899*.ARGUMENTS
3900*	ifbp		address of the Interface Block
3901*	bufp		(byte) address of buffer
3902*	len			length in bytes of buffer specified by bufp
3903*	word_len	Big Endian only: number of leading bytes to swap in pairs
3904*
3905*.RETURNS		N.A.
3906*
3907*.DESCRIPTION
3908* process the single byte (if applicable) read by the previous get_frag and copy len (or len-1) bytes from
3909* NIC to bufp.
3910* On a Big Endian platform, the parameter word_len controls the number of leading bytes whose endianess is
3911* converted (i.e. byte swapped)
3912*
3913*
3914*.DIAGRAM
3915*10: The PCMCIA card can be removed in the middle of the transfer. By depositing a "magic number" in the
3916*	HREG_SW_0 register of the Hermes at initialization time and by verifying this register, it can be
3917*	determined whether the card is still present. The return status is set accordingly.
3918*	Clearing the buffer is a (relative) cheap way to prevent that failing I/O results in run-away behavior
3919*	because the garbage in the buffer is interpreted by the caller irrespective of the return status (e.g.
3920*	hcf_service_nic has this behavior).
3921*
3922*.NOTICE
3923*	It turns out DOS ODI uses zero length fragments. The HCF code can cope with it, but as a consequence, no
3924*	Assert on len is possible
3925*
3926*.ENDDOC				END DOCUMENTATION
3927*
3928************************************************************************************************************/
3929HCF_STATIC void
3930get_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
3931{
3932hcf_io		io_port = ifbp->IFB_IOBase + HREG_DATA_1;	//BAP data register
3933wci_bufp	p = bufp;									//working pointer
3934int			i;											//prevent side effects from macro
3935int			j;
3936
3937	HCFASSERT( ((hcf_32)bufp & (HCF_ALIGN-1) ) == 0, (hcf_32)bufp )
3938
3939/*1:	here recovery logic for intervening BAP access between hcf_service_nic and hcf_rcv_msg COULD be added
3940 * 	if current access is RxInitial
3941 * 	.  persistent_offset += len
3942 */
3943
3944	i = len;
3945													//if buffer length > 0 and carry from previous get_frag
3946	if ( i && ifbp->IFB_CarryIn ) {
3947													//.  move carry to buffer
3948													//.  adjust buffer length and pointer accordingly
3949		*p++ = (hcf_8)(ifbp->IFB_CarryIn>>8);
3950		i--;
3951													//.  clear carry flag
3952		ifbp->IFB_CarryIn = 0;
3953	}
3954#if (HCF_IO) & HCF_IO_32BITS
3955	//skip zero-length I/O, single byte I/O and I/O not worthwhile (i.e. less than 6 bytes)for DW logic
3956													//if buffer length >= 6 and 32 bits I/O support
3957	if ( !(ifbp->IFB_CntlOpt & USE_16BIT) && i >= 6 ) {
3958hcf_32 FAR	*p4; //prevent side effects from macro
3959		if ( ( (hcf_32)p & 0x1 ) == 0 ) {			//.  if buffer at least word aligned
3960			if ( (hcf_32)p & 0x2 ) {				//.  .  if buffer not double word aligned
3961													//.  .  .  read single word to get double word aligned
3962				*(wci_recordp)p = IN_PORT_WORD( io_port );
3963													//.  .  .  adjust buffer length and pointer accordingly
3964				p += 2;
3965				i -= 2;
3966			}
3967													//.  .  read as many double word as possible
3968			p4 = (hcf_32 FAR *)p;
3969			j = i/4;
3970			IN_PORT_STRING_32( io_port, p4, j );
3971													//.  .  adjust buffer length and pointer accordingly
3972			p += i & ~0x0003;
3973			i &= 0x0003;
3974		}
3975	}
3976#endif // HCF_IO_32BITS
3977													//if no 32-bit support OR byte aligned OR 1-3 bytes left
3978	if ( i ) {
3979													//.  read as many word as possible in "alignment safe" way
3980		j = i/2;
3981		IN_PORT_STRING_8_16( io_port, p, j );
3982													//.  if 1 byte left
3983		if ( i & 0x0001 ) {
3984													//.  .  read 1 word
3985			ifbp->IFB_CarryIn = IN_PORT_WORD( io_port );
3986													//.  .  store LSB in last char of buffer
3987			bufp[len-1] = (hcf_8)ifbp->IFB_CarryIn;
3988													//.  .  save MSB in carry, set carry flag
3989			ifbp->IFB_CarryIn |= 0x1;
3990		}
3991	}
3992#if HCF_BIG_ENDIAN
3993	HCFASSERT( word_len == 0 || word_len == 2 || word_len == 4, word_len )
3994	HCFASSERT( word_len == 0 || ((hcf_32)bufp & 1 ) == 0, (hcf_32)bufp )
3995	HCFASSERT( word_len <= len, MERGE2( word_len, len ) )
3996	//see put_frag for an alternative implementation, but be carefull about what are int's and what are
3997	//hcf_16's
3998	if ( word_len ) {								//.  if there is anything to convert
3999hcf_8 c;
4000		c = bufp[1];								//.  .  convert the 1st hcf_16
4001		bufp[1] = bufp[0];
4002		bufp[0] = c;
4003		if ( word_len > 1 ) {						//.  .  if there is to convert more than 1 word ( i.e 2 )
4004			c = bufp[3];							//.  .  .  convert the 2nd hcf_16
4005			bufp[3] = bufp[2];
4006			bufp[2] = c;
4007		}
4008	}
4009#endif // HCF_BIG_ENDIAN
4010} // get_frag
4011
4012HCF_STATIC int
4013init( IFBP ifbp )
4014{
4015
4016int	rc = HCF_SUCCESS;
4017
4018	HCFLOGENTRY( HCF_TRACE_INIT, 0 )
4019
4020	ifbp->IFB_CardStat = 0;																			/* 2*/
4021	OPW( HREG_EV_ACK, ~HREG_EV_SLEEP_REQ ); 											/* 4*/
4022	IF_PROT_TIME( calibrate( ifbp ); ) 													/*10*/
4023	ifbp->IFB_FWIdentity.len = sizeof(CFG_FW_IDENTITY_STRCT)/sizeof(hcf_16) - 1;
4024	ifbp->IFB_FWIdentity.typ = CFG_FW_IDENTITY;
4025	rc = hcf_get_info( ifbp, (LTVP)&ifbp->IFB_FWIdentity.len );
4026/* ;? conversion should not be needed for mmd_check_comp */
4027#if HCF_BIG_ENDIAN
4028	ifbp->IFB_FWIdentity.comp_id       = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.comp_id );
4029	ifbp->IFB_FWIdentity.variant       = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.variant );
4030	ifbp->IFB_FWIdentity.version_major = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.version_major );
4031	ifbp->IFB_FWIdentity.version_minor = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWIdentity.version_minor );
4032#endif // HCF_BIG_ENDIAN
4033#if defined MSF_COMPONENT_ID																		/*14*/
4034	if ( rc == HCF_SUCCESS ) {																		/*16*/
4035		ifbp->IFB_HSISup.len = sizeof(CFG_SUP_RANGE_STRCT)/sizeof(hcf_16) - 1;
4036		ifbp->IFB_HSISup.typ = CFG_NIC_HSI_SUP_RANGE;
4037		rc = hcf_get_info( ifbp, (LTVP)&ifbp->IFB_HSISup.len );
4038/* ;? conversion should not be needed for mmd_check_comp , BUT according to a report of a BE-user it is
4039 * should be resolved in the WARP release
4040 * since some compilers make ugly but unnecessary code of these instructions even for LE,
4041 * it is conditionally compiled */
4042#if HCF_BIG_ENDIAN
4043		ifbp->IFB_HSISup.role    = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.role );
4044		ifbp->IFB_HSISup.id      = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.id );
4045		ifbp->IFB_HSISup.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.variant );
4046		ifbp->IFB_HSISup.bottom  = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.bottom );
4047		ifbp->IFB_HSISup.top     = CNV_LITTLE_TO_SHORT( ifbp->IFB_HSISup.top );
4048#endif // HCF_BIG_ENDIAN
4049		ifbp->IFB_FWSup.len = sizeof(CFG_SUP_RANGE_STRCT)/sizeof(hcf_16) - 1;
4050		ifbp->IFB_FWSup.typ = CFG_FW_SUP_RANGE;
4051		(void)hcf_get_info( ifbp, (LTVP)&ifbp->IFB_FWSup.len );
4052/* ;? conversion should not be needed for mmd_check_comp */
4053#if HCF_BIG_ENDIAN
4054		ifbp->IFB_FWSup.role    = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.role );
4055		ifbp->IFB_FWSup.id      = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.id );
4056		ifbp->IFB_FWSup.variant = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.variant );
4057		ifbp->IFB_FWSup.bottom  = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.bottom );
4058		ifbp->IFB_FWSup.top     = CNV_LITTLE_TO_SHORT( ifbp->IFB_FWSup.top );
4059#endif // HCF_BIG_ENDIAN
4060
4061		if ( ifbp->IFB_FWSup.id == COMP_ID_PRI ) {												/* 20*/
4062int i = sizeof( CFG_FW_IDENTITY_STRCT) + sizeof(CFG_SUP_RANGE_STRCT );
4063			while ( i-- ) ((hcf_8*)(&ifbp->IFB_PRIIdentity))[i] = ((hcf_8*)(&ifbp->IFB_FWIdentity))[i];
4064			ifbp->IFB_PRIIdentity.typ = CFG_PRI_IDENTITY;
4065			ifbp->IFB_PRISup.typ = CFG_PRI_SUP_RANGE;
4066			xxxx[xxxx_PRI_IDENTITY_OFFSET] = &ifbp->IFB_PRIIdentity.len;
4067			xxxx[xxxx_PRI_IDENTITY_OFFSET+1] = &ifbp->IFB_PRISup.len;
4068		}
4069		if ( !mmd_check_comp( (void*)&cfg_drv_act_ranges_hsi, &ifbp->IFB_HSISup)				 /* 22*/
4070#if ( (HCF_TYPE) & HCF_TYPE_PRELOADED ) == 0
4071//;? the PRI compatibility check is only relevant for DHF
4072			 || !mmd_check_comp( (void*)&cfg_drv_act_ranges_pri, &ifbp->IFB_PRISup)
4073#endif // HCF_TYPE_PRELOADED
4074		   ) {
4075			ifbp->IFB_CardStat = CARD_STAT_INCOMP_PRI;
4076			rc = HCF_ERR_INCOMP_PRI;
4077		}
4078		if ( ( ifbp->IFB_FWSup.id == COMP_ID_STA &&	!mmd_check_comp( (void*)&cfg_drv_act_ranges_sta, &ifbp->IFB_FWSup) ) ||
4079			 ( ifbp->IFB_FWSup.id == COMP_ID_APF && !mmd_check_comp( (void*)&cfg_drv_act_ranges_apf, &ifbp->IFB_FWSup) )
4080		   ) {																					/* 24 */
4081			ifbp->IFB_CardStat |= CARD_STAT_INCOMP_FW;
4082			rc = HCF_ERR_INCOMP_FW;
4083		}
4084	}
4085#endif // MSF_COMPONENT_ID
4086#if HCF_DL_ONLY == 0																			/* 28 */
4087	if ( rc == HCF_SUCCESS && ifbp->IFB_FWIdentity.comp_id >= COMP_ID_FW_STA ) {
4088PROT_CNT_INI
4089		/**************************************************************************************
4090		* rlav: the DMA engine needs the host to cause a 'hanging alloc event' for it to consume.
4091		* not sure if this is the right spot in the HCF, thinking about hcf_enable...
4092		**************************************************************************************/
4093		rc = cmd_exe( ifbp, HCMD_ALLOC, 0 );
4094// 180 degree error in logic ;? #if ALLOC_15
4095//		ifbp->IFB_RscInd = 1;	//let's hope that by the time hcf_send_msg isa called, there will be a FID
4096//#else
4097		if ( rc == HCF_SUCCESS ) {
4098			HCF_WAIT_WHILE( (IPW( HREG_EV_STAT ) & HREG_EV_ALLOC) == 0 );
4099			IF_PROT_TIME( HCFASSERT(prot_cnt, IPW( HREG_EV_STAT ) ) /*NOP*/;)
4100#if HCF_DMA
4101			if ( ! ( ifbp->IFB_CntlOpt & USE_DMA ) )
4102#endif // HCF_DMA
4103			{
4104				ifbp->IFB_RscInd = get_fid( ifbp );
4105				HCFASSERT( ifbp->IFB_RscInd, 0 )
4106				cmd_exe( ifbp, HCMD_ALLOC, 0 );
4107				IF_PROT_TIME( if ( prot_cnt == 0 ) rc = HCF_ERR_TIME_OUT; )
4108			}
4109		}
4110//#endif // ALLOC_15
4111	}
4112#endif // HCF_DL_ONLY
4113	HCFASSERT( rc == HCF_SUCCESS, rc )
4114	HCFLOGEXIT( HCF_TRACE_INIT )
4115	return rc;
4116} // init
4117
4118#if HCF_DL_ONLY == 0
4119/************************************************************************************************************
4120*
4121*.SUBMODULE		void isr_info( IFBP ifbp )
4122*.PURPOSE		handles link events.
4123*
4124*.ARGUMENTS
4125*	ifbp		address of the Interface Block
4126*
4127*.RETURNS		N.A.
4128*
4129*.DESCRIPTION
4130*
4131*
4132*.DIAGRAM
4133*1:	First the FID number corresponding with the InfoEvent is determined.
4134*	Note the complication of the zero-FID protection sub-scheme in DAWA.
4135*	Next the L-field and the T-field are fetched into scratch buffer info.
4136*2:	In case of tallies, the 16 bits Hermes values are accumulated in the IFB into 32 bits values. Info[0]
4137*	is (expected to be) HCF_NIC_TAL_CNT + 1. The contraption "while ( info[0]-- >1 )" rather than
4138*	"while ( --info[0] )" is used because it is dangerous to determine the length of the Value field by
4139*	decrementing info[0]. As a result of a bug in some version of the F/W, info[0] may be 0, resulting
4140*	in a very long loop in the pre-decrement logic.
4141*4:	In case of a link status frame, the information is copied to the IFB field IFB_linkStat
4142*6:	All other than Tallies (including "unknown" ones) are checked against the selection set by the MSF
4143*	via CFG_RID_LOG. If a match is found or the selection set has the wild-card type (i.e non-NULL buffer
4144*	pointer at the terminating zero-type), the frame is copied to the (type-specific) log buffer.
4145*	Note that to accumulate tallies into IFB AND to log them or to log a frame when a specific match occures
4146*	AND based on the wild-card selection, you have to call setup_bap again after the 1st copy.
4147*
4148*.ENDDOC				END DOCUMENTATION
4149*
4150************************************************************************************************************/
4151HCF_STATIC void
4152isr_info( IFBP ifbp )
4153{
4154hcf_16	info[2], fid;
4155#if (HCF_EXT) & HCF_EXT_INFO_LOG
4156RID_LOGP	ridp = ifbp->IFB_RIDLogp;	//NULL or pointer to array of RID_LOG structures (terminated by zero typ)
4157#endif // HCF_EXT_INFO_LOG
4158
4159	HCFTRACE( ifbp, HCF_TRACE_ISR_INFO );																/* 1 */
4160	fid = IPW( HREG_INFO_FID );
4161	DAWA_ZERO_FID( HREG_INFO_FID )
4162	if ( fid ) {
4163		(void)setup_bap( ifbp, fid, 0, IO_IN );
4164		get_frag( ifbp, (wci_bufp)info, 4 BE_PAR(2) );
4165		HCFASSERT( info[0] <= HCF_MAX_LTV + 1, MERGE_2( info[1], info[0] ) )  //;? a smaller value makes more sense
4166#if (HCF_TALLIES) & HCF_TALLIES_NIC		//Hermes tally support
4167		if ( info[1] == CFG_TALLIES ) {
4168hcf_32	*p;
4169/*2*/		if ( info[0] > HCF_NIC_TAL_CNT ) {
4170				info[0] = HCF_NIC_TAL_CNT + 1;
4171			}
4172			p = (hcf_32*)&ifbp->IFB_NIC_Tallies;
4173			while ( info[0]-- >1 ) *p++ += IPW( HREG_DATA_1 );	//request may return zero length
4174		}
4175		else
4176#endif // HCF_TALLIES_NIC
4177		{
4178/*4*/		if ( info[1] == CFG_LINK_STAT ) {
4179				ifbp->IFB_LinkStat = IPW( HREG_DATA_1 );
4180			}
4181#if (HCF_EXT) & HCF_EXT_INFO_LOG
4182/*6*/		while ( 1 ) {
4183				if ( ridp->typ == 0 || ridp->typ == info[1] ) {
4184					if ( ridp->bufp ) {
4185						HCFASSERT( ridp->len >= 2, ridp->typ )
4186						ridp->bufp[0] = min((hcf_16)(ridp->len - 1), info[0] ); 	//save L
4187						ridp->bufp[1] = info[1];						//save T
4188						get_frag( ifbp, (wci_bufp)&ridp->bufp[2], (ridp->bufp[0] - 1)*2 BE_PAR(0) );
4189					}
4190					break;
4191				}
4192				ridp++;
4193			}
4194#endif // HCF_EXT_INFO_LOG
4195		}
4196		HCFTRACE( ifbp, HCF_TRACE_ISR_INFO | HCF_TRACE_EXIT );
4197	}
4198	return;
4199} // isr_info
4200#endif // HCF_DL_ONLY
4201
4202//
4203//
4204// #endif // HCF_TALLIES_NIC
4205// /*4*/	if ( info[1] == CFG_LINK_STAT ) {
4206// 			ifbp->IFB_DSLinkStat = IPW( HREG_DATA_1 ) | CFG_LINK_STAT_CHANGE;	//corrupts BAP !! ;?
4207// 			ifbp->IFB_LinkStat = ifbp->IFB_DSLinkStat & CFG_LINK_STAT_FW; //;? to be obsoleted
4208// 			printk( "<4>linkstatus: %04x\n", ifbp->IFB_DSLinkStat );		//;?remove me 1 day
4209// #if (HCF_SLEEP) & HCF_DDS
4210// 			if ( ( ifbp->IFB_DSLinkStat & CFG_LINK_STAT_CONNECTED ) == 0 ) { 	//even values are disconnected etc.
4211// 				ifbp->IFB_TickCnt = 0;				//start 2 second period (with 1 tick uncertanty)
4212// 				printk( "<5>isr_info: AwaitConnection phase started, IFB_TickCnt = 0\n" );		//;?remove me 1 day
4213// 			}
4214// #endif // HCF_DDS
4215// 		}
4216// #if (HCF_EXT) & HCF_EXT_INFO_LOG
4217// /*6*/	while ( 1 ) {
4218// 			if ( ridp->typ == 0 || ridp->typ == info[1] ) {
4219// 				if ( ridp->bufp ) {
4220// 					HCFASSERT( ridp->len >= 2, ridp->typ )
4221// 					(void)setup_bap( ifbp, fid, 2, IO_IN );			//restore BAP for tallies, linkstat and specific type followed by wild card
4222// 					ridp->bufp[0] = min( ridp->len - 1, info[0] ); 	//save L
4223// 					get_frag( ifbp, (wci_bufp)&ridp->bufp[1], ridp->bufp[0]*2 BE_PAR(0) );
4224// 				}
4225// 				break; //;?this break is no longer needed due to setup_bap but lets concentrate on DDS first
4226// 			}
4227// 			ridp++;
4228// 		}
4229// #endif // HCF_EXT_INFO_LOG
4230// 	}
4231// 	HCFTRACE( ifbp, HCF_TRACE_ISR_INFO | HCF_TRACE_EXIT );
4232//
4233//
4234//
4235//
4236//	return;
4237//} // isr_info
4238//#endif // HCF_DL_ONLY
4239
4240
4241/************************************************************************************************************
4242*
4243*.SUBMODULE		void mdd_assert( IFBP ifbp, unsigned int line_number, hcf_32 q )
4244*.PURPOSE		filters assert on level and interfaces to the MSF supplied msf_assert routine.
4245*
4246*.ARGUMENTS
4247*	ifbp		address of the Interface Block
4248*	line_number	line number of the line which caused the assert
4249*	q			qualifier, additional information which may give a clue about the problem
4250*
4251*.RETURNS		N.A.
4252*
4253*.DESCRIPTION
4254*
4255*
4256*.DIAGRAM
4257*
4258*.NOTICE
4259* mdd_assert has been through a turmoil, renaming hcf_assert to assert and hcf_assert again and supporting off
4260* and on being called from the MSF level and other ( immature ) ModularDriverDevelopment modules like DHF and
4261* MMD.
4262 * !!!! The assert routine is not an hcf_..... routine in the sense that it may be called by the MSF,
4263 *		however it is called from mmd.c and dhf.c, so it must be external.
4264 *		To prevent namespace pollution it needs a prefix, to prevent that MSF programmers think that
4265 *		they are allowed to call the assert logic, the prefix HCF can't be used, so MDD is selected!!!!
4266 *
4267* When called from the DHF module the line number is incremented by DHF_FILE_NAME_OFFSET and when called from
4268* the MMD module by MMD_FILE_NAME_OFFSET.
4269*
4270*.ENDDOC				END DOCUMENTATION
4271*
4272************************************************************************************************************/
4273#if HCF_ASSERT
4274void
4275mdd_assert( IFBP ifbp, unsigned int line_number, hcf_32 q )
4276{
4277hcf_16	run_time_flag = ifbp->IFB_AssertLvl;
4278
4279	if ( run_time_flag /* > ;?????? */ ) { //prevent recursive behavior, later to be extended to level filtering
4280		ifbp->IFB_AssertQualifier = q;
4281		ifbp->IFB_AssertLine = (hcf_16)line_number;
4282#if (HCF_ASSERT) & ( HCF_ASSERT_LNK_MSF_RTN | HCF_ASSERT_RT_MSF_RTN )
4283		if ( ifbp->IFB_AssertRtn ) {
4284			ifbp->IFB_AssertRtn( line_number, ifbp->IFB_AssertTrace, q );
4285		}
4286#endif // HCF_ASSERT_LNK_MSF_RTN / HCF_ASSERT_RT_MSF_RTN
4287#if (HCF_ASSERT) & HCF_ASSERT_SW_SUP
4288		OPW( HREG_SW_2, line_number );
4289		OPW( HREG_SW_2, ifbp->IFB_AssertTrace );
4290		OPW( HREG_SW_2, (hcf_16)q );
4291		OPW( HREG_SW_2, (hcf_16)(q >> 16 ) );
4292#endif // HCF_ASSERT_SW_SUP
4293
4294#if (HCF_EXT) & HCF_EXT_MB && (HCF_ASSERT) & HCF_ASSERT_MB
4295		ifbp->IFB_AssertLvl = 0;									// prevent recursive behavior
4296		hcf_put_info( ifbp, (LTVP)&ifbp->IFB_AssertStrct );
4297		ifbp->IFB_AssertLvl = run_time_flag;						// restore appropriate filter level
4298#endif // HCF_EXT_MB / HCF_ASSERT_MB
4299	}
4300} // mdd_assert
4301#endif // HCF_ASSERT
4302
4303
4304/************************************************************************************************************
4305*
4306*.SUBMODULE		void put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
4307*.PURPOSE		writes with 16/32 bit I/O via BAP1 port from Host memory to NIC RAM.
4308*
4309*.ARGUMENTS
4310*	ifbp		address of the Interface Block
4311*	bufp		(byte) address of buffer
4312*	len			length in bytes of buffer specified by bufp
4313*	word_len	Big Endian only: number of leading bytes to swap in pairs
4314*
4315*.RETURNS		N.A.
4316*
4317*.DESCRIPTION
4318* process the single byte (if applicable) not yet written by the previous put_frag and copy len
4319* (or len-1) bytes from bufp to NIC.
4320*
4321*
4322*.DIAGRAM
4323*
4324*.NOTICE
4325*	It turns out DOS ODI uses zero length fragments. The HCF code can cope with it, but as a consequence, no
4326*	Assert on len is possible
4327*
4328*.ENDDOC				END DOCUMENTATION
4329*
4330************************************************************************************************************/
4331HCF_STATIC void
4332put_frag( IFBP ifbp, wci_bufp bufp, int len BE_PAR( int word_len ) )
4333{
4334hcf_io		io_port = ifbp->IFB_IOBase + HREG_DATA_1;	//BAP data register
4335int			i;											//prevent side effects from macro
4336hcf_16		j;
4337	HCFASSERT( ((hcf_32)bufp & (HCF_ALIGN-1) ) == 0, (hcf_32)bufp )
4338#if HCF_BIG_ENDIAN
4339	HCFASSERT( word_len == 0 || word_len == 2 || word_len == 4, word_len )
4340	HCFASSERT( word_len == 0 || ((hcf_32)bufp & 1 ) == 0, (hcf_32)bufp )
4341	HCFASSERT( word_len <= len, MERGE_2( word_len, len ) )
4342
4343	if ( word_len ) {									//if there is anything to convert
4344 														//.  convert and write the 1st hcf_16
4345		j = bufp[1] | bufp[0]<<8;
4346		OUT_PORT_WORD( io_port, j );
4347														//.  update pointer and counter accordingly
4348		len -= 2;
4349		bufp += 2;
4350		if ( word_len > 1 ) {							//.  if there is to convert more than 1 word ( i.e 2 )
4351 														//.  .  convert and write the 2nd hcf_16
4352			j = bufp[1] | bufp[0]<<8;	/*bufp is already incremented by 2*/
4353			OUT_PORT_WORD( io_port, j );
4354														//.  .  update pointer and counter accordingly
4355			len -= 2;
4356			bufp += 2;
4357		}
4358	}
4359#endif // HCF_BIG_ENDIAN
4360	i = len;
4361	if ( i && ifbp->IFB_CarryOut ) {					//skip zero-length
4362		j = ((*bufp)<<8) + ( ifbp->IFB_CarryOut & 0xFF );
4363		OUT_PORT_WORD( io_port, j );
4364		bufp++; i--;
4365		ifbp->IFB_CarryOut = 0;
4366	}
4367#if (HCF_IO) & HCF_IO_32BITS
4368	//skip zero-length I/O, single byte I/O and I/O not worthwhile (i.e. less than 6 bytes)for DW logic
4369													//if buffer length >= 6 and 32 bits I/O support
4370	if ( !(ifbp->IFB_CntlOpt & USE_16BIT) && i >= 6 ) {
4371hcf_32 FAR	*p4; //prevent side effects from macro
4372		if ( ( (hcf_32)bufp & 0x1 ) == 0 ) {			//.  if buffer at least word aligned
4373			if ( (hcf_32)bufp & 0x2 ) {				//.  .  if buffer not double word aligned
4374                                                 	//.  .  .  write a single word to get double word aligned
4375				j = *(wci_recordp)bufp;		//just to help ease writing macros with embedded assembly
4376				OUT_PORT_WORD( io_port, j );
4377													//.  .  .  adjust buffer length and pointer accordingly
4378				bufp += 2; i -= 2;
4379			}
4380													//.  .  write as many double word as possible
4381			p4 = (hcf_32 FAR *)bufp;
4382			j = (hcf_16)i/4;
4383			OUT_PORT_STRING_32( io_port, p4, j );
4384													//.  .  adjust buffer length and pointer accordingly
4385			bufp += i & ~0x0003;
4386			i &= 0x0003;
4387		}
4388	}
4389#endif // HCF_IO_32BITS
4390													//if no 32-bit support OR byte aligned OR 1 word left
4391	if ( i ) {
4392													//.  if odd number of bytes left
4393		if ( i & 0x0001 ) {
4394													//.  .  save left over byte (before bufp is corrupted) in carry, set carry flag
4395			ifbp->IFB_CarryOut = (hcf_16)bufp[i-1] | 0x0100;	//note that i and bufp are always simultaneously modified, &bufp[i-1] is invariant
4396		}
4397													//.  write as many word as possible in "alignment safe" way
4398		j = (hcf_16)i/2;
4399		OUT_PORT_STRING_8_16( io_port, bufp, j );
4400	}
4401} // put_frag
4402
4403
4404/************************************************************************************************************
4405*
4406*.SUBMODULE		void put_frag_finalize( IFBP ifbp )
4407*.PURPOSE		cleanup after put_frag for trailing odd byte and MIC transfer to NIC.
4408*
4409*.ARGUMENTS
4410*	ifbp		address of the Interface Block
4411*
4412*.RETURNS		N.A.
4413*
4414*.DESCRIPTION
4415* finalize the MIC calculation with the padding pattern, output the last byte (if applicable)
4416* of the message and the MIC to the TxFS
4417*
4418*
4419*.DIAGRAM
4420*2:	1 byte of the last put_frag may be still in IFB_CarryOut ( the put_frag carry holder ), so ........
4421*	1 - 3 bytes of the last put_frag may be still in IFB_tx_32 ( the MIC engine carry holder ), so ........
4422*	The call to the MIC calculation routine feeds these remaining bytes (if any) of put_frag and the
4423*	just as many bytes of the padding as needed to the MIC calculation engine. Note that the "unneeded" pad
4424*	bytes simply end up in the MIC engine carry holder and are never used.
4425*8:	write the remainder of the MIC and possible some garbage to NIC RAM
4426*	Note: i is always 4 (a loop-invariant of the while in point 2)
4427*
4428*.NOTICE
4429*
4430*.ENDDOC				END DOCUMENTATION
4431*
4432************************************************************************************************************/
4433HCF_STATIC void
4434put_frag_finalize( IFBP ifbp )
4435{
4436#if (HCF_TYPE) & HCF_TYPE_WPA
4437	if ( ifbp->IFB_MICTxCarry != 0xFFFF) {		//if MIC calculation active
4438		CALC_TX_MIC( mic_pad, 8);				//.  feed (up to 8 bytes of) virtual padding to MIC engine
4439												//.  write (possibly) trailing byte + (most of) MIC
4440		put_frag( ifbp, (wci_bufp)ifbp->IFB_MICTx, 8 BE_PAR(0) );
4441	}
4442#endif // HCF_TYPE_WPA
4443	put_frag( ifbp, null_addr, 1 BE_PAR(0) );	//write (possibly) trailing data or MIC byte
4444} // put_frag_finalize
4445
4446
4447/************************************************************************************************************
4448*
4449*.SUBMODULE		int put_info( IFBP ifbp, LTVP ltvp )
4450*.PURPOSE		support routine to handle the "basic" task of hcf_put_info to pass RIDs to the NIC.
4451*
4452*.ARGUMENTS
4453*	ifbp		address of the Interface Block
4454*	ltvp		address in NIC RAM where LVT-records are located
4455*
4456*.RETURNS
4457*	HCF_SUCCESS
4458*	>>put_frag
4459*	>>cmd_wait
4460*
4461*.DESCRIPTION
4462*
4463*
4464*.DIAGRAM
4465*20: do not write RIDs to NICs which have incompatible Firmware
4466*24: If the RID does not exist, the L-field is set to zero.
4467*	Note that some RIDs can not be read, e.g. the pseudo RIDs for direct Hermes commands and CFG_DEFAULT_KEYS
4468*28: If the RID is written successful, pass it to the NIC by means of an Access Write command
4469*
4470*.NOTICE
4471*	The mechanism to HCF_ASSERT on invalid typ-codes in the LTV record is based on the following strategy:
4472*	  -	some codes (e.g. CFG_REG_MB) are explicitly handled by the HCF which implies that these codes
4473*		are valid. These codes are already consumed by hcf_put_info.
4474*	  - all other codes are passed to the Hermes. Before the put action is executed, hcf_get_info is called
4475*		with an LTV record with a value of 1 in	the L-field and the intended put action type in the Typ-code
4476*		field. If the put action type is valid, it is also valid as a get action type code - except
4477*		for CFG_DEFAULT_KEYS and CFG_ADD_TKIP_DEFAULT_KEY - so the HCF_ASSERT logic of hcf_get_info should
4478*		not catch.
4479*
4480*.ENDDOC				END DOCUMENTATION
4481*
4482************************************************************************************************************/
4483HCF_STATIC int
4484put_info( IFBP ifbp, LTVP ltvp	)
4485{
4486
4487int rc = HCF_SUCCESS;
4488
4489	HCFASSERT( ifbp->IFB_CardStat == 0, MERGE_2( ltvp->typ, ifbp->IFB_CardStat ) )
4490	HCFASSERT( CFG_RID_CFG_MIN <= ltvp->typ && ltvp->typ <= CFG_RID_CFG_MAX, ltvp->typ )
4491
4492	if ( ifbp->IFB_CardStat == 0 &&																/* 20*/
4493		 ( ( CFG_RID_CFG_MIN <= ltvp->typ    && ltvp->typ <= CFG_RID_CFG_MAX ) ||
4494		   ( CFG_RID_ENG_MIN <= ltvp->typ /* && ltvp->typ <= 0xFFFF */       )     ) ) {
4495#if HCF_ASSERT //FCC8, FCB0, FCB4, FCB6, FCB7, FCB8, FCC0, FCC4, FCBC, FCBD, FCBE, FCBF
4496 {
4497 hcf_16		t = ltvp->typ;
4498 LTV_STRCT 	x = { 2, t, {0} };															/*24*/
4499	hcf_get_info( ifbp, (LTVP)&x );
4500	if ( x.len == 0 &&
4501		 ( t != CFG_DEFAULT_KEYS && t != CFG_ADD_TKIP_DEFAULT_KEY && t != CFG_REMOVE_TKIP_DEFAULT_KEY &&
4502		   t != CFG_ADD_TKIP_MAPPED_KEY && t != CFG_REMOVE_TKIP_MAPPED_KEY &&
4503		   t != CFG_HANDOVER_ADDR && t != CFG_DISASSOCIATE_ADDR &&
4504		   t != CFG_FCBC && t != CFG_FCBD && t != CFG_FCBE && t != CFG_FCBF &&
4505		   t != CFG_DEAUTHENTICATE_ADDR
4506		 )
4507		) {
4508		HCFASSERT( DO_ASSERT, ltvp->typ )
4509		}
4510 }
4511#endif // HCF_ASSERT
4512
4513		rc = setup_bap( ifbp, ltvp->typ, 0, IO_OUT );
4514		put_frag( ifbp, (wci_bufp)ltvp, 2*ltvp->len + 2 BE_PAR(2) );
4515/*28*/	if ( rc == HCF_SUCCESS ) {
4516			rc = cmd_exe( ifbp, HCMD_ACCESS + HCMD_ACCESS_WRITE, ltvp->typ );
4517		}
4518	}
4519	return rc;
4520} // put_info
4521
4522
4523#if HCF_DL_ONLY == 0
4524/************************************************************************************************************
4525*
4526*.SUBMODULE		int put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp )
4527*.PURPOSE	 	accumulates a ( series of) buffers into a single Info block into the MailBox.
4528*
4529*.ARGUMENTS
4530*	ifbp		address of the Interface Block
4531*	ltvp		address of structure specifying the "type" and the fragments of the information to be synthesized
4532*				as an LTV into the MailBox
4533*
4534*.RETURNS
4535*
4536*.DESCRIPTION
4537* If the data does not fit (including no MailBox is available), the IFB_MBTally is incremented and an
4538* error status is returned.
4539* HCF_ASSERT does not catch.
4540* Calling put_info_mb when their is no MailBox available, is considered a design error in the MSF.
4541*
4542* Note that there is always at least 1 word of unused space in the mail box.
4543* As a consequence:
4544* - no problem in pointer arithmetic (MB_RP == MB_WP means unambiguously mail box is completely empty
4545* - There is always free space to write an L field with a value of zero after each MB_Info block.  This
4546*   allows for an easy scan mechanism in the "get MB_Info block" logic.
4547*
4548*
4549*.DIAGRAM
4550*1:	Calculate L field of the MBIB, i.e. 1 for the T-field + the cumulative length of the fragments.
4551*2:	The free space in the MailBox is calculated (2a: free part from Write Ptr to Read Ptr, 2b: free part
4552*	turns out to wrap around) . If this space suffices to store the number of words reflected by len (T-field
4553*	+ Value-field) plus the additional MailBox Info L-field + a trailing 0 to act as the L-field of a trailing
4554*	dummy or empty LTV record, then a MailBox Info block is build in the MailBox consisting of
4555*	  - the value len in the first word
4556*	  - type in the second word
4557*	  - a copy of the contents of the fragments in the second and higher word
4558*
4559*4:	Since put_info_mb() can more or less directly be called from the MSF level, the I/F must be robust
4560*	against out-of-range variables. As failsafe coding, the MB update is skipped by changing tlen to 0 if
4561*	len == 0; This will indirectly cause an assert as result of the violation of the next if clause.
4562*6:	Check whether the free space in MailBox suffices (this covers the complete absence of the MailBox).
4563*	Note that len is unsigned, so even MSF I/F violation works out O.K.
4564*	The '2' in the expression "len+2" is used because 1 word is needed for L itself and 1 word is needed
4565*	for the zero-sentinel
4566*8:	update MailBox Info length report to MSF with "oldest" MB Info Block size. Be carefull here, if you get
4567*	here before the MailBox is registered, you can't read from the buffer addressed by IFB_MBp (it is the
4568*	Null buffer) so don't move this code till the end of this routine but keep it where there is garuanteed
4569*	a buffer.
4570*
4571*.NOTICE
4572*	boundary testing depends on the fact that IFB_MBSize is guaranteed to be zero if no MailBox is present,
4573*	and to a lesser degree, that IFB_MBWp = IFB_MBRp = 0
4574*
4575*.ENDDOC				END DOCUMENTATION
4576*
4577************************************************************************************************************/
4578#if (HCF_EXT) & HCF_EXT_MB
4579
4580HCF_STATIC int
4581put_info_mb( IFBP ifbp, CFG_MB_INFO_STRCT FAR * ltvp )
4582{
4583
4584int			rc = HCF_SUCCESS;
4585hcf_16		i;						//work counter
4586hcf_16		*dp;					//destination pointer (in MailBox)
4587wci_recordp	sp;						//source pointer
4588hcf_16		len;					//total length to copy to MailBox
4589hcf_16		tlen;					//free length/working length/offset in WMP frame
4590
4591	if ( ifbp->IFB_MBp == NULL ) return rc;  //;?not sufficient
4592	HCFASSERT( ifbp->IFB_MBp != NULL, 0 )					//!!!be careful, don't get into an endless recursion
4593	HCFASSERT( ifbp->IFB_MBSize, 0 )
4594
4595	len = 1;																							/* 1 */
4596	for ( i = 0; i < ltvp->frag_cnt; i++ ) {
4597		len += ltvp->frag_buf[i].frag_len;
4598	}
4599	if ( ifbp->IFB_MBRp > ifbp->IFB_MBWp ) {
4600		tlen = ifbp->IFB_MBRp - ifbp->IFB_MBWp;															/* 2a*/
4601	} else {
4602		if ( ifbp->IFB_MBRp == ifbp->IFB_MBWp ) {
4603			ifbp->IFB_MBRp = ifbp->IFB_MBWp = 0;	// optimize Wrapping
4604		}
4605		tlen = ifbp->IFB_MBSize - ifbp->IFB_MBWp;														/* 2b*/
4606		if ( ( tlen <= len + 2 ) && ( len + 2 < ifbp->IFB_MBRp ) ) {	//if trailing space is too small but
4607																	//	 leading space is sufficiently large
4608			ifbp->IFB_MBp[ifbp->IFB_MBWp] = 0xFFFF;					//flag dummy LTV to fill the trailing space
4609			ifbp->IFB_MBWp = 0;										//reset WritePointer to begin of MailBox
4610			tlen = ifbp->IFB_MBRp;									//get new available space size
4611		}
4612	}
4613	dp = &ifbp->IFB_MBp[ifbp->IFB_MBWp];
4614	if ( len == 0 ) {
4615		tlen = 0; //;? what is this good for
4616	}
4617	if ( len + 2 >= tlen ){																				/* 6 */
4618		//Do Not ASSERT, this is a normal condition
4619		IF_TALLY( ifbp->IFB_HCF_Tallies.NoBufMB++; ) /*NOP to cover against analomies with empty compound*/;
4620		rc = HCF_ERR_LEN;
4621	} else {
4622		*dp++ = len;									//write Len (= size of T+V in words to MB_Info block
4623		*dp++ = ltvp->base_typ;							//write Type to MB_Info block
4624		ifbp->IFB_MBWp += len + 1;						//update WritePointer of MailBox
4625		for ( i = 0; i < ltvp->frag_cnt; i++ ) {				// process each of the fragments
4626			sp = ltvp->frag_buf[i].frag_addr;
4627			len = ltvp->frag_buf[i].frag_len;
4628			while ( len-- ) *dp++ = *sp++;
4629		}
4630		ifbp->IFB_MBp[ifbp->IFB_MBWp] = 0;				//to assure get_info for CFG_MB_INFO stops
4631		ifbp->IFB_MBInfoLen = ifbp->IFB_MBp[ifbp->IFB_MBRp];											/* 8 */
4632	}
4633	return rc;
4634} // put_info_mb
4635
4636#endif // HCF_EXT_MB
4637#endif // HCF_DL_ONLY
4638
4639
4640HCF_STATIC int
4641setup_bap( IFBP ifbp, hcf_16 fid, int offset, int type )
4642{
4643PROT_CNT_INI
4644int	rc;
4645
4646	HCFTRACE( ifbp, HCF_TRACE_STRIO );
4647	rc = ifbp->IFB_DefunctStat;
4648	if (rc == HCF_SUCCESS) {										/*2*/
4649		OPW( HREG_SELECT_1, fid );																/*4*/
4650		OPW( HREG_OFFSET_1, offset );
4651		if ( type == IO_IN ) {
4652			ifbp->IFB_CarryIn = 0;
4653		}
4654		else ifbp->IFB_CarryOut = 0;
4655		HCF_WAIT_WHILE( IPW( HREG_OFFSET_1) & HCMD_BUSY );
4656		HCFASSERT( !( IPW( HREG_OFFSET_1) & HREG_OFFSET_ERR ), MERGE_2( fid, offset ) )			/*8*/
4657		if ( prot_cnt == 0 ) {
4658			HCFASSERT( DO_ASSERT, MERGE_2( fid, offset ) )
4659			rc = ifbp->IFB_DefunctStat = HCF_ERR_DEFUNCT_TIME_OUT;
4660			ifbp->IFB_CardStat |= CARD_STAT_DEFUNCT;
4661		}
4662	}
4663	HCFTRACE( ifbp, HCF_TRACE_STRIO | HCF_TRACE_EXIT );
4664	return rc;
4665} // setup_bap
4666