• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/tidspbridge/include/dspbridge/
1/*
2 * drv.h
3 *
4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
5 *
6 * DRV Resource allocation module. Driver Object gets Created
7 * at the time of Loading. It holds the List of Device Objects
8 * in the system.
9 *
10 * Copyright (C) 2005-2006 Texas Instruments, Inc.
11 *
12 * This package is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
18 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
19 */
20
21#ifndef DRV_
22#define DRV_
23
24#include <dspbridge/devdefs.h>
25
26#include <dspbridge/drvdefs.h>
27#include <linux/idr.h>
28
29#define DRV_ASSIGN     1
30#define DRV_RELEASE    0
31
32/* Provide the DSP Internal memory windows that can be accessed from L3 address
33 * space */
34
35#define OMAP_GEM_BASE   0x107F8000
36#define OMAP_DSP_SIZE   0x00720000
37
38/* MEM1 is L2 RAM + L2 Cache space */
39#define OMAP_DSP_MEM1_BASE 0x5C7F8000
40#define OMAP_DSP_MEM1_SIZE 0x18000
41#define OMAP_DSP_GEM1_BASE 0x107F8000
42
43/* MEM2 is L1P RAM/CACHE space */
44#define OMAP_DSP_MEM2_BASE 0x5CE00000
45#define OMAP_DSP_MEM2_SIZE 0x8000
46#define OMAP_DSP_GEM2_BASE 0x10E00000
47
48/* MEM3 is L1D RAM/CACHE space */
49#define OMAP_DSP_MEM3_BASE 0x5CF04000
50#define OMAP_DSP_MEM3_SIZE 0x14000
51#define OMAP_DSP_GEM3_BASE 0x10F04000
52
53#define OMAP_IVA2_PRM_BASE 0x48306000
54#define OMAP_IVA2_PRM_SIZE 0x1000
55
56#define OMAP_IVA2_CM_BASE 0x48004000
57#define OMAP_IVA2_CM_SIZE 0x1000
58
59#define OMAP_PER_CM_BASE 0x48005000
60#define OMAP_PER_CM_SIZE 0x1000
61
62#define OMAP_PER_PRM_BASE 0x48307000
63#define OMAP_PER_PRM_SIZE 0x1000
64
65#define OMAP_CORE_PRM_BASE 0x48306A00
66#define OMAP_CORE_PRM_SIZE 0x1000
67
68#define OMAP_SYSC_BASE 0x48002000
69#define OMAP_SYSC_SIZE 0x1000
70
71#define OMAP_DMMU_BASE 0x5D000000
72#define OMAP_DMMU_SIZE 0x1000
73
74#define OMAP_PRCM_VDD1_DOMAIN 1
75#define OMAP_PRCM_VDD2_DOMAIN 2
76
77/* GPP PROCESS CLEANUP Data structures */
78
79/* New structure (member of process context) abstracts NODE resource info */
80struct node_res_object {
81	void *hnode;
82	s32 node_allocated;	/* Node status */
83	s32 heap_allocated;	/* Heap status */
84	s32 streams_allocated;	/* Streams status */
85	int id;
86};
87
88/* used to cache dma mapping information */
89struct bridge_dma_map_info {
90	/* direction of DMA in action, or DMA_NONE */
91	enum dma_data_direction dir;
92	/* number of elements requested by us */
93	int num_pages;
94	/* number of elements returned from dma_map_sg */
95	int sg_num;
96	/* list of buffers used in this DMA action */
97	struct scatterlist *sg;
98};
99
100/* Used for DMM mapped memory accounting */
101struct dmm_map_object {
102	struct list_head link;
103	u32 dsp_addr;
104	u32 mpu_addr;
105	u32 size;
106	u32 num_usr_pgs;
107	struct page **pages;
108	struct bridge_dma_map_info dma_info;
109};
110
111/* Used for DMM reserved memory accounting */
112struct dmm_rsv_object {
113	struct list_head link;
114	u32 dsp_reserved_addr;
115};
116
117/* New structure (member of process context) abstracts DMM resource info */
118struct dspheap_res_object {
119	s32 heap_allocated;	/* DMM status */
120	u32 ul_mpu_addr;
121	u32 ul_dsp_addr;
122	u32 ul_dsp_res_addr;
123	u32 heap_size;
124	void *hprocessor;
125	struct dspheap_res_object *next;
126};
127
128/* New structure (member of process context) abstracts stream resource info */
129struct strm_res_object {
130	s32 stream_allocated;	/* Stream status */
131	void *hstream;
132	u32 num_bufs;
133	u32 dir;
134	int id;
135};
136
137/* Overall Bridge process resource usage state */
138enum gpp_proc_res_state {
139	PROC_RES_ALLOCATED,
140	PROC_RES_FREED
141};
142
143/* Bridge Data */
144struct drv_data {
145	char *base_img;
146	s32 shm_size;
147	int tc_wordswapon;
148	void *drv_object;
149	void *dev_object;
150	void *mgr_object;
151};
152
153/* Process Context */
154struct process_context {
155	/* Process State */
156	enum gpp_proc_res_state res_state;
157
158	/* Handle to Processor */
159	void *hprocessor;
160
161	/* DSP Node resources */
162	struct idr *node_id;
163
164	/* DMM mapped memory resources */
165	struct list_head dmm_map_list;
166	spinlock_t dmm_map_lock;
167
168	/* DMM reserved memory resources */
169	struct list_head dmm_rsv_list;
170	spinlock_t dmm_rsv_lock;
171
172	/* DSP Heap resources */
173	struct dspheap_res_object *pdspheap_list;
174
175	/* Stream resources */
176	struct idr *stream_id;
177};
178
179/*
180 *  ======== drv_create ========
181 *  Purpose:
182 *      Creates the Driver Object. This is done during the driver loading.
183 *      There is only one Driver Object in the DSP/BIOS Bridge.
184 *  Parameters:
185 *      drv_obj:        Location to store created DRV Object handle.
186 *  Returns:
187 *      0:        Sucess
188 *      -ENOMEM:    Failed in Memory allocation
189 *      -EPERM:      General Failure
190 *  Requires:
191 *      DRV Initialized (refs > 0 )
192 *      drv_obj != NULL.
193 *  Ensures:
194 *      0:        - *drv_obj is a valid DRV interface to the device.
195 *                      - List of DevObject Created and Initialized.
196 *                      - List of dev_node String created and intialized.
197 *                      - Registry is updated with the DRV Object.
198 *      !0:       DRV Object not created
199 *  Details:
200 *      There is one Driver Object for the Driver representing
201 *      the driver itself. It contains the list of device
202 *      Objects and the list of Device Extensions in the system.
203 *      Also it can hold other neccessary
204 *      information in its storage area.
205 */
206extern int drv_create(struct drv_object **drv_obj);
207
208/*
209 *  ======== drv_destroy ========
210 *  Purpose:
211 *      destroys the Dev Object list, DrvExt list
212 *      and destroy the DRV object
213 *      Called upon driver unLoading.or unsuccesful loading of the driver.
214 *  Parameters:
215 *      driver_obj:     Handle to Driver object .
216 *  Returns:
217 *      0:        Success.
218 *      -EPERM:      Failed to destroy DRV Object
219 *  Requires:
220 *      DRV Initialized (cRegs > 0 )
221 *      hdrv_obj is not NULL and a valid DRV handle .
222 *      List of DevObject is Empty.
223 *      List of DrvExt is Empty
224 *  Ensures:
225 *      0:        - DRV Object destroyed and hdrv_obj is not a valid
226 *                        DRV handle.
227 *                      - Registry is updated with "0" as the DRV Object.
228 */
229extern int drv_destroy(struct drv_object *driver_obj);
230
231/*
232 *  ======== drv_exit ========
233 *  Purpose:
234 *      Exit the DRV module, freeing any modules initialized in drv_init.
235 *  Parameters:
236 *  Returns:
237 *  Requires:
238 *  Ensures:
239 */
240extern void drv_exit(void);
241
242/*
243 *  ======== drv_get_first_dev_object ========
244 *  Purpose:
245 *      Returns the Ptr to the FirstDev Object in the List
246 *  Parameters:
247 *  Requires:
248 *      DRV Initialized
249 *  Returns:
250 *      dw_dev_object:  Ptr to the First Dev Object as a u32
251 *      0 if it fails to retrieve the First Dev Object
252 *  Ensures:
253 */
254extern u32 drv_get_first_dev_object(void);
255
256/*
257 *  ======== drv_get_first_dev_extension ========
258 *  Purpose:
259 *      Returns the Ptr to the First Device Extension in the List
260 *  Parameters:
261 *  Requires:
262 *      DRV Initialized
263 *  Returns:
264 *      dw_dev_extension:     Ptr to the First Device Extension as a u32
265 *      0:                  Failed to Get the Device Extension
266 *  Ensures:
267 */
268extern u32 drv_get_first_dev_extension(void);
269
270/*
271 *  ======== drv_get_dev_object ========
272 *  Purpose:
273 *      Given a index, returns a handle to DevObject from the list
274 *  Parameters:
275 *      hdrv_obj:     Handle to the Manager
276 *      device_obj:     Location to store the Dev Handle
277 *  Requires:
278 *      DRV Initialized
279 *      index >= 0
280 *      hdrv_obj is not NULL and Valid DRV Object
281 *      device_obj is not NULL
282 *      Device Object List not Empty
283 *  Returns:
284 *      0:        Success
285 *      -EPERM:      Failed to Get the Dev Object
286 *  Ensures:
287 *      0:        *device_obj != NULL
288 *      -EPERM:      *device_obj = NULL
289 */
290extern int drv_get_dev_object(u32 index,
291				     struct drv_object *hdrv_obj,
292				     struct dev_object **device_obj);
293
294/*
295 *  ======== drv_get_next_dev_object ========
296 *  Purpose:
297 *      Returns the Ptr to the Next Device Object from the the List
298 *  Parameters:
299 *      hdev_obj:     Handle to the Device Object
300 *  Requires:
301 *      DRV Initialized
302 *      hdev_obj != 0
303 *  Returns:
304 *      dw_dev_object:    Ptr to the Next Dev Object as a u32
305 *      0:              If it fail to get the next Dev Object.
306 *  Ensures:
307 */
308extern u32 drv_get_next_dev_object(u32 hdev_obj);
309
310/*
311 *  ======== drv_get_next_dev_extension ========
312 *  Purpose:
313 *      Returns the Ptr to the Next Device Extension from the the List
314 *  Parameters:
315 *      dev_extension:      Handle to the Device Extension
316 *  Requires:
317 *      DRV Initialized
318 *      dev_extension != 0.
319 *  Returns:
320 *      dw_dev_extension:     Ptr to the Next Dev Extension
321 *      0:                  If it fail to Get the next Dev Extension
322 *  Ensures:
323 */
324extern u32 drv_get_next_dev_extension(u32 dev_extension);
325
326/*
327 *  ======== drv_init ========
328 *  Purpose:
329 *      Initialize the DRV module.
330 *  Parameters:
331 *  Returns:
332 *      TRUE if success; FALSE otherwise.
333 *  Requires:
334 *  Ensures:
335 */
336extern int drv_init(void);
337
338/*
339 *  ======== drv_insert_dev_object ========
340 *  Purpose:
341 *      Insert a DeviceObject into the list of Driver object.
342 *  Parameters:
343 *      driver_obj:     Handle to DrvObject
344 *      hdev_obj:     Handle to DeviceObject to insert.
345 *  Returns:
346 *      0:        If successful.
347 *      -EPERM:      General Failure:
348 *  Requires:
349 *      hdrv_obj != NULL and Valid DRV Handle.
350 *      hdev_obj != NULL.
351 *  Ensures:
352 *      0:        Device Object is inserted and the List is not empty.
353 */
354extern int drv_insert_dev_object(struct drv_object *driver_obj,
355					struct dev_object *hdev_obj);
356
357/*
358 *  ======== drv_remove_dev_object ========
359 *  Purpose:
360 *      Search for and remove a Device object from the given list of Device Obj
361 *      objects.
362 *  Parameters:
363 *      driver_obj:     Handle to DrvObject
364 *      hdev_obj:     Handle to DevObject to Remove
365 *  Returns:
366 *      0:        Success.
367 *      -EPERM:      Unable to find dev_obj.
368 *  Requires:
369 *      hdrv_obj != NULL and a Valid DRV Handle.
370 *      hdev_obj != NULL.
371 *      List exists and is not empty.
372 *  Ensures:
373 *      List either does not exist (NULL), or is not empty if it does exist.
374 */
375extern int drv_remove_dev_object(struct drv_object *driver_obj,
376					struct dev_object *hdev_obj);
377
378/*
379 *  ======== drv_request_resources ========
380 *  Purpose:
381 *      Assigns the Resources or Releases them.
382 *  Parameters:
383 *      dw_context:          Path to the driver Registry Key.
384 *      dev_node_strg:     Ptr to dev_node String stored in the Device Ext.
385 *  Returns:
386 *      TRUE if success; FALSE otherwise.
387 *  Requires:
388 *  Ensures:
389 *      The Resources are assigned based on Bus type.
390 *      The hardware is initialized. Resource information is
391 *      gathered from the Registry(ISA, PCMCIA)or scanned(PCI)
392 *      Resource structure is stored in the registry which will be
393 *      later used by the CFG module.
394 */
395extern int drv_request_resources(u32 dw_context,
396					u32 *dev_node_strg);
397
398/*
399 *  ======== drv_release_resources ========
400 *  Purpose:
401 *      Assigns the Resources or Releases them.
402 *  Parameters:
403 *      dw_context:      Path to the driver Registry Key.
404 *      hdrv_obj:     Handle to the Driver Object.
405 *  Returns:
406 *      TRUE if success; FALSE otherwise.
407 *  Requires:
408 *  Ensures:
409 *      The Resources are released based on Bus type.
410 *      Resource structure is deleted from the registry
411 */
412extern int drv_release_resources(u32 dw_context,
413					struct drv_object *hdrv_obj);
414
415/**
416 * drv_request_bridge_res_dsp() - Reserves shared memory for bridge.
417 * @phost_resources:  pointer to host resources.
418 */
419int drv_request_bridge_res_dsp(void **phost_resources);
420
421#ifdef CONFIG_TIDSPBRIDGE_RECOVERY
422void bridge_recover_schedule(void);
423#endif
424
425/*
426 *  ======== mem_ext_phys_pool_init ========
427 *  Purpose:
428 *      Uses the physical memory chunk passed for internal consitent memory
429 *      allocations.
430 *      physical address based on the page frame address.
431 *  Parameters:
432 *      pool_phys_base  starting address of the physical memory pool.
433 *      pool_size      size of the physical memory pool.
434 *  Returns:
435 *      none.
436 *  Requires:
437 *      - MEM initialized.
438 *      - valid physical address for the base and size > 0
439 */
440extern void mem_ext_phys_pool_init(u32 pool_phys_base, u32 pool_size);
441
442/*
443 *  ======== mem_ext_phys_pool_release ========
444 */
445extern void mem_ext_phys_pool_release(void);
446
447/*  ======== mem_alloc_phys_mem ========
448 *  Purpose:
449 *      Allocate physically contiguous, uncached memory
450 *  Parameters:
451 *      byte_size:     Number of bytes to allocate.
452 *      align_mask:    Alignment Mask.
453 *      physical_address: Physical address of allocated memory.
454 *  Returns:
455 *      Pointer to a block of memory;
456 *      NULL if memory couldn't be allocated, or if byte_size == 0.
457 *  Requires:
458 *      MEM initialized.
459 *  Ensures:
460 *      The returned pointer, if not NULL, points to a valid memory block of
461 *      the size requested.  Returned physical address refers to physical
462 *      location of memory.
463 */
464extern void *mem_alloc_phys_mem(u32 byte_size,
465				u32 align_mask, u32 *physical_address);
466
467/*
468 *  ======== mem_free_phys_mem ========
469 *  Purpose:
470 *      Free the given block of physically contiguous memory.
471 *  Parameters:
472 *      virtual_address:  Pointer to virtual memory region allocated
473 *      by mem_alloc_phys_mem().
474 *      physical_address:  Pointer to physical memory region  allocated
475 *      by mem_alloc_phys_mem().
476 *      byte_size:  Size of the memory region allocated by mem_alloc_phys_mem().
477 *  Returns:
478 *  Requires:
479 *      MEM initialized.
480 *      virtual_address is a valid memory address returned by
481 *          mem_alloc_phys_mem()
482 *  Ensures:
483 *      virtual_address is no longer a valid pointer to memory.
484 */
485extern void mem_free_phys_mem(void *virtual_address,
486			      u32 physical_address, u32 byte_size);
487
488/*
489 *  ======== MEM_LINEAR_ADDRESS ========
490 *  Purpose:
491 *      Get the linear address corresponding to the given physical address.
492 *  Parameters:
493 *      phys_addr:  Physical address to be mapped.
494 *      byte_size:     Number of bytes in physical range to map.
495 *  Returns:
496 *      The corresponding linear address, or NULL if unsuccessful.
497 *  Requires:
498 *      MEM initialized.
499 *  Ensures:
500 *  Notes:
501 *      If valid linear address is returned, be sure to call
502 *      MEM_UNMAP_LINEAR_ADDRESS().
503 */
504#define MEM_LINEAR_ADDRESS(phy_addr, byte_size) phy_addr
505
506/*
507 *  ======== MEM_UNMAP_LINEAR_ADDRESS ========
508 *  Purpose:
509 *      Unmap the linear address mapped in MEM_LINEAR_ADDRESS.
510 *  Parameters:
511 *      base_addr: Ptr to mapped memory (as returned by MEM_LINEAR_ADDRESS()).
512 *  Returns:
513 *  Requires:
514 *      - MEM initialized.
515 *      - base_addr is a valid linear address mapped in MEM_LINEAR_ADDRESS.
516 *  Ensures:
517 *      - base_addr no longer points to a valid linear address.
518 */
519#define MEM_UNMAP_LINEAR_ADDRESS(base_addr) {}
520
521#endif /* DRV_ */
522