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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/tidspbridge/include/dspbridge/
1/*
2 * chnlpriv.h
3 *
4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
5 *
6 * Private channel header shared between DSPSYS, DSPAPI and
7 * Bridge driver modules.
8 *
9 * Copyright (C) 2005-2006 Texas Instruments, Inc.
10 *
11 * This package is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
17 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
18 */
19
20#ifndef CHNLPRIV_
21#define CHNLPRIV_
22
23#include <dspbridge/chnldefs.h>
24#include <dspbridge/devdefs.h>
25#include <dspbridge/sync.h>
26
27/* Channel manager limits: */
28#define CHNL_MAXCHANNELS    32	/* Max channels available per transport */
29
30/*
31 *  Trans port channel Id definitions:(must match dsp-side).
32 *
33 *  For CHNL_MAXCHANNELS = 16:
34 *
35 *  ChnlIds:
36 *      0-15  (PCPY) - transport 0)
37 *      16-31 (DDMA) - transport 1)
38 *      32-47 (ZCPY) - transport 2)
39 */
40#define CHNL_PCPY       0	/* Proc-copy transport 0 */
41
42#define CHNL_MAXIRQ     0xff	/* Arbitrarily large number. */
43
44/* The following modes are private: */
45#define CHNL_MODEUSEREVENT  0x1000	/* User provided the channel event. */
46#define CHNL_MODEMASK       0x1001
47
48/* Higher level channel states: */
49#define CHNL_STATEREADY		0	/* Channel ready for I/O. */
50#define CHNL_STATECANCEL	1	/* I/O was cancelled. */
51#define CHNL_STATEEOS		2	/* End Of Stream reached. */
52
53/* Macros for checking mode: */
54#define CHNL_IS_INPUT(mode)      (mode & CHNL_MODEFROMDSP)
55#define CHNL_IS_OUTPUT(mode)     (!CHNL_IS_INPUT(mode))
56
57/* Types of channel class libraries: */
58#define CHNL_TYPESM         1	/* Shared memory driver. */
59#define CHNL_TYPEBM         2	/* Bus Mastering driver. */
60
61/* Max string length of channel I/O completion event name - change if needed */
62#define CHNL_MAXEVTNAMELEN  32
63
64/* Max memory pages lockable in CHNL_PrepareBuffer() - change if needed */
65#define CHNL_MAXLOCKPAGES   64
66
67/* Channel info. */
68struct chnl_info {
69	struct chnl_mgr *hchnl_mgr;	/* Owning channel manager. */
70	u32 cnhl_id;		/* Channel ID. */
71	void *event_obj;	/* Channel I/O completion event. */
72	/*Abstraction of I/O completion event. */
73	struct sync_object *sync_event;
74	s8 dw_mode;		/* Channel mode. */
75	u8 dw_state;		/* Current channel state. */
76	u32 bytes_tx;		/* Total bytes transferred. */
77	u32 cio_cs;		/* Number of IOCs in queue. */
78	u32 cio_reqs;		/* Number of IO Requests in queue. */
79	u32 process;		/* Process owning this channel. */
80};
81
82/* Channel manager info: */
83struct chnl_mgrinfo {
84	u8 dw_type;		/* Type of channel class library. */
85	/* Channel handle, given the channel id. */
86	struct chnl_object *chnl_obj;
87	u8 open_channels;	/* Number of open channels. */
88	u8 max_channels;	/* total # of chnls supported */
89};
90
91/* Channel Manager Attrs: */
92struct chnl_mgrattrs {
93	/* Max number of channels this manager can use. */
94	u8 max_channels;
95	u32 word_size;		/* DSP Word size. */
96};
97
98#endif /* CHNLPRIV_ */
99