1/* 2 * lirc_serial.c 3 * 4 * lirc_serial - Device driver that records pulse- and pause-lengths 5 * (space-lengths) between DDCD event on a serial port. 6 * 7 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de> 8 * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu> 9 * Copyright (C) 1998 Ben Pfaff <blp@gnu.org> 10 * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de> 11 * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support) 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 * 26 */ 27 28/* 29 * Steve's changes to improve transmission fidelity: 30 * - for systems with the rdtsc instruction and the clock counter, a 31 * send_pule that times the pulses directly using the counter. 32 * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is 33 * not needed. Measurement shows very stable waveform, even where 34 * PCI activity slows the access to the UART, which trips up other 35 * versions. 36 * - For other system, non-integer-microsecond pulse/space lengths, 37 * done using fixed point binary. So, much more accurate carrier 38 * frequency. 39 * - fine tuned transmitter latency, taking advantage of fractional 40 * microseconds in previous change 41 * - Fixed bug in the way transmitter latency was accounted for by 42 * tuning the pulse lengths down - the send_pulse routine ignored 43 * this overhead as it timed the overall pulse length - so the 44 * pulse frequency was right but overall pulse length was too 45 * long. Fixed by accounting for latency on each pulse/space 46 * iteration. 47 * 48 * Steve Davies <steve@daviesfam.org> July 2001 49 */ 50 51#include <linux/module.h> 52#include <linux/errno.h> 53#include <linux/signal.h> 54#include <linux/sched.h> 55#include <linux/fs.h> 56#include <linux/interrupt.h> 57#include <linux/ioport.h> 58#include <linux/kernel.h> 59#include <linux/serial_reg.h> 60#include <linux/time.h> 61#include <linux/string.h> 62#include <linux/types.h> 63#include <linux/wait.h> 64#include <linux/mm.h> 65#include <linux/delay.h> 66#include <linux/poll.h> 67#include <linux/platform_device.h> 68 69#include <asm/system.h> 70#include <linux/io.h> 71#include <linux/irq.h> 72#include <linux/fcntl.h> 73#include <linux/spinlock.h> 74 75#ifdef CONFIG_LIRC_SERIAL_NSLU2 76#include <asm/hardware.h> 77#endif 78/* From Intel IXP42X Developer's Manual (#252480-005): */ 79/* ftp://download.intel.com/design/network/manuals/25248005.pdf */ 80#define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */ 81#define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */ 82 83#include <media/lirc.h> 84#include <media/lirc_dev.h> 85 86#define LIRC_DRIVER_NAME "lirc_serial" 87 88struct lirc_serial { 89 int signal_pin; 90 int signal_pin_change; 91 u8 on; 92 u8 off; 93 long (*send_pulse)(unsigned long length); 94 void (*send_space)(long length); 95 int features; 96 spinlock_t lock; 97}; 98 99#define LIRC_HOMEBREW 0 100#define LIRC_IRDEO 1 101#define LIRC_IRDEO_REMOTE 2 102#define LIRC_ANIMAX 3 103#define LIRC_IGOR 4 104#define LIRC_NSLU2 5 105 106/*** module parameters ***/ 107static int type; 108static int io; 109static int irq; 110static int iommap; 111static int ioshift; 112static int softcarrier = 1; 113static int share_irq; 114static int debug; 115static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */ 116static int txsense; /* 0 = active high, 1 = active low */ 117 118#define dprintk(fmt, args...) \ 119 do { \ 120 if (debug) \ 121 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ 122 fmt, ## args); \ 123 } while (0) 124 125/* forward declarations */ 126static long send_pulse_irdeo(unsigned long length); 127static long send_pulse_homebrew(unsigned long length); 128static void send_space_irdeo(long length); 129static void send_space_homebrew(long length); 130 131static struct lirc_serial hardware[] = { 132 [LIRC_HOMEBREW] = { 133 .signal_pin = UART_MSR_DCD, 134 .signal_pin_change = UART_MSR_DDCD, 135 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR), 136 .off = (UART_MCR_RTS | UART_MCR_OUT2), 137 .send_pulse = send_pulse_homebrew, 138 .send_space = send_space_homebrew, 139#ifdef CONFIG_LIRC_SERIAL_TRANSMITTER 140 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 141 LIRC_CAN_SET_SEND_CARRIER | 142 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 143#else 144 .features = LIRC_CAN_REC_MODE2 145#endif 146 }, 147 148 [LIRC_IRDEO] = { 149 .signal_pin = UART_MSR_DSR, 150 .signal_pin_change = UART_MSR_DDSR, 151 .on = UART_MCR_OUT2, 152 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), 153 .send_pulse = send_pulse_irdeo, 154 .send_space = send_space_irdeo, 155 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 156 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 157 }, 158 159 [LIRC_IRDEO_REMOTE] = { 160 .signal_pin = UART_MSR_DSR, 161 .signal_pin_change = UART_MSR_DDSR, 162 .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), 163 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), 164 .send_pulse = send_pulse_irdeo, 165 .send_space = send_space_irdeo, 166 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 167 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 168 }, 169 170 [LIRC_ANIMAX] = { 171 .signal_pin = UART_MSR_DCD, 172 .signal_pin_change = UART_MSR_DDCD, 173 .on = 0, 174 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), 175 .send_pulse = NULL, 176 .send_space = NULL, 177 .features = LIRC_CAN_REC_MODE2 178 }, 179 180 [LIRC_IGOR] = { 181 .signal_pin = UART_MSR_DSR, 182 .signal_pin_change = UART_MSR_DDSR, 183 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR), 184 .off = (UART_MCR_RTS | UART_MCR_OUT2), 185 .send_pulse = send_pulse_homebrew, 186 .send_space = send_space_homebrew, 187#ifdef CONFIG_LIRC_SERIAL_TRANSMITTER 188 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 189 LIRC_CAN_SET_SEND_CARRIER | 190 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 191#else 192 .features = LIRC_CAN_REC_MODE2 193#endif 194 }, 195 196#ifdef CONFIG_LIRC_SERIAL_NSLU2 197 /* 198 * Modified Linksys Network Storage Link USB 2.0 (NSLU2): 199 * We receive on CTS of the 2nd serial port (R142,LHS), we 200 * transmit with a IR diode between GPIO[1] (green status LED), 201 * and ground (Matthias Goebl <matthias.goebl@goebl.net>). 202 * See also http://www.nslu2-linux.org for this device 203 */ 204 [LIRC_NSLU2] = { 205 .signal_pin = UART_MSR_CTS, 206 .signal_pin_change = UART_MSR_DCTS, 207 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR), 208 .off = (UART_MCR_RTS | UART_MCR_OUT2), 209 .send_pulse = send_pulse_homebrew, 210 .send_space = send_space_homebrew, 211#ifdef CONFIG_LIRC_SERIAL_TRANSMITTER 212 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 213 LIRC_CAN_SET_SEND_CARRIER | 214 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 215#else 216 .features = LIRC_CAN_REC_MODE2 217#endif 218 }, 219#endif 220 221}; 222 223#define RS_ISR_PASS_LIMIT 256 224 225/* 226 * A long pulse code from a remote might take up to 300 bytes. The 227 * daemon should read the bytes as soon as they are generated, so take 228 * the number of keys you think you can push before the daemon runs 229 * and multiply by 300. The driver will warn you if you overrun this 230 * buffer. If you have a slow computer or non-busmastering IDE disks, 231 * maybe you will need to increase this. 232 */ 233 234/* This MUST be a power of two! It has to be larger than 1 as well. */ 235 236#define RBUF_LEN 256 237 238static struct timeval lasttv = {0, 0}; 239 240static struct lirc_buffer rbuf; 241 242static unsigned int freq = 38000; 243static unsigned int duty_cycle = 50; 244 245/* Initialized in init_timing_params() */ 246static unsigned long period; 247static unsigned long pulse_width; 248static unsigned long space_width; 249 250#if defined(__i386__) 251/* 252 * From: 253 * Linux I/O port programming mini-HOWTO 254 * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi> 255 * v, 28 December 1997 256 * 257 * [...] 258 * Actually, a port I/O instruction on most ports in the 0-0x3ff range 259 * takes almost exactly 1 microsecond, so if you're, for example, using 260 * the parallel port directly, just do additional inb()s from that port 261 * to delay. 262 * [...] 263 */ 264/* transmitter latency 1.5625us 0x1.90 - this figure arrived at from 265 * comment above plus trimming to match actual measured frequency. 266 * This will be sensitive to cpu speed, though hopefully most of the 1.5us 267 * is spent in the uart access. Still - for reference test machine was a 268 * 1.13GHz Athlon system - Steve 269 */ 270 271/* 272 * changed from 400 to 450 as this works better on slower machines; 273 * faster machines will use the rdtsc code anyway 274 */ 275#define LIRC_SERIAL_TRANSMITTER_LATENCY 450 276 277#else 278 279/* does anybody have information on other platforms ? */ 280/* 256 = 1<<8 */ 281#define LIRC_SERIAL_TRANSMITTER_LATENCY 256 282 283#endif /* __i386__ */ 284 285/* fetch serial input packet (1 byte) from register offset */ 286static u8 sinp(int offset) 287{ 288 if (iommap != 0) 289 /* the register is memory-mapped */ 290 offset <<= ioshift; 291 292 return inb(io + offset); 293} 294 295/* write serial output packet (1 byte) of value to register offset */ 296static void soutp(int offset, u8 value) 297{ 298 if (iommap != 0) 299 /* the register is memory-mapped */ 300 offset <<= ioshift; 301 302 outb(value, io + offset); 303} 304 305static void on(void) 306{ 307#ifdef CONFIG_LIRC_SERIAL_NSLU2 308 /* 309 * On NSLU2, we put the transmit diode between the output of the green 310 * status LED and ground 311 */ 312 if (type == LIRC_NSLU2) { 313 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW); 314 return; 315 } 316#endif 317 if (txsense) 318 soutp(UART_MCR, hardware[type].off); 319 else 320 soutp(UART_MCR, hardware[type].on); 321} 322 323static void off(void) 324{ 325#ifdef CONFIG_LIRC_SERIAL_NSLU2 326 if (type == LIRC_NSLU2) { 327 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH); 328 return; 329 } 330#endif 331 if (txsense) 332 soutp(UART_MCR, hardware[type].on); 333 else 334 soutp(UART_MCR, hardware[type].off); 335} 336 337#ifndef MAX_UDELAY_MS 338#define MAX_UDELAY_US 5000 339#else 340#define MAX_UDELAY_US (MAX_UDELAY_MS*1000) 341#endif 342 343static void safe_udelay(unsigned long usecs) 344{ 345 while (usecs > MAX_UDELAY_US) { 346 udelay(MAX_UDELAY_US); 347 usecs -= MAX_UDELAY_US; 348 } 349 udelay(usecs); 350} 351 352#ifdef USE_RDTSC 353/* 354 * This is an overflow/precision juggle, complicated in that we can't 355 * do long long divide in the kernel 356 */ 357 358/* 359 * When we use the rdtsc instruction to measure clocks, we keep the 360 * pulse and space widths as clock cycles. As this is CPU speed 361 * dependent, the widths must be calculated in init_port and ioctl 362 * time 363 */ 364 365/* So send_pulse can quickly convert microseconds to clocks */ 366static unsigned long conv_us_to_clocks; 367 368static int init_timing_params(unsigned int new_duty_cycle, 369 unsigned int new_freq) 370{ 371 unsigned long long loops_per_sec, work; 372 373 duty_cycle = new_duty_cycle; 374 freq = new_freq; 375 376 loops_per_sec = current_cpu_data.loops_per_jiffy; 377 loops_per_sec *= HZ; 378 379 /* How many clocks in a microsecond?, avoiding long long divide */ 380 work = loops_per_sec; 381 work *= 4295; /* 4295 = 2^32 / 1e6 */ 382 conv_us_to_clocks = (work >> 32); 383 384 /* 385 * Carrier period in clocks, approach good up to 32GHz clock, 386 * gets carrier frequency within 8Hz 387 */ 388 period = loops_per_sec >> 3; 389 period /= (freq >> 3); 390 391 /* Derive pulse and space from the period */ 392 pulse_width = period * duty_cycle / 100; 393 space_width = period - pulse_width; 394 dprintk("in init_timing_params, freq=%d, duty_cycle=%d, " 395 "clk/jiffy=%ld, pulse=%ld, space=%ld, " 396 "conv_us_to_clocks=%ld\n", 397 freq, duty_cycle, current_cpu_data.loops_per_jiffy, 398 pulse_width, space_width, conv_us_to_clocks); 399 return 0; 400} 401#else /* ! USE_RDTSC */ 402static int init_timing_params(unsigned int new_duty_cycle, 403 unsigned int new_freq) 404{ 405/* 406 * period, pulse/space width are kept with 8 binary places - 407 * IE multiplied by 256. 408 */ 409 if (256 * 1000000L / new_freq * new_duty_cycle / 100 <= 410 LIRC_SERIAL_TRANSMITTER_LATENCY) 411 return -EINVAL; 412 if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <= 413 LIRC_SERIAL_TRANSMITTER_LATENCY) 414 return -EINVAL; 415 duty_cycle = new_duty_cycle; 416 freq = new_freq; 417 period = 256 * 1000000L / freq; 418 pulse_width = period * duty_cycle / 100; 419 space_width = period - pulse_width; 420 dprintk("in init_timing_params, freq=%d pulse=%ld, " 421 "space=%ld\n", freq, pulse_width, space_width); 422 return 0; 423} 424#endif /* USE_RDTSC */ 425 426 427/* return value: space length delta */ 428 429static long send_pulse_irdeo(unsigned long length) 430{ 431 long rawbits, ret; 432 int i; 433 unsigned char output; 434 unsigned char chunk, shifted; 435 436 /* how many bits have to be sent ? */ 437 rawbits = length * 1152 / 10000; 438 if (duty_cycle > 50) 439 chunk = 3; 440 else 441 chunk = 1; 442 for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) { 443 shifted = chunk << (i * 3); 444 shifted >>= 1; 445 output &= (~shifted); 446 i++; 447 if (i == 3) { 448 soutp(UART_TX, output); 449 while (!(sinp(UART_LSR) & UART_LSR_THRE)) 450 ; 451 output = 0x7f; 452 i = 0; 453 } 454 } 455 if (i != 0) { 456 soutp(UART_TX, output); 457 while (!(sinp(UART_LSR) & UART_LSR_TEMT)) 458 ; 459 } 460 461 if (i == 0) 462 ret = (-rawbits) * 10000 / 1152; 463 else 464 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152; 465 466 return ret; 467} 468 469#ifdef USE_RDTSC 470/* Version that uses Pentium rdtsc instruction to measure clocks */ 471 472/* 473 * This version does sub-microsecond timing using rdtsc instruction, 474 * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY 475 * Implicitly i586 architecture... - Steve 476 */ 477 478static long send_pulse_homebrew_softcarrier(unsigned long length) 479{ 480 int flag; 481 unsigned long target, start, now; 482 483 /* Get going quick as we can */ 484 rdtscl(start); 485 on(); 486 /* Convert length from microseconds to clocks */ 487 length *= conv_us_to_clocks; 488 /* And loop till time is up - flipping at right intervals */ 489 now = start; 490 target = pulse_width; 491 flag = 1; 492 while ((now - start) < length) { 493 /* Delay till flip time */ 494 do { 495 rdtscl(now); 496 } while ((now - start) < target); 497 498 /* flip */ 499 if (flag) { 500 rdtscl(now); 501 off(); 502 target += space_width; 503 } else { 504 rdtscl(now); on(); 505 target += pulse_width; 506 } 507 flag = !flag; 508 } 509 rdtscl(now); 510 return ((now - start) - length) / conv_us_to_clocks; 511} 512#else /* ! USE_RDTSC */ 513/* Version using udelay() */ 514 515/* 516 * here we use fixed point arithmetic, with 8 517 * fractional bits. that gets us within 0.1% or so of the right average 518 * frequency, albeit with some jitter in pulse length - Steve 519 */ 520 521/* To match 8 fractional bits used for pulse/space length */ 522 523static long send_pulse_homebrew_softcarrier(unsigned long length) 524{ 525 int flag; 526 unsigned long actual, target, d; 527 length <<= 8; 528 529 actual = 0; target = 0; flag = 0; 530 while (actual < length) { 531 if (flag) { 532 off(); 533 target += space_width; 534 } else { 535 on(); 536 target += pulse_width; 537 } 538 d = (target - actual - 539 LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8; 540 /* 541 * Note - we've checked in ioctl that the pulse/space 542 * widths are big enough so that d is > 0 543 */ 544 udelay(d); 545 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY; 546 flag = !flag; 547 } 548 return (actual-length) >> 8; 549} 550#endif /* USE_RDTSC */ 551 552static long send_pulse_homebrew(unsigned long length) 553{ 554 if (length <= 0) 555 return 0; 556 557 if (softcarrier) 558 return send_pulse_homebrew_softcarrier(length); 559 else { 560 on(); 561 safe_udelay(length); 562 return 0; 563 } 564} 565 566static void send_space_irdeo(long length) 567{ 568 if (length <= 0) 569 return; 570 571 safe_udelay(length); 572} 573 574static void send_space_homebrew(long length) 575{ 576 off(); 577 if (length <= 0) 578 return; 579 safe_udelay(length); 580} 581 582static void rbwrite(int l) 583{ 584 if (lirc_buffer_full(&rbuf)) { 585 /* no new signals will be accepted */ 586 dprintk("Buffer overrun\n"); 587 return; 588 } 589 lirc_buffer_write(&rbuf, (void *)&l); 590} 591 592static void frbwrite(int l) 593{ 594 /* simple noise filter */ 595 static int pulse, space; 596 static unsigned int ptr; 597 598 if (ptr > 0 && (l & PULSE_BIT)) { 599 pulse += l & PULSE_MASK; 600 if (pulse > 250) { 601 rbwrite(space); 602 rbwrite(pulse | PULSE_BIT); 603 ptr = 0; 604 pulse = 0; 605 } 606 return; 607 } 608 if (!(l & PULSE_BIT)) { 609 if (ptr == 0) { 610 if (l > 20000) { 611 space = l; 612 ptr++; 613 return; 614 } 615 } else { 616 if (l > 20000) { 617 space += pulse; 618 if (space > PULSE_MASK) 619 space = PULSE_MASK; 620 space += l; 621 if (space > PULSE_MASK) 622 space = PULSE_MASK; 623 pulse = 0; 624 return; 625 } 626 rbwrite(space); 627 rbwrite(pulse | PULSE_BIT); 628 ptr = 0; 629 pulse = 0; 630 } 631 } 632 rbwrite(l); 633} 634 635static irqreturn_t irq_handler(int i, void *blah) 636{ 637 struct timeval tv; 638 int counter, dcd; 639 u8 status; 640 long deltv; 641 int data; 642 static int last_dcd = -1; 643 644 if ((sinp(UART_IIR) & UART_IIR_NO_INT)) { 645 /* not our interrupt */ 646 return IRQ_NONE; 647 } 648 649 counter = 0; 650 do { 651 counter++; 652 status = sinp(UART_MSR); 653 if (counter > RS_ISR_PASS_LIMIT) { 654 printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: " 655 "We're caught!\n"); 656 break; 657 } 658 if ((status & hardware[type].signal_pin_change) 659 && sense != -1) { 660 /* get current time */ 661 do_gettimeofday(&tv); 662 663 /* New mode, written by Trent Piepho 664 <xyzzy@u.washington.edu>. */ 665 666 /* 667 * The old format was not very portable. 668 * We now use an int to pass pulses 669 * and spaces to user space. 670 * 671 * If PULSE_BIT is set a pulse has been 672 * received, otherwise a space has been 673 * received. The driver needs to know if your 674 * receiver is active high or active low, or 675 * the space/pulse sense could be 676 * inverted. The bits denoted by PULSE_MASK are 677 * the length in microseconds. Lengths greater 678 * than or equal to 16 seconds are clamped to 679 * PULSE_MASK. All other bits are unused. 680 * This is a much simpler interface for user 681 * programs, as well as eliminating "out of 682 * phase" errors with space/pulse 683 * autodetection. 684 */ 685 686 /* calc time since last interrupt in microseconds */ 687 dcd = (status & hardware[type].signal_pin) ? 1 : 0; 688 689 if (dcd == last_dcd) { 690 printk(KERN_WARNING LIRC_DRIVER_NAME 691 ": ignoring spike: %d %d %lx %lx %lx %lx\n", 692 dcd, sense, 693 tv.tv_sec, lasttv.tv_sec, 694 tv.tv_usec, lasttv.tv_usec); 695 continue; 696 } 697 698 deltv = tv.tv_sec-lasttv.tv_sec; 699 if (tv.tv_sec < lasttv.tv_sec || 700 (tv.tv_sec == lasttv.tv_sec && 701 tv.tv_usec < lasttv.tv_usec)) { 702 printk(KERN_WARNING LIRC_DRIVER_NAME 703 ": AIEEEE: your clock just jumped " 704 "backwards\n"); 705 printk(KERN_WARNING LIRC_DRIVER_NAME 706 ": %d %d %lx %lx %lx %lx\n", 707 dcd, sense, 708 tv.tv_sec, lasttv.tv_sec, 709 tv.tv_usec, lasttv.tv_usec); 710 data = PULSE_MASK; 711 } else if (deltv > 15) { 712 data = PULSE_MASK; /* really long time */ 713 if (!(dcd^sense)) { 714 /* sanity check */ 715 printk(KERN_WARNING LIRC_DRIVER_NAME 716 ": AIEEEE: " 717 "%d %d %lx %lx %lx %lx\n", 718 dcd, sense, 719 tv.tv_sec, lasttv.tv_sec, 720 tv.tv_usec, lasttv.tv_usec); 721 /* 722 * detecting pulse while this 723 * MUST be a space! 724 */ 725 sense = sense ? 0 : 1; 726 } 727 } else 728 data = (int) (deltv*1000000 + 729 tv.tv_usec - 730 lasttv.tv_usec); 731 frbwrite(dcd^sense ? data : (data|PULSE_BIT)); 732 lasttv = tv; 733 last_dcd = dcd; 734 wake_up_interruptible(&rbuf.wait_poll); 735 } 736 } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */ 737 return IRQ_HANDLED; 738} 739 740 741static int hardware_init_port(void) 742{ 743 u8 scratch, scratch2, scratch3; 744 745 /* 746 * This is a simple port existence test, borrowed from the autoconfig 747 * function in drivers/serial/8250.c 748 */ 749 scratch = sinp(UART_IER); 750 soutp(UART_IER, 0); 751#ifdef __i386__ 752 outb(0xff, 0x080); 753#endif 754 scratch2 = sinp(UART_IER) & 0x0f; 755 soutp(UART_IER, 0x0f); 756#ifdef __i386__ 757 outb(0x00, 0x080); 758#endif 759 scratch3 = sinp(UART_IER) & 0x0f; 760 soutp(UART_IER, scratch); 761 if (scratch2 != 0 || scratch3 != 0x0f) { 762 /* we fail, there's nothing here */ 763 printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test " 764 "failed, cannot continue\n"); 765 return -EINVAL; 766 } 767 768 769 770 /* Set DLAB 0. */ 771 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); 772 773 /* First of all, disable all interrupts */ 774 soutp(UART_IER, sinp(UART_IER) & 775 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); 776 777 /* Clear registers. */ 778 sinp(UART_LSR); 779 sinp(UART_RX); 780 sinp(UART_IIR); 781 sinp(UART_MSR); 782 783#ifdef CONFIG_LIRC_SERIAL_NSLU2 784 if (type == LIRC_NSLU2) { 785 /* Setup NSLU2 UART */ 786 787 /* Enable UART */ 788 soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE); 789 /* Disable Receiver data Time out interrupt */ 790 soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE); 791 /* set out2 = interrupt unmask; off() doesn't set MCR 792 on NSLU2 */ 793 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2); 794 } 795#endif 796 797 /* Set line for power source */ 798 off(); 799 800 /* Clear registers again to be sure. */ 801 sinp(UART_LSR); 802 sinp(UART_RX); 803 sinp(UART_IIR); 804 sinp(UART_MSR); 805 806 switch (type) { 807 case LIRC_IRDEO: 808 case LIRC_IRDEO_REMOTE: 809 /* setup port to 7N1 @ 115200 Baud */ 810 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */ 811 812 /* Set DLAB 1. */ 813 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); 814 /* Set divisor to 1 => 115200 Baud */ 815 soutp(UART_DLM, 0); 816 soutp(UART_DLL, 1); 817 /* Set DLAB 0 + 7N1 */ 818 soutp(UART_LCR, UART_LCR_WLEN7); 819 /* THR interrupt already disabled at this point */ 820 break; 821 default: 822 break; 823 } 824 825 return 0; 826} 827 828static int init_port(void) 829{ 830 int i, nlow, nhigh; 831 832 /* Reserve io region. */ 833 /* 834 * Future MMAP-Developers: Attention! 835 * For memory mapped I/O you *might* need to use ioremap() first, 836 * for the NSLU2 it's done in boot code. 837 */ 838 if (((iommap != 0) 839 && (request_mem_region(iommap, 8 << ioshift, 840 LIRC_DRIVER_NAME) == NULL)) 841 || ((iommap == 0) 842 && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) { 843 printk(KERN_ERR LIRC_DRIVER_NAME 844 ": port %04x already in use\n", io); 845 printk(KERN_WARNING LIRC_DRIVER_NAME 846 ": use 'setserial /dev/ttySX uart none'\n"); 847 printk(KERN_WARNING LIRC_DRIVER_NAME 848 ": or compile the serial port driver as module and\n"); 849 printk(KERN_WARNING LIRC_DRIVER_NAME 850 ": make sure this module is loaded first\n"); 851 return -EBUSY; 852 } 853 854 if (hardware_init_port() < 0) 855 return -EINVAL; 856 857 /* Initialize pulse/space widths */ 858 init_timing_params(duty_cycle, freq); 859 860 /* If pin is high, then this must be an active low receiver. */ 861 if (sense == -1) { 862 /* wait 1/2 sec for the power supply */ 863 msleep(500); 864 865 /* 866 * probe 9 times every 0.04s, collect "votes" for 867 * active high/low 868 */ 869 nlow = 0; 870 nhigh = 0; 871 for (i = 0; i < 9; i++) { 872 if (sinp(UART_MSR) & hardware[type].signal_pin) 873 nlow++; 874 else 875 nhigh++; 876 msleep(40); 877 } 878 sense = (nlow >= nhigh ? 1 : 0); 879 printk(KERN_INFO LIRC_DRIVER_NAME ": auto-detected active " 880 "%s receiver\n", sense ? "low" : "high"); 881 } else 882 printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active " 883 "%s receiver\n", sense ? "low" : "high"); 884 885 return 0; 886} 887 888static int set_use_inc(void *data) 889{ 890 int result; 891 unsigned long flags; 892 893 /* initialize timestamp */ 894 do_gettimeofday(&lasttv); 895 896 result = request_irq(irq, irq_handler, 897 IRQF_DISABLED | (share_irq ? IRQF_SHARED : 0), 898 LIRC_DRIVER_NAME, (void *)&hardware); 899 900 switch (result) { 901 case -EBUSY: 902 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n", irq); 903 return -EBUSY; 904 case -EINVAL: 905 printk(KERN_ERR LIRC_DRIVER_NAME 906 ": Bad irq number or handler\n"); 907 return -EINVAL; 908 default: 909 dprintk("Interrupt %d, port %04x obtained\n", irq, io); 910 break; 911 }; 912 913 spin_lock_irqsave(&hardware[type].lock, flags); 914 915 /* Set DLAB 0. */ 916 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); 917 918 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI); 919 920 spin_unlock_irqrestore(&hardware[type].lock, flags); 921 922 return 0; 923} 924 925static void set_use_dec(void *data) 926{ unsigned long flags; 927 928 spin_lock_irqsave(&hardware[type].lock, flags); 929 930 /* Set DLAB 0. */ 931 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); 932 933 /* First of all, disable all interrupts */ 934 soutp(UART_IER, sinp(UART_IER) & 935 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); 936 spin_unlock_irqrestore(&hardware[type].lock, flags); 937 938 free_irq(irq, (void *)&hardware); 939 940 dprintk("freed IRQ %d\n", irq); 941} 942 943static ssize_t lirc_write(struct file *file, const char *buf, 944 size_t n, loff_t *ppos) 945{ 946 int i, count; 947 unsigned long flags; 948 long delta = 0; 949 int *wbuf; 950 951 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE)) 952 return -EBADF; 953 954 count = n / sizeof(int); 955 if (n % sizeof(int) || count % 2 == 0) 956 return -EINVAL; 957 wbuf = memdup_user(buf, n); 958 if (PTR_ERR(wbuf)) 959 return PTR_ERR(wbuf); 960 spin_lock_irqsave(&hardware[type].lock, flags); 961 if (type == LIRC_IRDEO) { 962 /* DTR, RTS down */ 963 on(); 964 } 965 for (i = 0; i < count; i++) { 966 if (i%2) 967 hardware[type].send_space(wbuf[i] - delta); 968 else 969 delta = hardware[type].send_pulse(wbuf[i]); 970 } 971 off(); 972 spin_unlock_irqrestore(&hardware[type].lock, flags); 973 return n; 974} 975 976static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 977{ 978 int result; 979 unsigned long value; 980 unsigned int ivalue; 981 982 switch (cmd) { 983 case LIRC_GET_SEND_MODE: 984 if (!(hardware[type].features&LIRC_CAN_SEND_MASK)) 985 return -ENOIOCTLCMD; 986 987 result = put_user(LIRC_SEND2MODE 988 (hardware[type].features&LIRC_CAN_SEND_MASK), 989 (unsigned long *) arg); 990 if (result) 991 return result; 992 break; 993 994 case LIRC_SET_SEND_MODE: 995 if (!(hardware[type].features&LIRC_CAN_SEND_MASK)) 996 return -ENOIOCTLCMD; 997 998 result = get_user(value, (unsigned long *) arg); 999 if (result) 1000 return result; 1001 /* only LIRC_MODE_PULSE supported */ 1002 if (value != LIRC_MODE_PULSE) 1003 return -ENOSYS; 1004 break; 1005 1006 case LIRC_GET_LENGTH: 1007 return -ENOSYS; 1008 break; 1009 1010 case LIRC_SET_SEND_DUTY_CYCLE: 1011 dprintk("SET_SEND_DUTY_CYCLE\n"); 1012 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE)) 1013 return -ENOIOCTLCMD; 1014 1015 result = get_user(ivalue, (unsigned int *) arg); 1016 if (result) 1017 return result; 1018 if (ivalue <= 0 || ivalue > 100) 1019 return -EINVAL; 1020 return init_timing_params(ivalue, freq); 1021 break; 1022 1023 case LIRC_SET_SEND_CARRIER: 1024 dprintk("SET_SEND_CARRIER\n"); 1025 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER)) 1026 return -ENOIOCTLCMD; 1027 1028 result = get_user(ivalue, (unsigned int *) arg); 1029 if (result) 1030 return result; 1031 if (ivalue > 500000 || ivalue < 20000) 1032 return -EINVAL; 1033 return init_timing_params(duty_cycle, ivalue); 1034 break; 1035 1036 default: 1037 return lirc_dev_fop_ioctl(filep, cmd, arg); 1038 } 1039 return 0; 1040} 1041 1042static const struct file_operations lirc_fops = { 1043 .owner = THIS_MODULE, 1044 .write = lirc_write, 1045 .unlocked_ioctl = lirc_ioctl, 1046 .read = lirc_dev_fop_read, 1047 .poll = lirc_dev_fop_poll, 1048 .open = lirc_dev_fop_open, 1049 .release = lirc_dev_fop_close, 1050}; 1051 1052static struct lirc_driver driver = { 1053 .name = LIRC_DRIVER_NAME, 1054 .minor = -1, 1055 .code_length = 1, 1056 .sample_rate = 0, 1057 .data = NULL, 1058 .add_to_buf = NULL, 1059 .rbuf = &rbuf, 1060 .set_use_inc = set_use_inc, 1061 .set_use_dec = set_use_dec, 1062 .fops = &lirc_fops, 1063 .dev = NULL, 1064 .owner = THIS_MODULE, 1065}; 1066 1067static struct platform_device *lirc_serial_dev; 1068 1069static int __devinit lirc_serial_probe(struct platform_device *dev) 1070{ 1071 return 0; 1072} 1073 1074static int __devexit lirc_serial_remove(struct platform_device *dev) 1075{ 1076 return 0; 1077} 1078 1079static int lirc_serial_suspend(struct platform_device *dev, 1080 pm_message_t state) 1081{ 1082 /* Set DLAB 0. */ 1083 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); 1084 1085 /* Disable all interrupts */ 1086 soutp(UART_IER, sinp(UART_IER) & 1087 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); 1088 1089 /* Clear registers. */ 1090 sinp(UART_LSR); 1091 sinp(UART_RX); 1092 sinp(UART_IIR); 1093 sinp(UART_MSR); 1094 1095 return 0; 1096} 1097 1098/* twisty maze... need a forward-declaration here... */ 1099static void lirc_serial_exit(void); 1100 1101static int lirc_serial_resume(struct platform_device *dev) 1102{ 1103 unsigned long flags; 1104 1105 if (hardware_init_port() < 0) { 1106 lirc_serial_exit(); 1107 return -EINVAL; 1108 } 1109 1110 spin_lock_irqsave(&hardware[type].lock, flags); 1111 /* Enable Interrupt */ 1112 do_gettimeofday(&lasttv); 1113 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI); 1114 off(); 1115 1116 lirc_buffer_clear(&rbuf); 1117 1118 spin_unlock_irqrestore(&hardware[type].lock, flags); 1119 1120 return 0; 1121} 1122 1123static struct platform_driver lirc_serial_driver = { 1124 .probe = lirc_serial_probe, 1125 .remove = __devexit_p(lirc_serial_remove), 1126 .suspend = lirc_serial_suspend, 1127 .resume = lirc_serial_resume, 1128 .driver = { 1129 .name = "lirc_serial", 1130 .owner = THIS_MODULE, 1131 }, 1132}; 1133 1134static int __init lirc_serial_init(void) 1135{ 1136 int result; 1137 1138 /* Init read buffer. */ 1139 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN); 1140 if (result < 0) 1141 return -ENOMEM; 1142 1143 result = platform_driver_register(&lirc_serial_driver); 1144 if (result) { 1145 printk("lirc register returned %d\n", result); 1146 goto exit_buffer_free; 1147 } 1148 1149 lirc_serial_dev = platform_device_alloc("lirc_serial", 0); 1150 if (!lirc_serial_dev) { 1151 result = -ENOMEM; 1152 goto exit_driver_unregister; 1153 } 1154 1155 result = platform_device_add(lirc_serial_dev); 1156 if (result) 1157 goto exit_device_put; 1158 1159 return 0; 1160 1161exit_device_put: 1162 platform_device_put(lirc_serial_dev); 1163exit_driver_unregister: 1164 platform_driver_unregister(&lirc_serial_driver); 1165exit_buffer_free: 1166 lirc_buffer_free(&rbuf); 1167 return result; 1168} 1169 1170static void lirc_serial_exit(void) 1171{ 1172 platform_device_unregister(lirc_serial_dev); 1173 platform_driver_unregister(&lirc_serial_driver); 1174 lirc_buffer_free(&rbuf); 1175} 1176 1177static int __init lirc_serial_init_module(void) 1178{ 1179 int result; 1180 1181 result = lirc_serial_init(); 1182 if (result) 1183 return result; 1184 1185 switch (type) { 1186 case LIRC_HOMEBREW: 1187 case LIRC_IRDEO: 1188 case LIRC_IRDEO_REMOTE: 1189 case LIRC_ANIMAX: 1190 case LIRC_IGOR: 1191 /* if nothing specified, use ttyS0/com1 and irq 4 */ 1192 io = io ? io : 0x3f8; 1193 irq = irq ? irq : 4; 1194 break; 1195#ifdef CONFIG_LIRC_SERIAL_NSLU2 1196 case LIRC_NSLU2: 1197 io = io ? io : IRQ_IXP4XX_UART2; 1198 irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET); 1199 iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS; 1200 ioshift = ioshift ? ioshift : 2; 1201 break; 1202#endif 1203 default: 1204 result = -EINVAL; 1205 goto exit_serial_exit; 1206 } 1207 if (!softcarrier) { 1208 switch (type) { 1209 case LIRC_HOMEBREW: 1210 case LIRC_IGOR: 1211#ifdef CONFIG_LIRC_SERIAL_NSLU2 1212 case LIRC_NSLU2: 1213#endif 1214 hardware[type].features &= 1215 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE| 1216 LIRC_CAN_SET_SEND_CARRIER); 1217 break; 1218 } 1219 } 1220 1221 result = init_port(); 1222 if (result < 0) 1223 goto exit_serial_exit; 1224 driver.features = hardware[type].features; 1225 driver.dev = &lirc_serial_dev->dev; 1226 driver.minor = lirc_register_driver(&driver); 1227 if (driver.minor < 0) { 1228 printk(KERN_ERR LIRC_DRIVER_NAME 1229 ": register_chrdev failed!\n"); 1230 result = -EIO; 1231 goto exit_release; 1232 } 1233 return 0; 1234exit_release: 1235 release_region(io, 8); 1236exit_serial_exit: 1237 lirc_serial_exit(); 1238 return result; 1239} 1240 1241static void __exit lirc_serial_exit_module(void) 1242{ 1243 lirc_serial_exit(); 1244 if (iommap != 0) 1245 release_mem_region(iommap, 8 << ioshift); 1246 else 1247 release_region(io, 8); 1248 lirc_unregister_driver(driver.minor); 1249 dprintk("cleaned up module\n"); 1250} 1251 1252 1253module_init(lirc_serial_init_module); 1254module_exit(lirc_serial_exit_module); 1255 1256MODULE_DESCRIPTION("Infra-red receiver driver for serial ports."); 1257MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, " 1258 "Christoph Bartelmus, Andrei Tanas"); 1259MODULE_LICENSE("GPL"); 1260 1261module_param(type, int, S_IRUGO); 1262MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo," 1263 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug," 1264 " 5 = NSLU2 RX:CTS2/TX:GreenLED)"); 1265 1266module_param(io, int, S_IRUGO); 1267MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)"); 1268 1269/* some architectures (e.g. intel xscale) have memory mapped registers */ 1270module_param(iommap, bool, S_IRUGO); 1271MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O" 1272 " (0 = no memory mapped io)"); 1273 1274/* 1275 * some architectures (e.g. intel xscale) align the 8bit serial registers 1276 * on 32bit word boundaries. 1277 * See linux-kernel/serial/8250.c serial_in()/out() 1278 */ 1279module_param(ioshift, int, S_IRUGO); 1280MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)"); 1281 1282module_param(irq, int, S_IRUGO); 1283MODULE_PARM_DESC(irq, "Interrupt (4 or 3)"); 1284 1285module_param(share_irq, bool, S_IRUGO); 1286MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)"); 1287 1288module_param(sense, bool, S_IRUGO); 1289MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit" 1290 " (0 = active high, 1 = active low )"); 1291 1292#ifdef CONFIG_LIRC_SERIAL_TRANSMITTER 1293module_param(txsense, bool, S_IRUGO); 1294MODULE_PARM_DESC(txsense, "Sense of transmitter circuit" 1295 " (0 = active high, 1 = active low )"); 1296#endif 1297 1298module_param(softcarrier, bool, S_IRUGO); 1299MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)"); 1300 1301module_param(debug, bool, S_IRUGO | S_IWUSR); 1302MODULE_PARM_DESC(debug, "Enable debugging messages"); 1303