1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved. 7 */ 8 9/* 10 * This file contains a module version of the ioc3 serial driver. This 11 * includes all the support functions needed (support functions, etc.) 12 * and the serial driver itself. 13 */ 14#include <linux/errno.h> 15#include <linux/tty.h> 16#include <linux/serial.h> 17#include <linux/circ_buf.h> 18#include <linux/serial_reg.h> 19#include <linux/module.h> 20#include <linux/pci.h> 21#include <linux/serial_core.h> 22#include <linux/ioc3.h> 23#include <linux/slab.h> 24 25/* 26 * Interesting things about the ioc3 27 */ 28 29#define LOGICAL_PORTS 2 /* rs232(0) and rs422(1) */ 30#define PORTS_PER_CARD 2 31#define LOGICAL_PORTS_PER_CARD (PORTS_PER_CARD * LOGICAL_PORTS) 32#define MAX_CARDS 8 33#define MAX_LOGICAL_PORTS (LOGICAL_PORTS_PER_CARD * MAX_CARDS) 34 35/* determine given the sio_ir what port it applies to */ 36#define GET_PORT_FROM_SIO_IR(_x) (_x & SIO_IR_SA) ? 0 : 1 37 38 39/* 40 * we have 2 logical ports (rs232, rs422) for each physical port 41 * evens are rs232, odds are rs422 42 */ 43#define GET_PHYSICAL_PORT(_x) ((_x) >> 1) 44#define GET_LOGICAL_PORT(_x) ((_x) & 1) 45#define IS_PHYSICAL_PORT(_x) !((_x) & 1) 46#define IS_RS232(_x) !((_x) & 1) 47 48static unsigned int Num_of_ioc3_cards; 49static unsigned int Submodule_slot; 50 51/* defining this will get you LOTS of great debug info */ 52//#define DEBUG_INTERRUPTS 53#define DPRINT_CONFIG(_x...) ; 54//#define DPRINT_CONFIG(_x...) printk _x 55#define NOT_PROGRESS() ; 56//#define NOT_PROGRESS() printk("%s : fails %d\n", __func__, __LINE__) 57 58/* number of characters we want to transmit to the lower level at a time */ 59#define MAX_CHARS 256 60#define FIFO_SIZE (MAX_CHARS-1) /* it's a uchar */ 61 62/* Device name we're using */ 63#define DEVICE_NAME "ttySIOC" 64#define DEVICE_MAJOR 204 65#define DEVICE_MINOR 116 66 67/* flags for next_char_state */ 68#define NCS_BREAK 0x1 69#define NCS_PARITY 0x2 70#define NCS_FRAMING 0x4 71#define NCS_OVERRUN 0x8 72 73/* cause we need SOME parameters ... */ 74#define MIN_BAUD_SUPPORTED 1200 75#define MAX_BAUD_SUPPORTED 115200 76 77/* protocol types supported */ 78#define PROTO_RS232 0 79#define PROTO_RS422 1 80 81/* Notification types */ 82#define N_DATA_READY 0x01 83#define N_OUTPUT_LOWAT 0x02 84#define N_BREAK 0x04 85#define N_PARITY_ERROR 0x08 86#define N_FRAMING_ERROR 0x10 87#define N_OVERRUN_ERROR 0x20 88#define N_DDCD 0x40 89#define N_DCTS 0x80 90 91#define N_ALL_INPUT (N_DATA_READY | N_BREAK \ 92 | N_PARITY_ERROR | N_FRAMING_ERROR \ 93 | N_OVERRUN_ERROR | N_DDCD | N_DCTS) 94 95#define N_ALL_OUTPUT N_OUTPUT_LOWAT 96 97#define N_ALL_ERRORS (N_PARITY_ERROR | N_FRAMING_ERROR \ 98 | N_OVERRUN_ERROR) 99 100#define N_ALL (N_DATA_READY | N_OUTPUT_LOWAT | N_BREAK \ 101 | N_PARITY_ERROR | N_FRAMING_ERROR \ 102 | N_OVERRUN_ERROR | N_DDCD | N_DCTS) 103 104#define SER_CLK_SPEED(prediv) ((22000000 << 1) / prediv) 105#define SER_DIVISOR(x, clk) (((clk) + (x) * 8) / ((x) * 16)) 106#define DIVISOR_TO_BAUD(div, clk) ((clk) / 16 / (div)) 107 108/* Some masks */ 109#define LCR_MASK_BITS_CHAR (UART_LCR_WLEN5 | UART_LCR_WLEN6 \ 110 | UART_LCR_WLEN7 | UART_LCR_WLEN8) 111#define LCR_MASK_STOP_BITS (UART_LCR_STOP) 112 113#define PENDING(_a, _p) (readl(&(_p)->vma->sio_ir) & (_a)->ic_enable) 114 115#define RING_BUF_SIZE 4096 116#define BUF_SIZE_BIT SBBR_L_SIZE 117#define PROD_CONS_MASK PROD_CONS_PTR_4K 118 119#define TOTAL_RING_BUF_SIZE (RING_BUF_SIZE * 4) 120 121/* driver specific - one per card */ 122struct ioc3_card { 123 struct { 124 /* uart ports are allocated here */ 125 struct uart_port icp_uart_port[LOGICAL_PORTS]; 126 /* the ioc3_port used for this port */ 127 struct ioc3_port *icp_port; 128 } ic_port[PORTS_PER_CARD]; 129 /* currently enabled interrupts */ 130 uint32_t ic_enable; 131}; 132 133/* Local port info for each IOC3 serial port */ 134struct ioc3_port { 135 /* handy reference material */ 136 struct uart_port *ip_port; 137 struct ioc3_card *ip_card; 138 struct ioc3_driver_data *ip_idd; 139 struct ioc3_submodule *ip_is; 140 141 /* pci mem addresses for this port */ 142 struct ioc3_serialregs __iomem *ip_serial_regs; 143 struct ioc3_uartregs __iomem *ip_uart_regs; 144 145 /* Ring buffer page for this port */ 146 dma_addr_t ip_dma_ringbuf; 147 /* vaddr of ring buffer */ 148 struct ring_buffer *ip_cpu_ringbuf; 149 150 /* Rings for this port */ 151 struct ring *ip_inring; 152 struct ring *ip_outring; 153 154 /* Hook to port specific values */ 155 struct port_hooks *ip_hooks; 156 157 spinlock_t ip_lock; 158 159 /* Various rx/tx parameters */ 160 int ip_baud; 161 int ip_tx_lowat; 162 int ip_rx_timeout; 163 164 /* Copy of notification bits */ 165 int ip_notify; 166 167 /* Shadow copies of various registers so we don't need to PIO 168 * read them constantly 169 */ 170 uint32_t ip_sscr; 171 uint32_t ip_tx_prod; 172 uint32_t ip_rx_cons; 173 unsigned char ip_flags; 174}; 175 176/* tx low water mark. We need to notify the driver whenever tx is getting 177 * close to empty so it can refill the tx buffer and keep things going. 178 * Let's assume that if we interrupt 1 ms before the tx goes idle, we'll 179 * have no trouble getting in more chars in time (I certainly hope so). 180 */ 181#define TX_LOWAT_LATENCY 1000 182#define TX_LOWAT_HZ (1000000 / TX_LOWAT_LATENCY) 183#define TX_LOWAT_CHARS(baud) (baud / 10 / TX_LOWAT_HZ) 184 185/* Flags per port */ 186#define INPUT_HIGH 0x01 187 /* used to signify that we have turned off the rx_high 188 * temporarily - we need to drain the fifo and don't 189 * want to get blasted with interrupts. 190 */ 191#define DCD_ON 0x02 192 /* DCD state is on */ 193#define LOWAT_WRITTEN 0x04 194#define READ_ABORTED 0x08 195 /* the read was aborted - used to avaoid infinate looping 196 * in the interrupt handler 197 */ 198#define INPUT_ENABLE 0x10 199 200/* Since each port has different register offsets and bitmasks 201 * for everything, we'll store those that we need in tables so we 202 * don't have to be constantly checking the port we are dealing with. 203 */ 204struct port_hooks { 205 uint32_t intr_delta_dcd; 206 uint32_t intr_delta_cts; 207 uint32_t intr_tx_mt; 208 uint32_t intr_rx_timer; 209 uint32_t intr_rx_high; 210 uint32_t intr_tx_explicit; 211 uint32_t intr_clear; 212 uint32_t intr_all; 213 char rs422_select_pin; 214}; 215 216static struct port_hooks hooks_array[PORTS_PER_CARD] = { 217 /* values for port A */ 218 { 219 .intr_delta_dcd = SIO_IR_SA_DELTA_DCD, 220 .intr_delta_cts = SIO_IR_SA_DELTA_CTS, 221 .intr_tx_mt = SIO_IR_SA_TX_MT, 222 .intr_rx_timer = SIO_IR_SA_RX_TIMER, 223 .intr_rx_high = SIO_IR_SA_RX_HIGH, 224 .intr_tx_explicit = SIO_IR_SA_TX_EXPLICIT, 225 .intr_clear = (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL 226 | SIO_IR_SA_RX_HIGH 227 | SIO_IR_SA_RX_TIMER 228 | SIO_IR_SA_DELTA_DCD 229 | SIO_IR_SA_DELTA_CTS 230 | SIO_IR_SA_INT 231 | SIO_IR_SA_TX_EXPLICIT 232 | SIO_IR_SA_MEMERR), 233 .intr_all = SIO_IR_SA, 234 .rs422_select_pin = GPPR_UARTA_MODESEL_PIN, 235 }, 236 237 /* values for port B */ 238 { 239 .intr_delta_dcd = SIO_IR_SB_DELTA_DCD, 240 .intr_delta_cts = SIO_IR_SB_DELTA_CTS, 241 .intr_tx_mt = SIO_IR_SB_TX_MT, 242 .intr_rx_timer = SIO_IR_SB_RX_TIMER, 243 .intr_rx_high = SIO_IR_SB_RX_HIGH, 244 .intr_tx_explicit = SIO_IR_SB_TX_EXPLICIT, 245 .intr_clear = (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL 246 | SIO_IR_SB_RX_HIGH 247 | SIO_IR_SB_RX_TIMER 248 | SIO_IR_SB_DELTA_DCD 249 | SIO_IR_SB_DELTA_CTS 250 | SIO_IR_SB_INT 251 | SIO_IR_SB_TX_EXPLICIT 252 | SIO_IR_SB_MEMERR), 253 .intr_all = SIO_IR_SB, 254 .rs422_select_pin = GPPR_UARTB_MODESEL_PIN, 255 } 256}; 257 258struct ring_entry { 259 union { 260 struct { 261 uint32_t alldata; 262 uint32_t allsc; 263 } all; 264 struct { 265 char data[4]; /* data bytes */ 266 char sc[4]; /* status/control */ 267 } s; 268 } u; 269}; 270 271/* Test the valid bits in any of the 4 sc chars using "allsc" member */ 272#define RING_ANY_VALID \ 273 ((uint32_t)(RXSB_MODEM_VALID | RXSB_DATA_VALID) * 0x01010101) 274 275#define ring_sc u.s.sc 276#define ring_data u.s.data 277#define ring_allsc u.all.allsc 278 279/* Number of entries per ring buffer. */ 280#define ENTRIES_PER_RING (RING_BUF_SIZE / (int) sizeof(struct ring_entry)) 281 282/* An individual ring */ 283struct ring { 284 struct ring_entry entries[ENTRIES_PER_RING]; 285}; 286 287/* The whole enchilada */ 288struct ring_buffer { 289 struct ring TX_A; 290 struct ring RX_A; 291 struct ring TX_B; 292 struct ring RX_B; 293}; 294 295/* Get a ring from a port struct */ 296#define RING(_p, _wh) &(((struct ring_buffer *)((_p)->ip_cpu_ringbuf))->_wh) 297 298/* for Infinite loop detection */ 299#define MAXITER 10000000 300 301 302/** 303 * set_baud - Baud rate setting code 304 * @port: port to set 305 * @baud: baud rate to use 306 */ 307static int set_baud(struct ioc3_port *port, int baud) 308{ 309 int divisor; 310 int actual_baud; 311 int diff; 312 int lcr, prediv; 313 struct ioc3_uartregs __iomem *uart; 314 315 for (prediv = 6; prediv < 64; prediv++) { 316 divisor = SER_DIVISOR(baud, SER_CLK_SPEED(prediv)); 317 if (!divisor) 318 continue; /* invalid divisor */ 319 actual_baud = DIVISOR_TO_BAUD(divisor, SER_CLK_SPEED(prediv)); 320 321 diff = actual_baud - baud; 322 if (diff < 0) 323 diff = -diff; 324 325 /* if we're within 1% we've found a match */ 326 if (diff * 100 <= actual_baud) 327 break; 328 } 329 330 /* if the above loop completed, we didn't match 331 * the baud rate. give up. 332 */ 333 if (prediv == 64) { 334 NOT_PROGRESS(); 335 return 1; 336 } 337 338 uart = port->ip_uart_regs; 339 lcr = readb(&uart->iu_lcr); 340 341 writeb(lcr | UART_LCR_DLAB, &uart->iu_lcr); 342 writeb((unsigned char)divisor, &uart->iu_dll); 343 writeb((unsigned char)(divisor >> 8), &uart->iu_dlm); 344 writeb((unsigned char)prediv, &uart->iu_scr); 345 writeb((unsigned char)lcr, &uart->iu_lcr); 346 347 return 0; 348} 349 350/** 351 * get_ioc3_port - given a uart port, return the control structure 352 * @the_port: uart port to find 353 */ 354static struct ioc3_port *get_ioc3_port(struct uart_port *the_port) 355{ 356 struct ioc3_driver_data *idd = dev_get_drvdata(the_port->dev); 357 struct ioc3_card *card_ptr = idd->data[Submodule_slot]; 358 int ii, jj; 359 360 if (!card_ptr) { 361 NOT_PROGRESS(); 362 return NULL; 363 } 364 for (ii = 0; ii < PORTS_PER_CARD; ii++) { 365 for (jj = 0; jj < LOGICAL_PORTS; jj++) { 366 if (the_port == &card_ptr->ic_port[ii].icp_uart_port[jj]) 367 return card_ptr->ic_port[ii].icp_port; 368 } 369 } 370 NOT_PROGRESS(); 371 return NULL; 372} 373 374/** 375 * port_init - Initialize the sio and ioc3 hardware for a given port 376 * called per port from attach... 377 * @port: port to initialize 378 */ 379static int inline port_init(struct ioc3_port *port) 380{ 381 uint32_t sio_cr; 382 struct port_hooks *hooks = port->ip_hooks; 383 struct ioc3_uartregs __iomem *uart; 384 int reset_loop_counter = 0xfffff; 385 struct ioc3_driver_data *idd = port->ip_idd; 386 387 /* Idle the IOC3 serial interface */ 388 writel(SSCR_RESET, &port->ip_serial_regs->sscr); 389 390 /* Wait until any pending bus activity for this port has ceased */ 391 do { 392 sio_cr = readl(&idd->vma->sio_cr); 393 if (reset_loop_counter-- <= 0) { 394 printk(KERN_WARNING 395 "IOC3 unable to come out of reset" 396 " scr 0x%x\n", sio_cr); 397 return -1; 398 } 399 } while (!(sio_cr & SIO_CR_ARB_DIAG_IDLE) && 400 (((sio_cr &= SIO_CR_ARB_DIAG) == SIO_CR_ARB_DIAG_TXA) 401 || sio_cr == SIO_CR_ARB_DIAG_TXB 402 || sio_cr == SIO_CR_ARB_DIAG_RXA 403 || sio_cr == SIO_CR_ARB_DIAG_RXB)); 404 405 /* Finish reset sequence */ 406 writel(0, &port->ip_serial_regs->sscr); 407 408 /* Once RESET is done, reload cached tx_prod and rx_cons values 409 * and set rings to empty by making prod == cons 410 */ 411 port->ip_tx_prod = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK; 412 writel(port->ip_tx_prod, &port->ip_serial_regs->stpir); 413 port->ip_rx_cons = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK; 414 writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir); 415 416 /* Disable interrupts for this 16550 */ 417 uart = port->ip_uart_regs; 418 writeb(0, &uart->iu_lcr); 419 writeb(0, &uart->iu_ier); 420 421 /* Set the default baud */ 422 set_baud(port, port->ip_baud); 423 424 /* Set line control to 8 bits no parity */ 425 writeb(UART_LCR_WLEN8 | 0, &uart->iu_lcr); 426 /* UART_LCR_STOP == 1 stop */ 427 428 /* Enable the FIFOs */ 429 writeb(UART_FCR_ENABLE_FIFO, &uart->iu_fcr); 430 /* then reset 16550 FIFOs */ 431 writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, 432 &uart->iu_fcr); 433 434 /* Clear modem control register */ 435 writeb(0, &uart->iu_mcr); 436 437 /* Clear deltas in modem status register */ 438 writel(0, &port->ip_serial_regs->shadow); 439 440 /* Only do this once per port pair */ 441 if (port->ip_hooks == &hooks_array[0]) { 442 unsigned long ring_pci_addr; 443 uint32_t __iomem *sbbr_l, *sbbr_h; 444 445 sbbr_l = &idd->vma->sbbr_l; 446 sbbr_h = &idd->vma->sbbr_h; 447 ring_pci_addr = (unsigned long __iomem)port->ip_dma_ringbuf; 448 DPRINT_CONFIG(("%s: ring_pci_addr 0x%p\n", 449 __func__, (void *)ring_pci_addr)); 450 451 writel((unsigned int)((uint64_t) ring_pci_addr >> 32), sbbr_h); 452 writel((unsigned int)ring_pci_addr | BUF_SIZE_BIT, sbbr_l); 453 } 454 455 /* Set the receive timeout value to 10 msec */ 456 writel(SRTR_HZ / 100, &port->ip_serial_regs->srtr); 457 458 /* Set rx threshold, enable DMA */ 459 /* Set high water mark at 3/4 of full ring */ 460 port->ip_sscr = (ENTRIES_PER_RING * 3 / 4); 461 462 port->ip_sscr |= SSCR_HIGH_SPD; 463 464 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 465 466 /* Disable and clear all serial related interrupt bits */ 467 port->ip_card->ic_enable &= ~hooks->intr_clear; 468 ioc3_disable(port->ip_is, idd, hooks->intr_clear); 469 ioc3_ack(port->ip_is, idd, hooks->intr_clear); 470 return 0; 471} 472 473/** 474 * enable_intrs - enable interrupts 475 * @port: port to enable 476 * @mask: mask to use 477 */ 478static void enable_intrs(struct ioc3_port *port, uint32_t mask) 479{ 480 if ((port->ip_card->ic_enable & mask) != mask) { 481 port->ip_card->ic_enable |= mask; 482 ioc3_enable(port->ip_is, port->ip_idd, mask); 483 } 484} 485 486/** 487 * local_open - local open a port 488 * @port: port to open 489 */ 490static inline int local_open(struct ioc3_port *port) 491{ 492 int spiniter = 0; 493 494 port->ip_flags = INPUT_ENABLE; 495 496 /* Pause the DMA interface if necessary */ 497 if (port->ip_sscr & SSCR_DMA_EN) { 498 writel(port->ip_sscr | SSCR_DMA_PAUSE, 499 &port->ip_serial_regs->sscr); 500 while ((readl(&port->ip_serial_regs->sscr) 501 & SSCR_PAUSE_STATE) == 0) { 502 spiniter++; 503 if (spiniter > MAXITER) { 504 NOT_PROGRESS(); 505 return -1; 506 } 507 } 508 } 509 510 /* Reset the input fifo. If the uart received chars while the port 511 * was closed and DMA is not enabled, the uart may have a bunch of 512 * chars hanging around in its rx fifo which will not be discarded 513 * by rclr in the upper layer. We must get rid of them here. 514 */ 515 writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR, 516 &port->ip_uart_regs->iu_fcr); 517 518 writeb(UART_LCR_WLEN8, &port->ip_uart_regs->iu_lcr); 519 /* UART_LCR_STOP == 1 stop */ 520 521 /* Re-enable DMA, set default threshold to intr whenever there is 522 * data available. 523 */ 524 port->ip_sscr &= ~SSCR_RX_THRESHOLD; 525 port->ip_sscr |= 1; /* default threshold */ 526 527 /* Plug in the new sscr. This implicitly clears the DMA_PAUSE 528 * flag if it was set above 529 */ 530 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 531 port->ip_tx_lowat = 1; 532 return 0; 533} 534 535/** 536 * set_rx_timeout - Set rx timeout and threshold values. 537 * @port: port to use 538 * @timeout: timeout value in ticks 539 */ 540static inline int set_rx_timeout(struct ioc3_port *port, int timeout) 541{ 542 int threshold; 543 544 port->ip_rx_timeout = timeout; 545 546 /* Timeout is in ticks. Let's figure out how many chars we 547 * can receive at the current baud rate in that interval 548 * and set the rx threshold to that amount. There are 4 chars 549 * per ring entry, so we'll divide the number of chars that will 550 * arrive in timeout by 4. 551 * So .... timeout * baud / 10 / HZ / 4, with HZ = 100. 552 */ 553 threshold = timeout * port->ip_baud / 4000; 554 if (threshold == 0) 555 threshold = 1; /* otherwise we'll intr all the time! */ 556 557 if ((unsigned)threshold > (unsigned)SSCR_RX_THRESHOLD) 558 return 1; 559 560 port->ip_sscr &= ~SSCR_RX_THRESHOLD; 561 port->ip_sscr |= threshold; 562 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 563 564 /* Now set the rx timeout to the given value 565 * again timeout * SRTR_HZ / HZ 566 */ 567 timeout = timeout * SRTR_HZ / 100; 568 if (timeout > SRTR_CNT) 569 timeout = SRTR_CNT; 570 writel(timeout, &port->ip_serial_regs->srtr); 571 return 0; 572} 573 574/** 575 * config_port - config the hardware 576 * @port: port to config 577 * @baud: baud rate for the port 578 * @byte_size: data size 579 * @stop_bits: number of stop bits 580 * @parenb: parity enable ? 581 * @parodd: odd parity ? 582 */ 583static inline int 584config_port(struct ioc3_port *port, 585 int baud, int byte_size, int stop_bits, int parenb, int parodd) 586{ 587 char lcr, sizebits; 588 int spiniter = 0; 589 590 DPRINT_CONFIG(("%s: line %d baud %d byte_size %d stop %d parenb %d " 591 "parodd %d\n", 592 __func__, ((struct uart_port *)port->ip_port)->line, 593 baud, byte_size, stop_bits, parenb, parodd)); 594 595 if (set_baud(port, baud)) 596 return 1; 597 598 switch (byte_size) { 599 case 5: 600 sizebits = UART_LCR_WLEN5; 601 break; 602 case 6: 603 sizebits = UART_LCR_WLEN6; 604 break; 605 case 7: 606 sizebits = UART_LCR_WLEN7; 607 break; 608 case 8: 609 sizebits = UART_LCR_WLEN8; 610 break; 611 default: 612 return 1; 613 } 614 615 /* Pause the DMA interface if necessary */ 616 if (port->ip_sscr & SSCR_DMA_EN) { 617 writel(port->ip_sscr | SSCR_DMA_PAUSE, 618 &port->ip_serial_regs->sscr); 619 while ((readl(&port->ip_serial_regs->sscr) 620 & SSCR_PAUSE_STATE) == 0) { 621 spiniter++; 622 if (spiniter > MAXITER) 623 return -1; 624 } 625 } 626 627 /* Clear relevant fields in lcr */ 628 lcr = readb(&port->ip_uart_regs->iu_lcr); 629 lcr &= ~(LCR_MASK_BITS_CHAR | UART_LCR_EPAR | 630 UART_LCR_PARITY | LCR_MASK_STOP_BITS); 631 632 /* Set byte size in lcr */ 633 lcr |= sizebits; 634 635 /* Set parity */ 636 if (parenb) { 637 lcr |= UART_LCR_PARITY; 638 if (!parodd) 639 lcr |= UART_LCR_EPAR; 640 } 641 642 /* Set stop bits */ 643 if (stop_bits) 644 lcr |= UART_LCR_STOP /* 2 stop bits */ ; 645 646 writeb(lcr, &port->ip_uart_regs->iu_lcr); 647 648 /* Re-enable the DMA interface if necessary */ 649 if (port->ip_sscr & SSCR_DMA_EN) { 650 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 651 } 652 port->ip_baud = baud; 653 654 /* When we get within this number of ring entries of filling the 655 * entire ring on tx, place an EXPLICIT intr to generate a lowat 656 * notification when output has drained. 657 */ 658 port->ip_tx_lowat = (TX_LOWAT_CHARS(baud) + 3) / 4; 659 if (port->ip_tx_lowat == 0) 660 port->ip_tx_lowat = 1; 661 662 set_rx_timeout(port, 2); 663 return 0; 664} 665 666/** 667 * do_write - Write bytes to the port. Returns the number of bytes 668 * actually written. Called from transmit_chars 669 * @port: port to use 670 * @buf: the stuff to write 671 * @len: how many bytes in 'buf' 672 */ 673static inline int do_write(struct ioc3_port *port, char *buf, int len) 674{ 675 int prod_ptr, cons_ptr, total = 0; 676 struct ring *outring; 677 struct ring_entry *entry; 678 struct port_hooks *hooks = port->ip_hooks; 679 680 BUG_ON(!(len >= 0)); 681 682 prod_ptr = port->ip_tx_prod; 683 cons_ptr = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK; 684 outring = port->ip_outring; 685 686 /* Maintain a 1-entry red-zone. The ring buffer is full when 687 * (cons - prod) % ring_size is 1. Rather than do this subtraction 688 * in the body of the loop, I'll do it now. 689 */ 690 cons_ptr = (cons_ptr - (int)sizeof(struct ring_entry)) & PROD_CONS_MASK; 691 692 /* Stuff the bytes into the output */ 693 while ((prod_ptr != cons_ptr) && (len > 0)) { 694 int xx; 695 696 /* Get 4 bytes (one ring entry) at a time */ 697 entry = (struct ring_entry *)((caddr_t) outring + prod_ptr); 698 699 /* Invalidate all entries */ 700 entry->ring_allsc = 0; 701 702 /* Copy in some bytes */ 703 for (xx = 0; (xx < 4) && (len > 0); xx++) { 704 entry->ring_data[xx] = *buf++; 705 entry->ring_sc[xx] = TXCB_VALID; 706 len--; 707 total++; 708 } 709 710 /* If we are within some small threshold of filling up the 711 * entire ring buffer, we must place an EXPLICIT intr here 712 * to generate a lowat interrupt in case we subsequently 713 * really do fill up the ring and the caller goes to sleep. 714 * No need to place more than one though. 715 */ 716 if (!(port->ip_flags & LOWAT_WRITTEN) && 717 ((cons_ptr - prod_ptr) & PROD_CONS_MASK) 718 <= port->ip_tx_lowat * (int)sizeof(struct ring_entry)) { 719 port->ip_flags |= LOWAT_WRITTEN; 720 entry->ring_sc[0] |= TXCB_INT_WHEN_DONE; 721 } 722 723 /* Go on to next entry */ 724 prod_ptr += sizeof(struct ring_entry); 725 prod_ptr &= PROD_CONS_MASK; 726 } 727 728 /* If we sent something, start DMA if necessary */ 729 if (total > 0 && !(port->ip_sscr & SSCR_DMA_EN)) { 730 port->ip_sscr |= SSCR_DMA_EN; 731 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 732 } 733 734 /* Store the new producer pointer. If tx is disabled, we stuff the 735 * data into the ring buffer, but we don't actually start tx. 736 */ 737 if (!uart_tx_stopped(port->ip_port)) { 738 writel(prod_ptr, &port->ip_serial_regs->stpir); 739 740 /* If we are now transmitting, enable tx_mt interrupt so we 741 * can disable DMA if necessary when the tx finishes. 742 */ 743 if (total > 0) 744 enable_intrs(port, hooks->intr_tx_mt); 745 } 746 port->ip_tx_prod = prod_ptr; 747 748 return total; 749} 750 751/** 752 * disable_intrs - disable interrupts 753 * @port: port to enable 754 * @mask: mask to use 755 */ 756static inline void disable_intrs(struct ioc3_port *port, uint32_t mask) 757{ 758 if (port->ip_card->ic_enable & mask) { 759 ioc3_disable(port->ip_is, port->ip_idd, mask); 760 port->ip_card->ic_enable &= ~mask; 761 } 762} 763 764/** 765 * set_notification - Modify event notification 766 * @port: port to use 767 * @mask: events mask 768 * @set_on: set ? 769 */ 770static int set_notification(struct ioc3_port *port, int mask, int set_on) 771{ 772 struct port_hooks *hooks = port->ip_hooks; 773 uint32_t intrbits, sscrbits; 774 775 BUG_ON(!mask); 776 777 intrbits = sscrbits = 0; 778 779 if (mask & N_DATA_READY) 780 intrbits |= (hooks->intr_rx_timer | hooks->intr_rx_high); 781 if (mask & N_OUTPUT_LOWAT) 782 intrbits |= hooks->intr_tx_explicit; 783 if (mask & N_DDCD) { 784 intrbits |= hooks->intr_delta_dcd; 785 sscrbits |= SSCR_RX_RING_DCD; 786 } 787 if (mask & N_DCTS) 788 intrbits |= hooks->intr_delta_cts; 789 790 if (set_on) { 791 enable_intrs(port, intrbits); 792 port->ip_notify |= mask; 793 port->ip_sscr |= sscrbits; 794 } else { 795 disable_intrs(port, intrbits); 796 port->ip_notify &= ~mask; 797 port->ip_sscr &= ~sscrbits; 798 } 799 800 /* We require DMA if either DATA_READY or DDCD notification is 801 * currently requested. If neither of these is requested and 802 * there is currently no tx in progress, DMA may be disabled. 803 */ 804 if (port->ip_notify & (N_DATA_READY | N_DDCD)) 805 port->ip_sscr |= SSCR_DMA_EN; 806 else if (!(port->ip_card->ic_enable & hooks->intr_tx_mt)) 807 port->ip_sscr &= ~SSCR_DMA_EN; 808 809 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 810 return 0; 811} 812 813/** 814 * set_mcr - set the master control reg 815 * @the_port: port to use 816 * @mask1: mcr mask 817 * @mask2: shadow mask 818 */ 819static inline int set_mcr(struct uart_port *the_port, 820 int mask1, int mask2) 821{ 822 struct ioc3_port *port = get_ioc3_port(the_port); 823 uint32_t shadow; 824 int spiniter = 0; 825 char mcr; 826 827 if (!port) 828 return -1; 829 830 /* Pause the DMA interface if necessary */ 831 if (port->ip_sscr & SSCR_DMA_EN) { 832 writel(port->ip_sscr | SSCR_DMA_PAUSE, 833 &port->ip_serial_regs->sscr); 834 while ((readl(&port->ip_serial_regs->sscr) 835 & SSCR_PAUSE_STATE) == 0) { 836 spiniter++; 837 if (spiniter > MAXITER) 838 return -1; 839 } 840 } 841 shadow = readl(&port->ip_serial_regs->shadow); 842 mcr = (shadow & 0xff000000) >> 24; 843 844 /* Set new value */ 845 mcr |= mask1; 846 shadow |= mask2; 847 writeb(mcr, &port->ip_uart_regs->iu_mcr); 848 writel(shadow, &port->ip_serial_regs->shadow); 849 850 /* Re-enable the DMA interface if necessary */ 851 if (port->ip_sscr & SSCR_DMA_EN) { 852 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 853 } 854 return 0; 855} 856 857/** 858 * ioc3_set_proto - set the protocol for the port 859 * @port: port to use 860 * @proto: protocol to use 861 */ 862static int ioc3_set_proto(struct ioc3_port *port, int proto) 863{ 864 struct port_hooks *hooks = port->ip_hooks; 865 866 switch (proto) { 867 default: 868 case PROTO_RS232: 869 /* Clear the appropriate GIO pin */ 870 DPRINT_CONFIG(("%s: rs232\n", __func__)); 871 writel(0, (&port->ip_idd->vma->gppr[0] 872 + hooks->rs422_select_pin)); 873 break; 874 875 case PROTO_RS422: 876 /* Set the appropriate GIO pin */ 877 DPRINT_CONFIG(("%s: rs422\n", __func__)); 878 writel(1, (&port->ip_idd->vma->gppr[0] 879 + hooks->rs422_select_pin)); 880 break; 881 } 882 return 0; 883} 884 885/** 886 * transmit_chars - upper level write, called with the_port->lock 887 * @the_port: port to write 888 */ 889static void transmit_chars(struct uart_port *the_port) 890{ 891 int xmit_count, tail, head; 892 int result; 893 char *start; 894 struct tty_struct *tty; 895 struct ioc3_port *port = get_ioc3_port(the_port); 896 struct uart_state *state; 897 898 if (!the_port) 899 return; 900 if (!port) 901 return; 902 903 state = the_port->state; 904 tty = state->port.tty; 905 906 if (uart_circ_empty(&state->xmit) || uart_tx_stopped(the_port)) { 907 /* Nothing to do or hw stopped */ 908 set_notification(port, N_ALL_OUTPUT, 0); 909 return; 910 } 911 912 head = state->xmit.head; 913 tail = state->xmit.tail; 914 start = (char *)&state->xmit.buf[tail]; 915 916 /* write out all the data or until the end of the buffer */ 917 xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail); 918 if (xmit_count > 0) { 919 result = do_write(port, start, xmit_count); 920 if (result > 0) { 921 /* booking */ 922 xmit_count -= result; 923 the_port->icount.tx += result; 924 /* advance the pointers */ 925 tail += result; 926 tail &= UART_XMIT_SIZE - 1; 927 state->xmit.tail = tail; 928 start = (char *)&state->xmit.buf[tail]; 929 } 930 } 931 if (uart_circ_chars_pending(&state->xmit) < WAKEUP_CHARS) 932 uart_write_wakeup(the_port); 933 934 if (uart_circ_empty(&state->xmit)) { 935 set_notification(port, N_OUTPUT_LOWAT, 0); 936 } else { 937 set_notification(port, N_OUTPUT_LOWAT, 1); 938 } 939} 940 941/** 942 * ioc3_change_speed - change the speed of the port 943 * @the_port: port to change 944 * @new_termios: new termios settings 945 * @old_termios: old termios settings 946 */ 947static void 948ioc3_change_speed(struct uart_port *the_port, 949 struct ktermios *new_termios, struct ktermios *old_termios) 950{ 951 struct ioc3_port *port = get_ioc3_port(the_port); 952 unsigned int cflag, iflag; 953 int baud; 954 int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8; 955 struct uart_state *state = the_port->state; 956 957 cflag = new_termios->c_cflag; 958 iflag = new_termios->c_iflag; 959 960 switch (cflag & CSIZE) { 961 case CS5: 962 new_data = 5; 963 break; 964 case CS6: 965 new_data = 6; 966 break; 967 case CS7: 968 new_data = 7; 969 break; 970 case CS8: 971 new_data = 8; 972 break; 973 default: 974 /* cuz we always need a default ... */ 975 new_data = 5; 976 break; 977 } 978 if (cflag & CSTOPB) { 979 new_stop = 1; 980 } 981 if (cflag & PARENB) { 982 new_parity_enable = 1; 983 if (cflag & PARODD) 984 new_parity = 1; 985 } 986 baud = uart_get_baud_rate(the_port, new_termios, old_termios, 987 MIN_BAUD_SUPPORTED, MAX_BAUD_SUPPORTED); 988 DPRINT_CONFIG(("%s: returned baud %d for line %d\n", __func__, baud, 989 the_port->line)); 990 991 if (!the_port->fifosize) 992 the_port->fifosize = FIFO_SIZE; 993 uart_update_timeout(the_port, cflag, baud); 994 995 the_port->ignore_status_mask = N_ALL_INPUT; 996 997 state->port.tty->low_latency = 1; 998 999 if (iflag & IGNPAR) 1000 the_port->ignore_status_mask &= ~(N_PARITY_ERROR 1001 | N_FRAMING_ERROR); 1002 if (iflag & IGNBRK) { 1003 the_port->ignore_status_mask &= ~N_BREAK; 1004 if (iflag & IGNPAR) 1005 the_port->ignore_status_mask &= ~N_OVERRUN_ERROR; 1006 } 1007 if (!(cflag & CREAD)) { 1008 /* ignore everything */ 1009 the_port->ignore_status_mask &= ~N_DATA_READY; 1010 } 1011 1012 if (cflag & CRTSCTS) { 1013 /* enable hardware flow control */ 1014 port->ip_sscr |= SSCR_HFC_EN; 1015 } 1016 else { 1017 /* disable hardware flow control */ 1018 port->ip_sscr &= ~SSCR_HFC_EN; 1019 } 1020 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 1021 1022 /* Set the configuration and proper notification call */ 1023 DPRINT_CONFIG(("%s : port 0x%p line %d cflag 0%o " 1024 "config_port(baud %d data %d stop %d penable %d " 1025 " parity %d), notification 0x%x\n", 1026 __func__, (void *)port, the_port->line, cflag, baud, 1027 new_data, new_stop, new_parity_enable, new_parity, 1028 the_port->ignore_status_mask)); 1029 1030 if ((config_port(port, baud, /* baud */ 1031 new_data, /* byte size */ 1032 new_stop, /* stop bits */ 1033 new_parity_enable, /* set parity */ 1034 new_parity)) >= 0) { /* parity 1==odd */ 1035 set_notification(port, the_port->ignore_status_mask, 1); 1036 } 1037} 1038 1039/** 1040 * ic3_startup_local - Start up the serial port - returns >= 0 if no errors 1041 * @the_port: Port to operate on 1042 */ 1043static inline int ic3_startup_local(struct uart_port *the_port) 1044{ 1045 struct ioc3_port *port; 1046 1047 if (!the_port) { 1048 NOT_PROGRESS(); 1049 return -1; 1050 } 1051 1052 port = get_ioc3_port(the_port); 1053 if (!port) { 1054 NOT_PROGRESS(); 1055 return -1; 1056 } 1057 1058 local_open(port); 1059 1060 /* set the protocol */ 1061 ioc3_set_proto(port, IS_RS232(the_port->line) ? PROTO_RS232 : 1062 PROTO_RS422); 1063 return 0; 1064} 1065 1066/* 1067 * ioc3_cb_output_lowat - called when the output low water mark is hit 1068 * @port: port to output 1069 */ 1070static void ioc3_cb_output_lowat(struct ioc3_port *port) 1071{ 1072 unsigned long pflags; 1073 1074 /* the_port->lock is set on the call here */ 1075 if (port->ip_port) { 1076 spin_lock_irqsave(&port->ip_port->lock, pflags); 1077 transmit_chars(port->ip_port); 1078 spin_unlock_irqrestore(&port->ip_port->lock, pflags); 1079 } 1080} 1081 1082/* 1083 * ioc3_cb_post_ncs - called for some basic errors 1084 * @port: port to use 1085 * @ncs: event 1086 */ 1087static void ioc3_cb_post_ncs(struct uart_port *the_port, int ncs) 1088{ 1089 struct uart_icount *icount; 1090 1091 icount = &the_port->icount; 1092 1093 if (ncs & NCS_BREAK) 1094 icount->brk++; 1095 if (ncs & NCS_FRAMING) 1096 icount->frame++; 1097 if (ncs & NCS_OVERRUN) 1098 icount->overrun++; 1099 if (ncs & NCS_PARITY) 1100 icount->parity++; 1101} 1102 1103/** 1104 * do_read - Read in bytes from the port. Return the number of bytes 1105 * actually read. 1106 * @the_port: port to use 1107 * @buf: place to put the stuff we read 1108 * @len: how big 'buf' is 1109 */ 1110 1111static inline int do_read(struct uart_port *the_port, char *buf, int len) 1112{ 1113 int prod_ptr, cons_ptr, total; 1114 struct ioc3_port *port = get_ioc3_port(the_port); 1115 struct ring *inring; 1116 struct ring_entry *entry; 1117 struct port_hooks *hooks = port->ip_hooks; 1118 int byte_num; 1119 char *sc; 1120 int loop_counter; 1121 1122 BUG_ON(!(len >= 0)); 1123 BUG_ON(!port); 1124 1125 /* There is a nasty timing issue in the IOC3. When the rx_timer 1126 * expires or the rx_high condition arises, we take an interrupt. 1127 * At some point while servicing the interrupt, we read bytes from 1128 * the ring buffer and re-arm the rx_timer. However the rx_timer is 1129 * not started until the first byte is received *after* it is armed, 1130 * and any bytes pending in the rx construction buffers are not drained 1131 * to memory until either there are 4 bytes available or the rx_timer 1132 * expires. This leads to a potential situation where data is left 1133 * in the construction buffers forever - 1 to 3 bytes were received 1134 * after the interrupt was generated but before the rx_timer was 1135 * re-armed. At that point as long as no subsequent bytes are received 1136 * the timer will never be started and the bytes will remain in the 1137 * construction buffer forever. The solution is to execute a DRAIN 1138 * command after rearming the timer. This way any bytes received before 1139 * the DRAIN will be drained to memory, and any bytes received after 1140 * the DRAIN will start the TIMER and be drained when it expires. 1141 * Luckily, this only needs to be done when the DMA buffer is empty 1142 * since there is no requirement that this function return all 1143 * available data as long as it returns some. 1144 */ 1145 /* Re-arm the timer */ 1146 1147 writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir); 1148 1149 prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK; 1150 cons_ptr = port->ip_rx_cons; 1151 1152 if (prod_ptr == cons_ptr) { 1153 int reset_dma = 0; 1154 1155 /* Input buffer appears empty, do a flush. */ 1156 1157 /* DMA must be enabled for this to work. */ 1158 if (!(port->ip_sscr & SSCR_DMA_EN)) { 1159 port->ip_sscr |= SSCR_DMA_EN; 1160 reset_dma = 1; 1161 } 1162 1163 /* Potential race condition: we must reload the srpir after 1164 * issuing the drain command, otherwise we could think the rx 1165 * buffer is empty, then take a very long interrupt, and when 1166 * we come back it's full and we wait forever for the drain to 1167 * complete. 1168 */ 1169 writel(port->ip_sscr | SSCR_RX_DRAIN, 1170 &port->ip_serial_regs->sscr); 1171 prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK; 1172 1173 /* We must not wait for the DRAIN to complete unless there are 1174 * at least 8 bytes (2 ring entries) available to receive the 1175 * data otherwise the DRAIN will never complete and we'll 1176 * deadlock here. 1177 * In fact, to make things easier, I'll just ignore the flush if 1178 * there is any data at all now available. 1179 */ 1180 if (prod_ptr == cons_ptr) { 1181 loop_counter = 0; 1182 while (readl(&port->ip_serial_regs->sscr) & 1183 SSCR_RX_DRAIN) { 1184 loop_counter++; 1185 if (loop_counter > MAXITER) 1186 return -1; 1187 } 1188 1189 /* SIGH. We have to reload the prod_ptr *again* since 1190 * the drain may have caused it to change 1191 */ 1192 prod_ptr = readl(&port->ip_serial_regs->srpir) 1193 & PROD_CONS_MASK; 1194 } 1195 if (reset_dma) { 1196 port->ip_sscr &= ~SSCR_DMA_EN; 1197 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 1198 } 1199 } 1200 inring = port->ip_inring; 1201 port->ip_flags &= ~READ_ABORTED; 1202 1203 total = 0; 1204 loop_counter = 0xfffff; /* to avoid hangs */ 1205 1206 /* Grab bytes from the hardware */ 1207 while ((prod_ptr != cons_ptr) && (len > 0)) { 1208 entry = (struct ring_entry *)((caddr_t) inring + cons_ptr); 1209 1210 if (loop_counter-- <= 0) { 1211 printk(KERN_WARNING "IOC3 serial: " 1212 "possible hang condition/" 1213 "port stuck on read (line %d).\n", 1214 the_port->line); 1215 break; 1216 } 1217 1218 /* According to the producer pointer, this ring entry 1219 * must contain some data. But if the PIO happened faster 1220 * than the DMA, the data may not be available yet, so let's 1221 * wait until it arrives. 1222 */ 1223 if ((entry->ring_allsc & RING_ANY_VALID) == 0) { 1224 /* Indicate the read is aborted so we don't disable 1225 * the interrupt thinking that the consumer is 1226 * congested. 1227 */ 1228 port->ip_flags |= READ_ABORTED; 1229 len = 0; 1230 break; 1231 } 1232 1233 /* Load the bytes/status out of the ring entry */ 1234 for (byte_num = 0; byte_num < 4 && len > 0; byte_num++) { 1235 sc = &(entry->ring_sc[byte_num]); 1236 1237 /* Check for change in modem state or overrun */ 1238 if ((*sc & RXSB_MODEM_VALID) 1239 && (port->ip_notify & N_DDCD)) { 1240 /* Notify upper layer if DCD dropped */ 1241 if ((port->ip_flags & DCD_ON) 1242 && !(*sc & RXSB_DCD)) { 1243 /* If we have already copied some data, 1244 * return it. We'll pick up the carrier 1245 * drop on the next pass. That way we 1246 * don't throw away the data that has 1247 * already been copied back to 1248 * the caller's buffer. 1249 */ 1250 if (total > 0) { 1251 len = 0; 1252 break; 1253 } 1254 port->ip_flags &= ~DCD_ON; 1255 1256 /* Turn off this notification so the 1257 * carrier drop protocol won't see it 1258 * again when it does a read. 1259 */ 1260 *sc &= ~RXSB_MODEM_VALID; 1261 1262 /* To keep things consistent, we need 1263 * to update the consumer pointer so 1264 * the next reader won't come in and 1265 * try to read the same ring entries 1266 * again. This must be done here before 1267 * the dcd change. 1268 */ 1269 1270 if ((entry->ring_allsc & RING_ANY_VALID) 1271 == 0) { 1272 cons_ptr += (int)sizeof 1273 (struct ring_entry); 1274 cons_ptr &= PROD_CONS_MASK; 1275 } 1276 writel(cons_ptr, 1277 &port->ip_serial_regs->srcir); 1278 port->ip_rx_cons = cons_ptr; 1279 1280 /* Notify upper layer of carrier drop */ 1281 if ((port->ip_notify & N_DDCD) 1282 && port->ip_port) { 1283 uart_handle_dcd_change 1284 (port->ip_port, 0); 1285 wake_up_interruptible 1286 (&the_port->state-> 1287 port.delta_msr_wait); 1288 } 1289 1290 /* If we had any data to return, we 1291 * would have returned it above. 1292 */ 1293 return 0; 1294 } 1295 } 1296 if (*sc & RXSB_MODEM_VALID) { 1297 /* Notify that an input overrun occurred */ 1298 if ((*sc & RXSB_OVERRUN) 1299 && (port->ip_notify & N_OVERRUN_ERROR)) { 1300 ioc3_cb_post_ncs(the_port, NCS_OVERRUN); 1301 } 1302 /* Don't look at this byte again */ 1303 *sc &= ~RXSB_MODEM_VALID; 1304 } 1305 1306 /* Check for valid data or RX errors */ 1307 if ((*sc & RXSB_DATA_VALID) && 1308 ((*sc & (RXSB_PAR_ERR 1309 | RXSB_FRAME_ERR | RXSB_BREAK)) 1310 && (port->ip_notify & (N_PARITY_ERROR 1311 | N_FRAMING_ERROR 1312 | N_BREAK)))) { 1313 /* There is an error condition on the next byte. 1314 * If we have already transferred some bytes, 1315 * we'll stop here. Otherwise if this is the 1316 * first byte to be read, we'll just transfer 1317 * it alone after notifying the 1318 * upper layer of its status. 1319 */ 1320 if (total > 0) { 1321 len = 0; 1322 break; 1323 } else { 1324 if ((*sc & RXSB_PAR_ERR) && 1325 (port-> 1326 ip_notify & N_PARITY_ERROR)) { 1327 ioc3_cb_post_ncs(the_port, 1328 NCS_PARITY); 1329 } 1330 if ((*sc & RXSB_FRAME_ERR) && 1331 (port-> 1332 ip_notify & N_FRAMING_ERROR)) { 1333 ioc3_cb_post_ncs(the_port, 1334 NCS_FRAMING); 1335 } 1336 if ((*sc & RXSB_BREAK) 1337 && (port->ip_notify & N_BREAK)) { 1338 ioc3_cb_post_ncs 1339 (the_port, NCS_BREAK); 1340 } 1341 len = 1; 1342 } 1343 } 1344 if (*sc & RXSB_DATA_VALID) { 1345 *sc &= ~RXSB_DATA_VALID; 1346 *buf = entry->ring_data[byte_num]; 1347 buf++; 1348 len--; 1349 total++; 1350 } 1351 } 1352 1353 /* If we used up this entry entirely, go on to the next one, 1354 * otherwise we must have run out of buffer space, so 1355 * leave the consumer pointer here for the next read in case 1356 * there are still unread bytes in this entry. 1357 */ 1358 if ((entry->ring_allsc & RING_ANY_VALID) == 0) { 1359 cons_ptr += (int)sizeof(struct ring_entry); 1360 cons_ptr &= PROD_CONS_MASK; 1361 } 1362 } 1363 1364 /* Update consumer pointer and re-arm rx timer interrupt */ 1365 writel(cons_ptr, &port->ip_serial_regs->srcir); 1366 port->ip_rx_cons = cons_ptr; 1367 1368 /* If we have now dipped below the rx high water mark and we have 1369 * rx_high interrupt turned off, we can now turn it back on again. 1370 */ 1371 if ((port->ip_flags & INPUT_HIGH) && (((prod_ptr - cons_ptr) 1372 & PROD_CONS_MASK) < 1373 ((port-> 1374 ip_sscr & 1375 SSCR_RX_THRESHOLD) 1376 << PROD_CONS_PTR_OFF))) { 1377 port->ip_flags &= ~INPUT_HIGH; 1378 enable_intrs(port, hooks->intr_rx_high); 1379 } 1380 return total; 1381} 1382 1383/** 1384 * receive_chars - upper level read. 1385 * @the_port: port to read from 1386 */ 1387static int receive_chars(struct uart_port *the_port) 1388{ 1389 struct tty_struct *tty; 1390 unsigned char ch[MAX_CHARS]; 1391 int read_count = 0, read_room, flip = 0; 1392 struct uart_state *state = the_port->state; 1393 struct ioc3_port *port = get_ioc3_port(the_port); 1394 unsigned long pflags; 1395 1396 /* Make sure all the pointers are "good" ones */ 1397 if (!state) 1398 return 0; 1399 if (!state->port.tty) 1400 return 0; 1401 1402 if (!(port->ip_flags & INPUT_ENABLE)) 1403 return 0; 1404 1405 spin_lock_irqsave(&the_port->lock, pflags); 1406 tty = state->port.tty; 1407 1408 read_count = do_read(the_port, ch, MAX_CHARS); 1409 if (read_count > 0) { 1410 flip = 1; 1411 read_room = tty_insert_flip_string(tty, ch, read_count); 1412 the_port->icount.rx += read_count; 1413 } 1414 spin_unlock_irqrestore(&the_port->lock, pflags); 1415 1416 if (flip) 1417 tty_flip_buffer_push(tty); 1418 1419 return read_count; 1420} 1421 1422/** 1423 * ioc3uart_intr_one - lowest level (per port) interrupt handler. 1424 * @is : submodule 1425 * @idd: driver data 1426 * @pending: interrupts to handle 1427 */ 1428 1429static int inline 1430ioc3uart_intr_one(struct ioc3_submodule *is, 1431 struct ioc3_driver_data *idd, 1432 unsigned int pending) 1433{ 1434 int port_num = GET_PORT_FROM_SIO_IR(pending); 1435 struct port_hooks *hooks; 1436 unsigned int rx_high_rd_aborted = 0; 1437 unsigned long flags; 1438 struct uart_port *the_port; 1439 struct ioc3_port *port; 1440 int loop_counter; 1441 struct ioc3_card *card_ptr; 1442 unsigned int sio_ir; 1443 1444 card_ptr = idd->data[is->id]; 1445 port = card_ptr->ic_port[port_num].icp_port; 1446 hooks = port->ip_hooks; 1447 1448 /* Possible race condition here: The tx_mt interrupt bit may be 1449 * cleared without the intervention of the interrupt handler, 1450 * e.g. by a write. If the top level interrupt handler reads a 1451 * tx_mt, then some other processor does a write, starting up 1452 * output, then we come in here, see the tx_mt and stop DMA, the 1453 * output started by the other processor will hang. Thus we can 1454 * only rely on tx_mt being legitimate if it is read while the 1455 * port lock is held. Therefore this bit must be ignored in the 1456 * passed in interrupt mask which was read by the top level 1457 * interrupt handler since the port lock was not held at the time 1458 * it was read. We can only rely on this bit being accurate if it 1459 * is read while the port lock is held. So we'll clear it for now, 1460 * and reload it later once we have the port lock. 1461 */ 1462 1463 sio_ir = pending & ~(hooks->intr_tx_mt); 1464 spin_lock_irqsave(&port->ip_lock, flags); 1465 1466 loop_counter = MAXITER; /* to avoid hangs */ 1467 1468 do { 1469 uint32_t shadow; 1470 1471 if (loop_counter-- <= 0) { 1472 printk(KERN_WARNING "IOC3 serial: " 1473 "possible hang condition/" 1474 "port stuck on interrupt (line %d).\n", 1475 ((struct uart_port *)port->ip_port)->line); 1476 break; 1477 } 1478 /* Handle a DCD change */ 1479 if (sio_ir & hooks->intr_delta_dcd) { 1480 ioc3_ack(is, idd, hooks->intr_delta_dcd); 1481 shadow = readl(&port->ip_serial_regs->shadow); 1482 1483 if ((port->ip_notify & N_DDCD) 1484 && (shadow & SHADOW_DCD) 1485 && (port->ip_port)) { 1486 the_port = port->ip_port; 1487 uart_handle_dcd_change(the_port, 1488 shadow & SHADOW_DCD); 1489 wake_up_interruptible 1490 (&the_port->state->port.delta_msr_wait); 1491 } else if ((port->ip_notify & N_DDCD) 1492 && !(shadow & SHADOW_DCD)) { 1493 /* Flag delta DCD/no DCD */ 1494 uart_handle_dcd_change(port->ip_port, 1495 shadow & SHADOW_DCD); 1496 port->ip_flags |= DCD_ON; 1497 } 1498 } 1499 1500 /* Handle a CTS change */ 1501 if (sio_ir & hooks->intr_delta_cts) { 1502 ioc3_ack(is, idd, hooks->intr_delta_cts); 1503 shadow = readl(&port->ip_serial_regs->shadow); 1504 1505 if ((port->ip_notify & N_DCTS) && (port->ip_port)) { 1506 the_port = port->ip_port; 1507 uart_handle_cts_change(the_port, shadow 1508 & SHADOW_CTS); 1509 wake_up_interruptible 1510 (&the_port->state->port.delta_msr_wait); 1511 } 1512 } 1513 1514 /* rx timeout interrupt. Must be some data available. Put this 1515 * before the check for rx_high since servicing this condition 1516 * may cause that condition to clear. 1517 */ 1518 if (sio_ir & hooks->intr_rx_timer) { 1519 ioc3_ack(is, idd, hooks->intr_rx_timer); 1520 if ((port->ip_notify & N_DATA_READY) 1521 && (port->ip_port)) { 1522 receive_chars(port->ip_port); 1523 } 1524 } 1525 1526 /* rx high interrupt. Must be after rx_timer. */ 1527 else if (sio_ir & hooks->intr_rx_high) { 1528 /* Data available, notify upper layer */ 1529 if ((port->ip_notify & N_DATA_READY) && port->ip_port) { 1530 receive_chars(port->ip_port); 1531 } 1532 1533 /* We can't ACK this interrupt. If receive_chars didn't 1534 * cause the condition to clear, we'll have to disable 1535 * the interrupt until the data is drained. 1536 * If the read was aborted, don't disable the interrupt 1537 * as this may cause us to hang indefinitely. An 1538 * aborted read generally means that this interrupt 1539 * hasn't been delivered to the cpu yet anyway, even 1540 * though we see it as asserted when we read the sio_ir. 1541 */ 1542 if ((sio_ir = PENDING(card_ptr, idd)) 1543 & hooks->intr_rx_high) { 1544 if (port->ip_flags & READ_ABORTED) { 1545 rx_high_rd_aborted++; 1546 } 1547 else { 1548 card_ptr->ic_enable &= ~hooks->intr_rx_high; 1549 port->ip_flags |= INPUT_HIGH; 1550 } 1551 } 1552 } 1553 1554 /* We got a low water interrupt: notify upper layer to 1555 * send more data. Must come before tx_mt since servicing 1556 * this condition may cause that condition to clear. 1557 */ 1558 if (sio_ir & hooks->intr_tx_explicit) { 1559 port->ip_flags &= ~LOWAT_WRITTEN; 1560 ioc3_ack(is, idd, hooks->intr_tx_explicit); 1561 if (port->ip_notify & N_OUTPUT_LOWAT) 1562 ioc3_cb_output_lowat(port); 1563 } 1564 1565 /* Handle tx_mt. Must come after tx_explicit. */ 1566 else if (sio_ir & hooks->intr_tx_mt) { 1567 /* If we are expecting a lowat notification 1568 * and we get to this point it probably means that for 1569 * some reason the tx_explicit didn't work as expected 1570 * (that can legitimately happen if the output buffer is 1571 * filled up in just the right way). 1572 * So send the notification now. 1573 */ 1574 if (port->ip_notify & N_OUTPUT_LOWAT) { 1575 ioc3_cb_output_lowat(port); 1576 1577 /* We need to reload the sio_ir since the lowat 1578 * call may have caused another write to occur, 1579 * clearing the tx_mt condition. 1580 */ 1581 sio_ir = PENDING(card_ptr, idd); 1582 } 1583 1584 /* If the tx_mt condition still persists even after the 1585 * lowat call, we've got some work to do. 1586 */ 1587 if (sio_ir & hooks->intr_tx_mt) { 1588 /* If we are not currently expecting DMA input, 1589 * and the transmitter has just gone idle, 1590 * there is no longer any reason for DMA, so 1591 * disable it. 1592 */ 1593 if (!(port->ip_notify 1594 & (N_DATA_READY | N_DDCD))) { 1595 BUG_ON(!(port->ip_sscr 1596 & SSCR_DMA_EN)); 1597 port->ip_sscr &= ~SSCR_DMA_EN; 1598 writel(port->ip_sscr, 1599 &port->ip_serial_regs->sscr); 1600 } 1601 /* Prevent infinite tx_mt interrupt */ 1602 card_ptr->ic_enable &= ~hooks->intr_tx_mt; 1603 } 1604 } 1605 sio_ir = PENDING(card_ptr, idd); 1606 1607 /* if the read was aborted and only hooks->intr_rx_high, 1608 * clear hooks->intr_rx_high, so we do not loop forever. 1609 */ 1610 1611 if (rx_high_rd_aborted && (sio_ir == hooks->intr_rx_high)) { 1612 sio_ir &= ~hooks->intr_rx_high; 1613 } 1614 } while (sio_ir & hooks->intr_all); 1615 1616 spin_unlock_irqrestore(&port->ip_lock, flags); 1617 ioc3_enable(is, idd, card_ptr->ic_enable); 1618 return 0; 1619} 1620 1621/** 1622 * ioc3uart_intr - field all serial interrupts 1623 * @is : submodule 1624 * @idd: driver data 1625 * @pending: interrupts to handle 1626 * 1627 */ 1628 1629static int ioc3uart_intr(struct ioc3_submodule *is, 1630 struct ioc3_driver_data *idd, 1631 unsigned int pending) 1632{ 1633 int ret = 0; 1634 1635 /* 1636 * The upper level interrupt handler sends interrupts for both ports 1637 * here. So we need to call for each port with its interrupts. 1638 */ 1639 1640 if (pending & SIO_IR_SA) 1641 ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SA); 1642 if (pending & SIO_IR_SB) 1643 ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SB); 1644 1645 return ret; 1646} 1647 1648/** 1649 * ic3_type 1650 * @port: Port to operate with (we ignore since we only have one port) 1651 * 1652 */ 1653static const char *ic3_type(struct uart_port *the_port) 1654{ 1655 if (IS_RS232(the_port->line)) 1656 return "SGI IOC3 Serial [rs232]"; 1657 else 1658 return "SGI IOC3 Serial [rs422]"; 1659} 1660 1661/** 1662 * ic3_tx_empty - Is the transmitter empty? 1663 * @port: Port to operate on 1664 * 1665 */ 1666static unsigned int ic3_tx_empty(struct uart_port *the_port) 1667{ 1668 unsigned int ret = 0; 1669 struct ioc3_port *port = get_ioc3_port(the_port); 1670 1671 if (readl(&port->ip_serial_regs->shadow) & SHADOW_TEMT) 1672 ret = TIOCSER_TEMT; 1673 return ret; 1674} 1675 1676/** 1677 * ic3_stop_tx - stop the transmitter 1678 * @port: Port to operate on 1679 * 1680 */ 1681static void ic3_stop_tx(struct uart_port *the_port) 1682{ 1683 struct ioc3_port *port = get_ioc3_port(the_port); 1684 1685 if (port) 1686 set_notification(port, N_OUTPUT_LOWAT, 0); 1687} 1688 1689/** 1690 * ic3_stop_rx - stop the receiver 1691 * @port: Port to operate on 1692 * 1693 */ 1694static void ic3_stop_rx(struct uart_port *the_port) 1695{ 1696 struct ioc3_port *port = get_ioc3_port(the_port); 1697 1698 if (port) 1699 port->ip_flags &= ~INPUT_ENABLE; 1700} 1701 1702/** 1703 * null_void_function 1704 * @port: Port to operate on 1705 * 1706 */ 1707static void null_void_function(struct uart_port *the_port) 1708{ 1709} 1710 1711/** 1712 * ic3_shutdown - shut down the port - free irq and disable 1713 * @port: port to shut down 1714 * 1715 */ 1716static void ic3_shutdown(struct uart_port *the_port) 1717{ 1718 unsigned long port_flags; 1719 struct ioc3_port *port; 1720 struct uart_state *state; 1721 1722 port = get_ioc3_port(the_port); 1723 if (!port) 1724 return; 1725 1726 state = the_port->state; 1727 wake_up_interruptible(&state->port.delta_msr_wait); 1728 1729 spin_lock_irqsave(&the_port->lock, port_flags); 1730 set_notification(port, N_ALL, 0); 1731 spin_unlock_irqrestore(&the_port->lock, port_flags); 1732} 1733 1734/** 1735 * ic3_set_mctrl - set control lines (dtr, rts, etc) 1736 * @port: Port to operate on 1737 * @mctrl: Lines to set/unset 1738 * 1739 */ 1740static void ic3_set_mctrl(struct uart_port *the_port, unsigned int mctrl) 1741{ 1742 unsigned char mcr = 0; 1743 1744 if (mctrl & TIOCM_RTS) 1745 mcr |= UART_MCR_RTS; 1746 if (mctrl & TIOCM_DTR) 1747 mcr |= UART_MCR_DTR; 1748 if (mctrl & TIOCM_OUT1) 1749 mcr |= UART_MCR_OUT1; 1750 if (mctrl & TIOCM_OUT2) 1751 mcr |= UART_MCR_OUT2; 1752 if (mctrl & TIOCM_LOOP) 1753 mcr |= UART_MCR_LOOP; 1754 1755 set_mcr(the_port, mcr, SHADOW_DTR); 1756} 1757 1758/** 1759 * ic3_get_mctrl - get control line info 1760 * @port: port to operate on 1761 * 1762 */ 1763static unsigned int ic3_get_mctrl(struct uart_port *the_port) 1764{ 1765 struct ioc3_port *port = get_ioc3_port(the_port); 1766 uint32_t shadow; 1767 unsigned int ret = 0; 1768 1769 if (!port) 1770 return 0; 1771 1772 shadow = readl(&port->ip_serial_regs->shadow); 1773 if (shadow & SHADOW_DCD) 1774 ret |= TIOCM_CD; 1775 if (shadow & SHADOW_DR) 1776 ret |= TIOCM_DSR; 1777 if (shadow & SHADOW_CTS) 1778 ret |= TIOCM_CTS; 1779 return ret; 1780} 1781 1782/** 1783 * ic3_start_tx - Start transmitter. Called with the_port->lock 1784 * @port: Port to operate on 1785 * 1786 */ 1787static void ic3_start_tx(struct uart_port *the_port) 1788{ 1789 struct ioc3_port *port = get_ioc3_port(the_port); 1790 1791 if (port) { 1792 set_notification(port, N_OUTPUT_LOWAT, 1); 1793 enable_intrs(port, port->ip_hooks->intr_tx_mt); 1794 } 1795} 1796 1797/** 1798 * ic3_break_ctl - handle breaks 1799 * @port: Port to operate on 1800 * @break_state: Break state 1801 * 1802 */ 1803static void ic3_break_ctl(struct uart_port *the_port, int break_state) 1804{ 1805} 1806 1807/** 1808 * ic3_startup - Start up the serial port - always return 0 (We're always on) 1809 * @port: Port to operate on 1810 * 1811 */ 1812static int ic3_startup(struct uart_port *the_port) 1813{ 1814 int retval; 1815 struct ioc3_port *port; 1816 struct ioc3_card *card_ptr; 1817 unsigned long port_flags; 1818 1819 if (!the_port) { 1820 NOT_PROGRESS(); 1821 return -ENODEV; 1822 } 1823 port = get_ioc3_port(the_port); 1824 if (!port) { 1825 NOT_PROGRESS(); 1826 return -ENODEV; 1827 } 1828 card_ptr = port->ip_card; 1829 port->ip_port = the_port; 1830 1831 if (!card_ptr) { 1832 NOT_PROGRESS(); 1833 return -ENODEV; 1834 } 1835 1836 /* Start up the serial port */ 1837 spin_lock_irqsave(&the_port->lock, port_flags); 1838 retval = ic3_startup_local(the_port); 1839 spin_unlock_irqrestore(&the_port->lock, port_flags); 1840 return retval; 1841} 1842 1843/** 1844 * ic3_set_termios - set termios stuff 1845 * @port: port to operate on 1846 * @termios: New settings 1847 * @termios: Old 1848 * 1849 */ 1850static void 1851ic3_set_termios(struct uart_port *the_port, 1852 struct ktermios *termios, struct ktermios *old_termios) 1853{ 1854 unsigned long port_flags; 1855 1856 spin_lock_irqsave(&the_port->lock, port_flags); 1857 ioc3_change_speed(the_port, termios, old_termios); 1858 spin_unlock_irqrestore(&the_port->lock, port_flags); 1859} 1860 1861/** 1862 * ic3_request_port - allocate resources for port - no op.... 1863 * @port: port to operate on 1864 * 1865 */ 1866static int ic3_request_port(struct uart_port *port) 1867{ 1868 return 0; 1869} 1870 1871/* Associate the uart functions above - given to serial core */ 1872static struct uart_ops ioc3_ops = { 1873 .tx_empty = ic3_tx_empty, 1874 .set_mctrl = ic3_set_mctrl, 1875 .get_mctrl = ic3_get_mctrl, 1876 .stop_tx = ic3_stop_tx, 1877 .start_tx = ic3_start_tx, 1878 .stop_rx = ic3_stop_rx, 1879 .enable_ms = null_void_function, 1880 .break_ctl = ic3_break_ctl, 1881 .startup = ic3_startup, 1882 .shutdown = ic3_shutdown, 1883 .set_termios = ic3_set_termios, 1884 .type = ic3_type, 1885 .release_port = null_void_function, 1886 .request_port = ic3_request_port, 1887}; 1888 1889/* 1890 * Boot-time initialization code 1891 */ 1892 1893static struct uart_driver ioc3_uart = { 1894 .owner = THIS_MODULE, 1895 .driver_name = "ioc3_serial", 1896 .dev_name = DEVICE_NAME, 1897 .major = DEVICE_MAJOR, 1898 .minor = DEVICE_MINOR, 1899 .nr = MAX_LOGICAL_PORTS 1900}; 1901 1902/** 1903 * ioc3_serial_core_attach - register with serial core 1904 * This is done during pci probing 1905 * @is: submodule struct for this 1906 * @idd: handle for this card 1907 */ 1908static inline int ioc3_serial_core_attach( struct ioc3_submodule *is, 1909 struct ioc3_driver_data *idd) 1910{ 1911 struct ioc3_port *port; 1912 struct uart_port *the_port; 1913 struct ioc3_card *card_ptr = idd->data[is->id]; 1914 int ii, phys_port; 1915 struct pci_dev *pdev = idd->pdev; 1916 1917 DPRINT_CONFIG(("%s: attach pdev 0x%p - card_ptr 0x%p\n", 1918 __func__, pdev, (void *)card_ptr)); 1919 1920 if (!card_ptr) 1921 return -ENODEV; 1922 1923 /* once around for each logical port on this card */ 1924 for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) { 1925 phys_port = GET_PHYSICAL_PORT(ii); 1926 the_port = &card_ptr->ic_port[phys_port]. 1927 icp_uart_port[GET_LOGICAL_PORT(ii)]; 1928 port = card_ptr->ic_port[phys_port].icp_port; 1929 port->ip_port = the_port; 1930 1931 DPRINT_CONFIG(("%s: attach the_port 0x%p / port 0x%p [%d/%d]\n", 1932 __func__, (void *)the_port, (void *)port, 1933 phys_port, ii)); 1934 1935 /* membase, iobase and mapbase just need to be non-0 */ 1936 the_port->membase = (unsigned char __iomem *)1; 1937 the_port->iobase = (pdev->bus->number << 16) | ii; 1938 the_port->line = (Num_of_ioc3_cards << 2) | ii; 1939 the_port->mapbase = 1; 1940 the_port->type = PORT_16550A; 1941 the_port->fifosize = FIFO_SIZE; 1942 the_port->ops = &ioc3_ops; 1943 the_port->irq = idd->irq_io; 1944 the_port->dev = &pdev->dev; 1945 1946 if (uart_add_one_port(&ioc3_uart, the_port) < 0) { 1947 printk(KERN_WARNING 1948 "%s: unable to add port %d bus %d\n", 1949 __func__, the_port->line, pdev->bus->number); 1950 } else { 1951 DPRINT_CONFIG(("IOC3 serial port %d irq %d bus %d\n", 1952 the_port->line, the_port->irq, pdev->bus->number)); 1953 } 1954 1955 /* all ports are rs232 for now */ 1956 if (IS_PHYSICAL_PORT(ii)) 1957 ioc3_set_proto(port, PROTO_RS232); 1958 } 1959 return 0; 1960} 1961 1962/** 1963 * ioc3uart_remove - register detach function 1964 * @is: submodule struct for this submodule 1965 * @idd: ioc3 driver data for this submodule 1966 */ 1967 1968static int ioc3uart_remove(struct ioc3_submodule *is, 1969 struct ioc3_driver_data *idd) 1970{ 1971 struct ioc3_card *card_ptr = idd->data[is->id]; 1972 struct uart_port *the_port; 1973 struct ioc3_port *port; 1974 int ii; 1975 1976 if (card_ptr) { 1977 for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) { 1978 the_port = &card_ptr->ic_port[GET_PHYSICAL_PORT(ii)]. 1979 icp_uart_port[GET_LOGICAL_PORT(ii)]; 1980 if (the_port) 1981 uart_remove_one_port(&ioc3_uart, the_port); 1982 port = card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].icp_port; 1983 if (port && IS_PHYSICAL_PORT(ii) 1984 && (GET_PHYSICAL_PORT(ii) == 0)) { 1985 pci_free_consistent(port->ip_idd->pdev, 1986 TOTAL_RING_BUF_SIZE, 1987 (void *)port->ip_cpu_ringbuf, 1988 port->ip_dma_ringbuf); 1989 kfree(port); 1990 card_ptr->ic_port[GET_PHYSICAL_PORT(ii)]. 1991 icp_port = NULL; 1992 } 1993 } 1994 kfree(card_ptr); 1995 idd->data[is->id] = NULL; 1996 } 1997 return 0; 1998} 1999 2000/** 2001 * ioc3uart_probe - card probe function called from shim driver 2002 * @is: submodule struct for this submodule 2003 * @idd: ioc3 driver data for this card 2004 */ 2005 2006static int __devinit 2007ioc3uart_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd) 2008{ 2009 struct pci_dev *pdev = idd->pdev; 2010 struct ioc3_card *card_ptr; 2011 int ret = 0; 2012 struct ioc3_port *port; 2013 struct ioc3_port *ports[PORTS_PER_CARD]; 2014 int phys_port; 2015 2016 DPRINT_CONFIG(("%s (0x%p, 0x%p)\n", __func__, is, idd)); 2017 2018 card_ptr = kzalloc(sizeof(struct ioc3_card), GFP_KERNEL); 2019 if (!card_ptr) { 2020 printk(KERN_WARNING "ioc3_attach_one" 2021 ": unable to get memory for the IOC3\n"); 2022 return -ENOMEM; 2023 } 2024 idd->data[is->id] = card_ptr; 2025 Submodule_slot = is->id; 2026 2027 writel(((UARTA_BASE >> 3) << SIO_CR_SER_A_BASE_SHIFT) | 2028 ((UARTB_BASE >> 3) << SIO_CR_SER_B_BASE_SHIFT) | 2029 (0xf << SIO_CR_CMD_PULSE_SHIFT), &idd->vma->sio_cr); 2030 2031 pci_write_config_dword(pdev, PCI_LAT, 0xff00); 2032 2033 /* Enable serial port mode select generic PIO pins as outputs */ 2034 ioc3_gpcr_set(idd, GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL); 2035 2036 /* Create port structures for each port */ 2037 for (phys_port = 0; phys_port < PORTS_PER_CARD; phys_port++) { 2038 port = kzalloc(sizeof(struct ioc3_port), GFP_KERNEL); 2039 if (!port) { 2040 printk(KERN_WARNING 2041 "IOC3 serial memory not available for port\n"); 2042 ret = -ENOMEM; 2043 goto out4; 2044 } 2045 spin_lock_init(&port->ip_lock); 2046 2047 /* we need to remember the previous ones, to point back to 2048 * them farther down - setting up the ring buffers. 2049 */ 2050 ports[phys_port] = port; 2051 2052 /* init to something useful */ 2053 card_ptr->ic_port[phys_port].icp_port = port; 2054 port->ip_is = is; 2055 port->ip_idd = idd; 2056 port->ip_baud = 9600; 2057 port->ip_card = card_ptr; 2058 port->ip_hooks = &hooks_array[phys_port]; 2059 2060 /* Setup each port */ 2061 if (phys_port == 0) { 2062 port->ip_serial_regs = &idd->vma->port_a; 2063 port->ip_uart_regs = &idd->vma->sregs.uarta; 2064 2065 DPRINT_CONFIG(("%s : Port A ip_serial_regs 0x%p " 2066 "ip_uart_regs 0x%p\n", 2067 __func__, 2068 (void *)port->ip_serial_regs, 2069 (void *)port->ip_uart_regs)); 2070 2071 /* setup ring buffers */ 2072 port->ip_cpu_ringbuf = pci_alloc_consistent(pdev, 2073 TOTAL_RING_BUF_SIZE, &port->ip_dma_ringbuf); 2074 2075 BUG_ON(!((((int64_t) port->ip_dma_ringbuf) & 2076 (TOTAL_RING_BUF_SIZE - 1)) == 0)); 2077 port->ip_inring = RING(port, RX_A); 2078 port->ip_outring = RING(port, TX_A); 2079 DPRINT_CONFIG(("%s : Port A ip_cpu_ringbuf 0x%p " 2080 "ip_dma_ringbuf 0x%p, ip_inring 0x%p " 2081 "ip_outring 0x%p\n", 2082 __func__, 2083 (void *)port->ip_cpu_ringbuf, 2084 (void *)port->ip_dma_ringbuf, 2085 (void *)port->ip_inring, 2086 (void *)port->ip_outring)); 2087 } 2088 else { 2089 port->ip_serial_regs = &idd->vma->port_b; 2090 port->ip_uart_regs = &idd->vma->sregs.uartb; 2091 2092 DPRINT_CONFIG(("%s : Port B ip_serial_regs 0x%p " 2093 "ip_uart_regs 0x%p\n", 2094 __func__, 2095 (void *)port->ip_serial_regs, 2096 (void *)port->ip_uart_regs)); 2097 2098 /* share the ring buffers */ 2099 port->ip_dma_ringbuf = 2100 ports[phys_port - 1]->ip_dma_ringbuf; 2101 port->ip_cpu_ringbuf = 2102 ports[phys_port - 1]->ip_cpu_ringbuf; 2103 port->ip_inring = RING(port, RX_B); 2104 port->ip_outring = RING(port, TX_B); 2105 DPRINT_CONFIG(("%s : Port B ip_cpu_ringbuf 0x%p " 2106 "ip_dma_ringbuf 0x%p, ip_inring 0x%p " 2107 "ip_outring 0x%p\n", 2108 __func__, 2109 (void *)port->ip_cpu_ringbuf, 2110 (void *)port->ip_dma_ringbuf, 2111 (void *)port->ip_inring, 2112 (void *)port->ip_outring)); 2113 } 2114 2115 DPRINT_CONFIG(("%s : port %d [addr 0x%p] card_ptr 0x%p", 2116 __func__, 2117 phys_port, (void *)port, (void *)card_ptr)); 2118 DPRINT_CONFIG((" ip_serial_regs 0x%p ip_uart_regs 0x%p\n", 2119 (void *)port->ip_serial_regs, 2120 (void *)port->ip_uart_regs)); 2121 2122 /* Initialize the hardware for IOC3 */ 2123 port_init(port); 2124 2125 DPRINT_CONFIG(("%s: phys_port %d port 0x%p inring 0x%p " 2126 "outring 0x%p\n", 2127 __func__, 2128 phys_port, (void *)port, 2129 (void *)port->ip_inring, 2130 (void *)port->ip_outring)); 2131 2132 } 2133 2134 /* register port with the serial core */ 2135 2136 if ((ret = ioc3_serial_core_attach(is, idd))) 2137 goto out4; 2138 2139 Num_of_ioc3_cards++; 2140 2141 return ret; 2142 2143 /* error exits that give back resources */ 2144out4: 2145 kfree(card_ptr); 2146 return ret; 2147} 2148 2149static struct ioc3_submodule ioc3uart_ops = { 2150 .name = "IOC3uart", 2151 .probe = ioc3uart_probe, 2152 .remove = ioc3uart_remove, 2153 /* call .intr for both ports initially */ 2154 .irq_mask = SIO_IR_SA | SIO_IR_SB, 2155 .intr = ioc3uart_intr, 2156 .owner = THIS_MODULE, 2157}; 2158 2159/** 2160 * ioc3_detect - module init called, 2161 */ 2162static int __init ioc3uart_init(void) 2163{ 2164 int ret; 2165 2166 /* register with serial core */ 2167 if ((ret = uart_register_driver(&ioc3_uart)) < 0) { 2168 printk(KERN_WARNING 2169 "%s: Couldn't register IOC3 uart serial driver\n", 2170 __func__); 2171 return ret; 2172 } 2173 ret = ioc3_register_submodule(&ioc3uart_ops); 2174 if (ret) 2175 uart_unregister_driver(&ioc3_uart); 2176 return ret; 2177} 2178 2179static void __exit ioc3uart_exit(void) 2180{ 2181 ioc3_unregister_submodule(&ioc3uart_ops); 2182 uart_unregister_driver(&ioc3_uart); 2183} 2184 2185module_init(ioc3uart_init); 2186module_exit(ioc3uart_exit); 2187 2188MODULE_AUTHOR("Pat Gefre - Silicon Graphics Inc. (SGI) <pfg@sgi.com>"); 2189MODULE_DESCRIPTION("Serial PCI driver module for SGI IOC3 card"); 2190MODULE_LICENSE("GPL"); 2191