1/* 2 * Linux driver attachment glue for PCI based U320 controllers. 3 * 4 * Copyright (c) 2000-2001 Adaptec Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * substantially similar to the "NO WARRANTY" disclaimer below 15 * ("Disclaimer") and any redistribution must be conditioned upon 16 * including a substantially similar Disclaimer requirement for further 17 * binary redistribution. 18 * 3. Neither the names of the above-listed copyright holders nor the names 19 * of any contributors may be used to endorse or promote products derived 20 * from this software without specific prior written permission. 21 * 22 * Alternatively, this software may be distributed under the terms of the 23 * GNU General Public License ("GPL") version 2 as published by the Free 24 * Software Foundation. 25 * 26 * NO WARRANTY 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGES. 38 * 39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $ 40 */ 41 42#include "aic79xx_osm.h" 43#include "aic79xx_inline.h" 44#include "aic79xx_pci.h" 45 46/* Define the macro locally since it's different for different class of chips. 47 */ 48#define ID(x) \ 49 ID2C(x), \ 50 ID2C(IDIROC(x)) 51 52static const struct pci_device_id ahd_linux_pci_id_table[] = { 53 /* aic7901 based controllers */ 54 ID(ID_AHA_29320A), 55 ID(ID_AHA_29320ALP), 56 ID(ID_AHA_29320LPE), 57 /* aic7902 based controllers */ 58 ID(ID_AHA_29320), 59 ID(ID_AHA_29320B), 60 ID(ID_AHA_29320LP), 61 ID(ID_AHA_39320), 62 ID(ID_AHA_39320_B), 63 ID(ID_AHA_39320A), 64 ID(ID_AHA_39320D), 65 ID(ID_AHA_39320D_HP), 66 ID(ID_AHA_39320D_B), 67 ID(ID_AHA_39320D_B_HP), 68 /* Generic chip probes for devices we don't know exactly. */ 69 ID16(ID_AIC7901 & ID_9005_GENERIC_MASK), 70 ID(ID_AIC7901A & ID_DEV_VENDOR_MASK), 71 ID16(ID_AIC7902 & ID_9005_GENERIC_MASK), 72 { 0 } 73}; 74 75MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table); 76 77#ifdef CONFIG_PM 78static int 79ahd_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg) 80{ 81 struct ahd_softc *ahd = pci_get_drvdata(pdev); 82 int rc; 83 84 if ((rc = ahd_suspend(ahd))) 85 return rc; 86 87 ahd_pci_suspend(ahd); 88 89 pci_save_state(pdev); 90 pci_disable_device(pdev); 91 92 if (mesg.event & PM_EVENT_SLEEP) 93 pci_set_power_state(pdev, PCI_D3hot); 94 95 return rc; 96} 97 98static int 99ahd_linux_pci_dev_resume(struct pci_dev *pdev) 100{ 101 struct ahd_softc *ahd = pci_get_drvdata(pdev); 102 int rc; 103 104 pci_set_power_state(pdev, PCI_D0); 105 pci_restore_state(pdev); 106 107 if ((rc = pci_enable_device(pdev))) { 108 dev_printk(KERN_ERR, &pdev->dev, 109 "failed to enable device after resume (%d)\n", rc); 110 return rc; 111 } 112 113 pci_set_master(pdev); 114 115 ahd_pci_resume(ahd); 116 117 ahd_resume(ahd); 118 119 return rc; 120} 121#endif 122 123static void 124ahd_linux_pci_dev_remove(struct pci_dev *pdev) 125{ 126 struct ahd_softc *ahd = pci_get_drvdata(pdev); 127 u_long s; 128 129 if (ahd->platform_data && ahd->platform_data->host) 130 scsi_remove_host(ahd->platform_data->host); 131 132 ahd_lock(ahd, &s); 133 ahd_intr_enable(ahd, FALSE); 134 ahd_unlock(ahd, &s); 135 ahd_free(ahd); 136} 137 138static void 139ahd_linux_pci_inherit_flags(struct ahd_softc *ahd) 140{ 141 struct pci_dev *pdev = ahd->dev_softc, *master_pdev; 142 unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); 143 144 master_pdev = pci_get_slot(pdev->bus, master_devfn); 145 if (master_pdev) { 146 struct ahd_softc *master = pci_get_drvdata(master_pdev); 147 if (master) { 148 ahd->flags &= ~AHD_BIOS_ENABLED; 149 ahd->flags |= master->flags & AHD_BIOS_ENABLED; 150 } else 151 printk(KERN_ERR "aic79xx: no multichannel peer found!\n"); 152 pci_dev_put(master_pdev); 153 } 154} 155 156static int 157ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 158{ 159 char buf[80]; 160 struct ahd_softc *ahd; 161 ahd_dev_softc_t pci; 162 const struct ahd_pci_identity *entry; 163 char *name; 164 int error; 165 struct device *dev = &pdev->dev; 166 167 pci = pdev; 168 entry = ahd_find_pci_device(pci); 169 if (entry == NULL) 170 return (-ENODEV); 171 172 /* 173 * Allocate a softc for this card and 174 * set it up for attachment by our 175 * common detect routine. 176 */ 177 sprintf(buf, "ahd_pci:%d:%d:%d", 178 ahd_get_pci_bus(pci), 179 ahd_get_pci_slot(pci), 180 ahd_get_pci_function(pci)); 181 name = kmalloc(strlen(buf) + 1, GFP_ATOMIC); 182 if (name == NULL) 183 return (-ENOMEM); 184 strcpy(name, buf); 185 ahd = ahd_alloc(NULL, name); 186 if (ahd == NULL) 187 return (-ENOMEM); 188 if (pci_enable_device(pdev)) { 189 ahd_free(ahd); 190 return (-ENODEV); 191 } 192 pci_set_master(pdev); 193 194 if (sizeof(dma_addr_t) > 4) { 195 const u64 required_mask = dma_get_required_mask(dev); 196 197 if (required_mask > DMA_BIT_MASK(39) && 198 dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) 199 ahd->flags |= AHD_64BIT_ADDRESSING; 200 else if (required_mask > DMA_BIT_MASK(32) && 201 dma_set_mask(dev, DMA_BIT_MASK(39)) == 0) 202 ahd->flags |= AHD_39BIT_ADDRESSING; 203 else 204 dma_set_mask(dev, DMA_BIT_MASK(32)); 205 } else { 206 dma_set_mask(dev, DMA_BIT_MASK(32)); 207 } 208 ahd->dev_softc = pci; 209 error = ahd_pci_config(ahd, entry); 210 if (error != 0) { 211 ahd_free(ahd); 212 return (-error); 213 } 214 215 /* 216 * Second Function PCI devices need to inherit some 217 * * settings from function 0. 218 */ 219 if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0) 220 ahd_linux_pci_inherit_flags(ahd); 221 222 pci_set_drvdata(pdev, ahd); 223 224 ahd_linux_register_host(ahd, &aic79xx_driver_template); 225 return (0); 226} 227 228static struct pci_driver aic79xx_pci_driver = { 229 .name = "aic79xx", 230 .probe = ahd_linux_pci_dev_probe, 231#ifdef CONFIG_PM 232 .suspend = ahd_linux_pci_dev_suspend, 233 .resume = ahd_linux_pci_dev_resume, 234#endif 235 .remove = ahd_linux_pci_dev_remove, 236 .id_table = ahd_linux_pci_id_table 237}; 238 239int 240ahd_linux_pci_init(void) 241{ 242 return pci_register_driver(&aic79xx_pci_driver); 243} 244 245void 246ahd_linux_pci_exit(void) 247{ 248 pci_unregister_driver(&aic79xx_pci_driver); 249} 250 251static int 252ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, resource_size_t *base, 253 resource_size_t *base2) 254{ 255 *base = pci_resource_start(ahd->dev_softc, 0); 256 /* 257 * This is really the 3rd bar and should be at index 2, 258 * but the Linux PCI code doesn't know how to "count" 64bit 259 * bars. 260 */ 261 *base2 = pci_resource_start(ahd->dev_softc, 3); 262 if (*base == 0 || *base2 == 0) 263 return (ENOMEM); 264 if (!request_region(*base, 256, "aic79xx")) 265 return (ENOMEM); 266 if (!request_region(*base2, 256, "aic79xx")) { 267 release_region(*base, 256); 268 return (ENOMEM); 269 } 270 return (0); 271} 272 273static int 274ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd, 275 resource_size_t *bus_addr, 276 uint8_t __iomem **maddr) 277{ 278 resource_size_t start; 279 resource_size_t base_page; 280 u_long base_offset; 281 int error = 0; 282 283 if (aic79xx_allow_memio == 0) 284 return (ENOMEM); 285 286 if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0) 287 return (ENOMEM); 288 289 start = pci_resource_start(ahd->dev_softc, 1); 290 base_page = start & PAGE_MASK; 291 base_offset = start - base_page; 292 if (start != 0) { 293 *bus_addr = start; 294 if (!request_mem_region(start, 0x1000, "aic79xx")) 295 error = ENOMEM; 296 if (!error) { 297 *maddr = ioremap_nocache(base_page, base_offset + 512); 298 if (*maddr == NULL) { 299 error = ENOMEM; 300 release_mem_region(start, 0x1000); 301 } else 302 *maddr += base_offset; 303 } 304 } else 305 error = ENOMEM; 306 return (error); 307} 308 309int 310ahd_pci_map_registers(struct ahd_softc *ahd) 311{ 312 uint32_t command; 313 resource_size_t base; 314 uint8_t __iomem *maddr; 315 int error; 316 317 /* 318 * If its allowed, we prefer memory mapped access. 319 */ 320 command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4); 321 command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN); 322 base = 0; 323 maddr = NULL; 324 error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr); 325 if (error == 0) { 326 ahd->platform_data->mem_busaddr = base; 327 ahd->tags[0] = BUS_SPACE_MEMIO; 328 ahd->bshs[0].maddr = maddr; 329 ahd->tags[1] = BUS_SPACE_MEMIO; 330 ahd->bshs[1].maddr = maddr + 0x100; 331 ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, 332 command | PCIM_CMD_MEMEN, 4); 333 334 if (ahd_pci_test_register_access(ahd) != 0) { 335 336 printk("aic79xx: PCI Device %d:%d:%d " 337 "failed memory mapped test. Using PIO.\n", 338 ahd_get_pci_bus(ahd->dev_softc), 339 ahd_get_pci_slot(ahd->dev_softc), 340 ahd_get_pci_function(ahd->dev_softc)); 341 iounmap(maddr); 342 release_mem_region(ahd->platform_data->mem_busaddr, 343 0x1000); 344 ahd->bshs[0].maddr = NULL; 345 maddr = NULL; 346 } else 347 command |= PCIM_CMD_MEMEN; 348 } else if (bootverbose) { 349 printk("aic79xx: PCI%d:%d:%d MEM region 0x%llx " 350 "unavailable. Cannot memory map device.\n", 351 ahd_get_pci_bus(ahd->dev_softc), 352 ahd_get_pci_slot(ahd->dev_softc), 353 ahd_get_pci_function(ahd->dev_softc), 354 (unsigned long long)base); 355 } 356 357 if (maddr == NULL) { 358 resource_size_t base2; 359 360 error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2); 361 if (error == 0) { 362 ahd->tags[0] = BUS_SPACE_PIO; 363 ahd->tags[1] = BUS_SPACE_PIO; 364 ahd->bshs[0].ioport = (u_long)base; 365 ahd->bshs[1].ioport = (u_long)base2; 366 command |= PCIM_CMD_PORTEN; 367 } else { 368 printk("aic79xx: PCI%d:%d:%d IO regions 0x%llx and " 369 "0x%llx unavailable. Cannot map device.\n", 370 ahd_get_pci_bus(ahd->dev_softc), 371 ahd_get_pci_slot(ahd->dev_softc), 372 ahd_get_pci_function(ahd->dev_softc), 373 (unsigned long long)base, 374 (unsigned long long)base2); 375 } 376 } 377 ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4); 378 return (error); 379} 380 381int 382ahd_pci_map_int(struct ahd_softc *ahd) 383{ 384 int error; 385 386 error = request_irq(ahd->dev_softc->irq, ahd_linux_isr, 387 IRQF_SHARED, "aic79xx", ahd); 388 if (!error) 389 ahd->platform_data->irq = ahd->dev_softc->irq; 390 391 return (-error); 392} 393 394void 395ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state) 396{ 397 pci_set_power_state(ahd->dev_softc, new_state); 398} 399