1/* 2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc 3 * 4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) 5 * Copyright (C) 2006 David Brownell (convert to new framework) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13/* 14 * The original "cmos clock" chip was an MC146818 chip, now obsolete. 15 * That defined the register interface now provided by all PCs, some 16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets 17 * integrate an MC146818 clone in their southbridge, and boards use 18 * that instead of discrete clones like the DS12887 or M48T86. There 19 * are also clones that connect using the LPC bus. 20 * 21 * That register API is also used directly by various other drivers 22 * (notably for integrated NVRAM), infrastructure (x86 has code to 23 * bypass the RTC framework, directly reading the RTC during boot 24 * and updating minutes/seconds for systems using NTP synch) and 25 * utilities (like userspace 'hwclock', if no /dev node exists). 26 * 27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with 28 * interrupts disabled, holding the global rtc_lock, to exclude those 29 * other drivers and utilities on correctly configured systems. 30 */ 31#include <linux/kernel.h> 32#include <linux/module.h> 33#include <linux/init.h> 34#include <linux/interrupt.h> 35#include <linux/spinlock.h> 36#include <linux/platform_device.h> 37#include <linux/mod_devicetable.h> 38#include <linux/log2.h> 39#include <linux/pm.h> 40 41/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ 42#include <asm-generic/rtc.h> 43 44struct cmos_rtc { 45 struct rtc_device *rtc; 46 struct device *dev; 47 int irq; 48 struct resource *iomem; 49 50 void (*wake_on)(struct device *); 51 void (*wake_off)(struct device *); 52 53 u8 enabled_wake; 54 u8 suspend_ctrl; 55 56 /* newer hardware extends the original register set */ 57 u8 day_alrm; 58 u8 mon_alrm; 59 u8 century; 60}; 61 62/* both platform and pnp busses use negative numbers for invalid irqs */ 63#define is_valid_irq(n) ((n) > 0) 64 65static const char driver_name[] = "rtc_cmos"; 66 67/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; 68 * always mask it against the irq enable bits in RTC_CONTROL. Bit values 69 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. 70 */ 71#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) 72 73static inline int is_intr(u8 rtc_intr) 74{ 75 if (!(rtc_intr & RTC_IRQF)) 76 return 0; 77 return rtc_intr & RTC_IRQMASK; 78} 79 80/*----------------------------------------------------------------*/ 81 82/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because 83 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly 84 * used in a broken "legacy replacement" mode. The breakage includes 85 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for 86 * other (better) use. 87 * 88 * When that broken mode is in use, platform glue provides a partial 89 * emulation of hardware RTC IRQ facilities using HPET #1. We don't 90 * want to use HPET for anything except those IRQs though... 91 */ 92#ifdef CONFIG_HPET_EMULATE_RTC 93#include <asm/hpet.h> 94#else 95 96static inline int is_hpet_enabled(void) 97{ 98 return 0; 99} 100 101static inline int hpet_mask_rtc_irq_bit(unsigned long mask) 102{ 103 return 0; 104} 105 106static inline int hpet_set_rtc_irq_bit(unsigned long mask) 107{ 108 return 0; 109} 110 111static inline int 112hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) 113{ 114 return 0; 115} 116 117static inline int hpet_set_periodic_freq(unsigned long freq) 118{ 119 return 0; 120} 121 122static inline int hpet_rtc_dropped_irq(void) 123{ 124 return 0; 125} 126 127static inline int hpet_rtc_timer_init(void) 128{ 129 return 0; 130} 131 132extern irq_handler_t hpet_rtc_interrupt; 133 134static inline int hpet_register_irq_handler(irq_handler_t handler) 135{ 136 return 0; 137} 138 139static inline int hpet_unregister_irq_handler(irq_handler_t handler) 140{ 141 return 0; 142} 143 144#endif 145 146/*----------------------------------------------------------------*/ 147 148#ifdef RTC_PORT 149 150/* Most newer x86 systems have two register banks, the first used 151 * for RTC and NVRAM and the second only for NVRAM. Caller must 152 * own rtc_lock ... and we won't worry about access during NMI. 153 */ 154#define can_bank2 true 155 156static inline unsigned char cmos_read_bank2(unsigned char addr) 157{ 158 outb(addr, RTC_PORT(2)); 159 return inb(RTC_PORT(3)); 160} 161 162static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 163{ 164 outb(addr, RTC_PORT(2)); 165 outb(val, RTC_PORT(2)); 166} 167 168#else 169 170#define can_bank2 false 171 172static inline unsigned char cmos_read_bank2(unsigned char addr) 173{ 174 return 0; 175} 176 177static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 178{ 179} 180 181#endif 182 183/*----------------------------------------------------------------*/ 184 185static int cmos_read_time(struct device *dev, struct rtc_time *t) 186{ 187 /* REVISIT: if the clock has a "century" register, use 188 * that instead of the heuristic in get_rtc_time(). 189 * That'll make Y3K compatility (year > 2070) easy! 190 */ 191 get_rtc_time(t); 192 return 0; 193} 194 195static int cmos_set_time(struct device *dev, struct rtc_time *t) 196{ 197 /* REVISIT: set the "century" register if available 198 * 199 * NOTE: this ignores the issue whereby updating the seconds 200 * takes effect exactly 500ms after we write the register. 201 * (Also queueing and other delays before we get this far.) 202 */ 203 return set_rtc_time(t); 204} 205 206static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) 207{ 208 struct cmos_rtc *cmos = dev_get_drvdata(dev); 209 unsigned char rtc_control; 210 211 if (!is_valid_irq(cmos->irq)) 212 return -EIO; 213 214 /* Basic alarms only support hour, minute, and seconds fields. 215 * Some also support day and month, for alarms up to a year in 216 * the future. 217 */ 218 t->time.tm_mday = -1; 219 t->time.tm_mon = -1; 220 221 spin_lock_irq(&rtc_lock); 222 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); 223 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); 224 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); 225 226 if (cmos->day_alrm) { 227 /* ignore upper bits on readback per ACPI spec */ 228 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; 229 if (!t->time.tm_mday) 230 t->time.tm_mday = -1; 231 232 if (cmos->mon_alrm) { 233 t->time.tm_mon = CMOS_READ(cmos->mon_alrm); 234 if (!t->time.tm_mon) 235 t->time.tm_mon = -1; 236 } 237 } 238 239 rtc_control = CMOS_READ(RTC_CONTROL); 240 spin_unlock_irq(&rtc_lock); 241 242 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 243 if (((unsigned)t->time.tm_sec) < 0x60) 244 t->time.tm_sec = bcd2bin(t->time.tm_sec); 245 else 246 t->time.tm_sec = -1; 247 if (((unsigned)t->time.tm_min) < 0x60) 248 t->time.tm_min = bcd2bin(t->time.tm_min); 249 else 250 t->time.tm_min = -1; 251 if (((unsigned)t->time.tm_hour) < 0x24) 252 t->time.tm_hour = bcd2bin(t->time.tm_hour); 253 else 254 t->time.tm_hour = -1; 255 256 if (cmos->day_alrm) { 257 if (((unsigned)t->time.tm_mday) <= 0x31) 258 t->time.tm_mday = bcd2bin(t->time.tm_mday); 259 else 260 t->time.tm_mday = -1; 261 262 if (cmos->mon_alrm) { 263 if (((unsigned)t->time.tm_mon) <= 0x12) 264 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; 265 else 266 t->time.tm_mon = -1; 267 } 268 } 269 } 270 t->time.tm_year = -1; 271 272 t->enabled = !!(rtc_control & RTC_AIE); 273 t->pending = 0; 274 275 return 0; 276} 277 278static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) 279{ 280 unsigned char rtc_intr; 281 282 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; 283 * allegedly some older rtcs need that to handle irqs properly 284 */ 285 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 286 287 if (is_hpet_enabled()) 288 return; 289 290 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 291 if (is_intr(rtc_intr)) 292 rtc_update_irq(cmos->rtc, 1, rtc_intr); 293} 294 295static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) 296{ 297 unsigned char rtc_control; 298 299 /* flush any pending IRQ status, notably for update irqs, 300 * before we enable new IRQs 301 */ 302 rtc_control = CMOS_READ(RTC_CONTROL); 303 cmos_checkintr(cmos, rtc_control); 304 305 rtc_control |= mask; 306 CMOS_WRITE(rtc_control, RTC_CONTROL); 307 hpet_set_rtc_irq_bit(mask); 308 309 cmos_checkintr(cmos, rtc_control); 310} 311 312static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) 313{ 314 unsigned char rtc_control; 315 316 rtc_control = CMOS_READ(RTC_CONTROL); 317 rtc_control &= ~mask; 318 CMOS_WRITE(rtc_control, RTC_CONTROL); 319 hpet_mask_rtc_irq_bit(mask); 320 321 cmos_checkintr(cmos, rtc_control); 322} 323 324static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 325{ 326 struct cmos_rtc *cmos = dev_get_drvdata(dev); 327 unsigned char mon, mday, hrs, min, sec, rtc_control; 328 329 if (!is_valid_irq(cmos->irq)) 330 return -EIO; 331 332 mon = t->time.tm_mon + 1; 333 mday = t->time.tm_mday; 334 hrs = t->time.tm_hour; 335 min = t->time.tm_min; 336 sec = t->time.tm_sec; 337 338 rtc_control = CMOS_READ(RTC_CONTROL); 339 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 340 /* Writing 0xff means "don't care" or "match all". */ 341 mon = (mon <= 12) ? bin2bcd(mon) : 0xff; 342 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; 343 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; 344 min = (min < 60) ? bin2bcd(min) : 0xff; 345 sec = (sec < 60) ? bin2bcd(sec) : 0xff; 346 } 347 348 spin_lock_irq(&rtc_lock); 349 350 /* next rtc irq must not be from previous alarm setting */ 351 cmos_irq_disable(cmos, RTC_AIE); 352 353 /* update alarm */ 354 CMOS_WRITE(hrs, RTC_HOURS_ALARM); 355 CMOS_WRITE(min, RTC_MINUTES_ALARM); 356 CMOS_WRITE(sec, RTC_SECONDS_ALARM); 357 358 /* the system may support an "enhanced" alarm */ 359 if (cmos->day_alrm) { 360 CMOS_WRITE(mday, cmos->day_alrm); 361 if (cmos->mon_alrm) 362 CMOS_WRITE(mon, cmos->mon_alrm); 363 } 364 365 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec); 366 367 if (t->enabled) 368 cmos_irq_enable(cmos, RTC_AIE); 369 370 spin_unlock_irq(&rtc_lock); 371 372 return 0; 373} 374 375static int cmos_irq_set_freq(struct device *dev, int freq) 376{ 377 struct cmos_rtc *cmos = dev_get_drvdata(dev); 378 int f; 379 unsigned long flags; 380 381 if (!is_valid_irq(cmos->irq)) 382 return -ENXIO; 383 384 if (!is_power_of_2(freq)) 385 return -EINVAL; 386 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */ 387 f = ffs(freq); 388 if (f-- > 16) 389 return -EINVAL; 390 f = 16 - f; 391 392 spin_lock_irqsave(&rtc_lock, flags); 393 hpet_set_periodic_freq(freq); 394 CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT); 395 spin_unlock_irqrestore(&rtc_lock, flags); 396 397 return 0; 398} 399 400static int cmos_irq_set_state(struct device *dev, int enabled) 401{ 402 struct cmos_rtc *cmos = dev_get_drvdata(dev); 403 unsigned long flags; 404 405 if (!is_valid_irq(cmos->irq)) 406 return -ENXIO; 407 408 spin_lock_irqsave(&rtc_lock, flags); 409 410 if (enabled) 411 cmos_irq_enable(cmos, RTC_PIE); 412 else 413 cmos_irq_disable(cmos, RTC_PIE); 414 415 spin_unlock_irqrestore(&rtc_lock, flags); 416 return 0; 417} 418 419static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) 420{ 421 struct cmos_rtc *cmos = dev_get_drvdata(dev); 422 unsigned long flags; 423 424 if (!is_valid_irq(cmos->irq)) 425 return -EINVAL; 426 427 spin_lock_irqsave(&rtc_lock, flags); 428 429 if (enabled) 430 cmos_irq_enable(cmos, RTC_AIE); 431 else 432 cmos_irq_disable(cmos, RTC_AIE); 433 434 spin_unlock_irqrestore(&rtc_lock, flags); 435 return 0; 436} 437 438static int cmos_update_irq_enable(struct device *dev, unsigned int enabled) 439{ 440 struct cmos_rtc *cmos = dev_get_drvdata(dev); 441 unsigned long flags; 442 443 if (!is_valid_irq(cmos->irq)) 444 return -EINVAL; 445 446 spin_lock_irqsave(&rtc_lock, flags); 447 448 if (enabled) 449 cmos_irq_enable(cmos, RTC_UIE); 450 else 451 cmos_irq_disable(cmos, RTC_UIE); 452 453 spin_unlock_irqrestore(&rtc_lock, flags); 454 return 0; 455} 456 457#if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) 458 459static int cmos_procfs(struct device *dev, struct seq_file *seq) 460{ 461 struct cmos_rtc *cmos = dev_get_drvdata(dev); 462 unsigned char rtc_control, valid; 463 464 spin_lock_irq(&rtc_lock); 465 rtc_control = CMOS_READ(RTC_CONTROL); 466 valid = CMOS_READ(RTC_VALID); 467 spin_unlock_irq(&rtc_lock); 468 469 /* NOTE: at least ICH6 reports battery status using a different 470 * (non-RTC) bit; and SQWE is ignored on many current systems. 471 */ 472 return seq_printf(seq, 473 "periodic_IRQ\t: %s\n" 474 "update_IRQ\t: %s\n" 475 "HPET_emulated\t: %s\n" 476 // "square_wave\t: %s\n" 477 "BCD\t\t: %s\n" 478 "DST_enable\t: %s\n" 479 "periodic_freq\t: %d\n" 480 "batt_status\t: %s\n", 481 (rtc_control & RTC_PIE) ? "yes" : "no", 482 (rtc_control & RTC_UIE) ? "yes" : "no", 483 is_hpet_enabled() ? "yes" : "no", 484 // (rtc_control & RTC_SQWE) ? "yes" : "no", 485 (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 486 (rtc_control & RTC_DST_EN) ? "yes" : "no", 487 cmos->rtc->irq_freq, 488 (valid & RTC_VRT) ? "okay" : "dead"); 489} 490 491#else 492#define cmos_procfs NULL 493#endif 494 495static const struct rtc_class_ops cmos_rtc_ops = { 496 .read_time = cmos_read_time, 497 .set_time = cmos_set_time, 498 .read_alarm = cmos_read_alarm, 499 .set_alarm = cmos_set_alarm, 500 .proc = cmos_procfs, 501 .irq_set_freq = cmos_irq_set_freq, 502 .irq_set_state = cmos_irq_set_state, 503 .alarm_irq_enable = cmos_alarm_irq_enable, 504 .update_irq_enable = cmos_update_irq_enable, 505}; 506 507/*----------------------------------------------------------------*/ 508 509/* 510 * All these chips have at least 64 bytes of address space, shared by 511 * RTC registers and NVRAM. Most of those bytes of NVRAM are used 512 * by boot firmware. Modern chips have 128 or 256 bytes. 513 */ 514 515#define NVRAM_OFFSET (RTC_REG_D + 1) 516 517static ssize_t 518cmos_nvram_read(struct file *filp, struct kobject *kobj, 519 struct bin_attribute *attr, 520 char *buf, loff_t off, size_t count) 521{ 522 int retval; 523 524 if (unlikely(off >= attr->size)) 525 return 0; 526 if (unlikely(off < 0)) 527 return -EINVAL; 528 if ((off + count) > attr->size) 529 count = attr->size - off; 530 531 off += NVRAM_OFFSET; 532 spin_lock_irq(&rtc_lock); 533 for (retval = 0; count; count--, off++, retval++) { 534 if (off < 128) 535 *buf++ = CMOS_READ(off); 536 else if (can_bank2) 537 *buf++ = cmos_read_bank2(off); 538 else 539 break; 540 } 541 spin_unlock_irq(&rtc_lock); 542 543 return retval; 544} 545 546static ssize_t 547cmos_nvram_write(struct file *filp, struct kobject *kobj, 548 struct bin_attribute *attr, 549 char *buf, loff_t off, size_t count) 550{ 551 struct cmos_rtc *cmos; 552 int retval; 553 554 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj)); 555 if (unlikely(off >= attr->size)) 556 return -EFBIG; 557 if (unlikely(off < 0)) 558 return -EINVAL; 559 if ((off + count) > attr->size) 560 count = attr->size - off; 561 562 /* NOTE: on at least PCs and Ataris, the boot firmware uses a 563 * checksum on part of the NVRAM data. That's currently ignored 564 * here. If userspace is smart enough to know what fields of 565 * NVRAM to update, updating checksums is also part of its job. 566 */ 567 off += NVRAM_OFFSET; 568 spin_lock_irq(&rtc_lock); 569 for (retval = 0; count; count--, off++, retval++) { 570 /* don't trash RTC registers */ 571 if (off == cmos->day_alrm 572 || off == cmos->mon_alrm 573 || off == cmos->century) 574 buf++; 575 else if (off < 128) 576 CMOS_WRITE(*buf++, off); 577 else if (can_bank2) 578 cmos_write_bank2(*buf++, off); 579 else 580 break; 581 } 582 spin_unlock_irq(&rtc_lock); 583 584 return retval; 585} 586 587static struct bin_attribute nvram = { 588 .attr = { 589 .name = "nvram", 590 .mode = S_IRUGO | S_IWUSR, 591 }, 592 593 .read = cmos_nvram_read, 594 .write = cmos_nvram_write, 595 /* size gets set up later */ 596}; 597 598/*----------------------------------------------------------------*/ 599 600static struct cmos_rtc cmos_rtc; 601 602static irqreturn_t cmos_interrupt(int irq, void *p) 603{ 604 u8 irqstat; 605 u8 rtc_control; 606 607 spin_lock(&rtc_lock); 608 609 /* When the HPET interrupt handler calls us, the interrupt 610 * status is passed as arg1 instead of the irq number. But 611 * always clear irq status, even when HPET is in the way. 612 * 613 * Note that HPET and RTC are almost certainly out of phase, 614 * giving different IRQ status ... 615 */ 616 irqstat = CMOS_READ(RTC_INTR_FLAGS); 617 rtc_control = CMOS_READ(RTC_CONTROL); 618 if (is_hpet_enabled()) 619 irqstat = (unsigned long)irq & 0xF0; 620 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 621 622 /* All Linux RTC alarms should be treated as if they were oneshot. 623 * Similar code may be needed in system wakeup paths, in case the 624 * alarm woke the system. 625 */ 626 if (irqstat & RTC_AIE) { 627 rtc_control &= ~RTC_AIE; 628 CMOS_WRITE(rtc_control, RTC_CONTROL); 629 hpet_mask_rtc_irq_bit(RTC_AIE); 630 631 CMOS_READ(RTC_INTR_FLAGS); 632 } 633 spin_unlock(&rtc_lock); 634 635 if (is_intr(irqstat)) { 636 rtc_update_irq(p, 1, irqstat); 637 return IRQ_HANDLED; 638 } else 639 return IRQ_NONE; 640} 641 642#ifdef CONFIG_PNP 643#define INITSECTION 644 645#else 646#define INITSECTION __init 647#endif 648 649static int INITSECTION 650cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) 651{ 652 struct cmos_rtc_board_info *info = dev->platform_data; 653 int retval = 0; 654 unsigned char rtc_control; 655 unsigned address_space; 656 657 /* there can be only one ... */ 658 if (cmos_rtc.dev) 659 return -EBUSY; 660 661 if (!ports) 662 return -ENODEV; 663 664 /* Claim I/O ports ASAP, minimizing conflict with legacy driver. 665 * 666 * REVISIT non-x86 systems may instead use memory space resources 667 * (needing ioremap etc), not i/o space resources like this ... 668 */ 669 ports = request_region(ports->start, 670 ports->end + 1 - ports->start, 671 driver_name); 672 if (!ports) { 673 dev_dbg(dev, "i/o registers already in use\n"); 674 return -EBUSY; 675 } 676 677 cmos_rtc.irq = rtc_irq; 678 cmos_rtc.iomem = ports; 679 680 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM 681 * driver did, but don't reject unknown configs. Old hardware 682 * won't address 128 bytes. Newer chips have multiple banks, 683 * though they may not be listed in one I/O resource. 684 */ 685#if defined(CONFIG_ATARI) 686 address_space = 64; 687#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 688 || defined(__sparc__) || defined(__mips__) 689 address_space = 128; 690#else 691#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 692 address_space = 128; 693#endif 694 if (can_bank2 && ports->end > (ports->start + 1)) 695 address_space = 256; 696 697 /* For ACPI systems extension info comes from the FADT. On others, 698 * board specific setup provides it as appropriate. Systems where 699 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and 700 * some almost-clones) can provide hooks to make that behave. 701 * 702 * Note that ACPI doesn't preclude putting these registers into 703 * "extended" areas of the chip, including some that we won't yet 704 * expect CMOS_READ and friends to handle. 705 */ 706 if (info) { 707 if (info->rtc_day_alarm && info->rtc_day_alarm < 128) 708 cmos_rtc.day_alrm = info->rtc_day_alarm; 709 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) 710 cmos_rtc.mon_alrm = info->rtc_mon_alarm; 711 if (info->rtc_century && info->rtc_century < 128) 712 cmos_rtc.century = info->rtc_century; 713 714 if (info->wake_on && info->wake_off) { 715 cmos_rtc.wake_on = info->wake_on; 716 cmos_rtc.wake_off = info->wake_off; 717 } 718 } 719 720 cmos_rtc.dev = dev; 721 dev_set_drvdata(dev, &cmos_rtc); 722 723 cmos_rtc.rtc = rtc_device_register(driver_name, dev, 724 &cmos_rtc_ops, THIS_MODULE); 725 if (IS_ERR(cmos_rtc.rtc)) { 726 retval = PTR_ERR(cmos_rtc.rtc); 727 goto cleanup0; 728 } 729 730 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 731 732 spin_lock_irq(&rtc_lock); 733 734 /* force periodic irq to CMOS reset default of 1024Hz; 735 * 736 * REVISIT it's been reported that at least one x86_64 ALI mobo 737 * doesn't use 32KHz here ... for portability we might need to 738 * do something about other clock frequencies. 739 */ 740 cmos_rtc.rtc->irq_freq = 1024; 741 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); 742 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); 743 744 /* disable irqs */ 745 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); 746 747 rtc_control = CMOS_READ(RTC_CONTROL); 748 749 spin_unlock_irq(&rtc_lock); 750 751 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { 752 dev_warn(dev, "only 24-hr supported\n"); 753 retval = -ENXIO; 754 goto cleanup1; 755 } 756 757 if (is_valid_irq(rtc_irq)) { 758 irq_handler_t rtc_cmos_int_handler; 759 760 if (is_hpet_enabled()) { 761 int err; 762 763 rtc_cmos_int_handler = hpet_rtc_interrupt; 764 err = hpet_register_irq_handler(cmos_interrupt); 765 if (err != 0) { 766 printk(KERN_WARNING "hpet_register_irq_handler " 767 " failed in rtc_init()."); 768 goto cleanup1; 769 } 770 } else 771 rtc_cmos_int_handler = cmos_interrupt; 772 773 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 774 IRQF_DISABLED, dev_name(&cmos_rtc.rtc->dev), 775 cmos_rtc.rtc); 776 if (retval < 0) { 777 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); 778 goto cleanup1; 779 } 780 } 781 hpet_rtc_timer_init(); 782 783 /* export at least the first block of NVRAM */ 784 nvram.size = address_space - NVRAM_OFFSET; 785 retval = sysfs_create_bin_file(&dev->kobj, &nvram); 786 if (retval < 0) { 787 dev_dbg(dev, "can't create nvram file? %d\n", retval); 788 goto cleanup2; 789 } 790 791 pr_info("%s: %s%s, %zd bytes nvram%s\n", 792 dev_name(&cmos_rtc.rtc->dev), 793 !is_valid_irq(rtc_irq) ? "no alarms" : 794 cmos_rtc.mon_alrm ? "alarms up to one year" : 795 cmos_rtc.day_alrm ? "alarms up to one month" : 796 "alarms up to one day", 797 cmos_rtc.century ? ", y3k" : "", 798 nvram.size, 799 is_hpet_enabled() ? ", hpet irqs" : ""); 800 801 return 0; 802 803cleanup2: 804 if (is_valid_irq(rtc_irq)) 805 free_irq(rtc_irq, cmos_rtc.rtc); 806cleanup1: 807 cmos_rtc.dev = NULL; 808 rtc_device_unregister(cmos_rtc.rtc); 809cleanup0: 810 release_region(ports->start, ports->end + 1 - ports->start); 811 return retval; 812} 813 814static void cmos_do_shutdown(void) 815{ 816 spin_lock_irq(&rtc_lock); 817 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); 818 spin_unlock_irq(&rtc_lock); 819} 820 821static void __exit cmos_do_remove(struct device *dev) 822{ 823 struct cmos_rtc *cmos = dev_get_drvdata(dev); 824 struct resource *ports; 825 826 cmos_do_shutdown(); 827 828 sysfs_remove_bin_file(&dev->kobj, &nvram); 829 830 if (is_valid_irq(cmos->irq)) { 831 free_irq(cmos->irq, cmos->rtc); 832 hpet_unregister_irq_handler(cmos_interrupt); 833 } 834 835 rtc_device_unregister(cmos->rtc); 836 cmos->rtc = NULL; 837 838 ports = cmos->iomem; 839 release_region(ports->start, ports->end + 1 - ports->start); 840 cmos->iomem = NULL; 841 842 cmos->dev = NULL; 843 dev_set_drvdata(dev, NULL); 844} 845 846#ifdef CONFIG_PM 847 848static int cmos_suspend(struct device *dev) 849{ 850 struct cmos_rtc *cmos = dev_get_drvdata(dev); 851 unsigned char tmp; 852 853 /* only the alarm might be a wakeup event source */ 854 spin_lock_irq(&rtc_lock); 855 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); 856 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { 857 unsigned char mask; 858 859 if (device_may_wakeup(dev)) 860 mask = RTC_IRQMASK & ~RTC_AIE; 861 else 862 mask = RTC_IRQMASK; 863 tmp &= ~mask; 864 CMOS_WRITE(tmp, RTC_CONTROL); 865 866 /* shut down hpet emulation - we don't need it for alarm */ 867 hpet_mask_rtc_irq_bit(RTC_PIE|RTC_AIE|RTC_UIE); 868 cmos_checkintr(cmos, tmp); 869 } 870 spin_unlock_irq(&rtc_lock); 871 872 if (tmp & RTC_AIE) { 873 cmos->enabled_wake = 1; 874 if (cmos->wake_on) 875 cmos->wake_on(dev); 876 else 877 enable_irq_wake(cmos->irq); 878 } 879 880 pr_debug("%s: suspend%s, ctrl %02x\n", 881 dev_name(&cmos_rtc.rtc->dev), 882 (tmp & RTC_AIE) ? ", alarm may wake" : "", 883 tmp); 884 885 return 0; 886} 887 888/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even 889 * after a detour through G3 "mechanical off", although the ACPI spec 890 * says wakeup should only work from G1/S4 "hibernate". To most users, 891 * distinctions between S4 and S5 are pointless. So when the hardware 892 * allows, don't draw that distinction. 893 */ 894static inline int cmos_poweroff(struct device *dev) 895{ 896 return cmos_suspend(dev); 897} 898 899static int cmos_resume(struct device *dev) 900{ 901 struct cmos_rtc *cmos = dev_get_drvdata(dev); 902 unsigned char tmp = cmos->suspend_ctrl; 903 904 /* re-enable any irqs previously active */ 905 if (tmp & RTC_IRQMASK) { 906 unsigned char mask; 907 908 if (cmos->enabled_wake) { 909 if (cmos->wake_off) 910 cmos->wake_off(dev); 911 else 912 disable_irq_wake(cmos->irq); 913 cmos->enabled_wake = 0; 914 } 915 916 spin_lock_irq(&rtc_lock); 917 do { 918 CMOS_WRITE(tmp, RTC_CONTROL); 919 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); 920 921 mask = CMOS_READ(RTC_INTR_FLAGS); 922 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; 923 if (!is_hpet_enabled() || !is_intr(mask)) 924 break; 925 926 /* force one-shot behavior if HPET blocked 927 * the wake alarm's irq 928 */ 929 rtc_update_irq(cmos->rtc, 1, mask); 930 tmp &= ~RTC_AIE; 931 hpet_mask_rtc_irq_bit(RTC_AIE); 932 } while (mask & RTC_AIE); 933 spin_unlock_irq(&rtc_lock); 934 } 935 936 pr_debug("%s: resume, ctrl %02x\n", 937 dev_name(&cmos_rtc.rtc->dev), 938 tmp); 939 940 return 0; 941} 942 943static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); 944 945#else 946 947static inline int cmos_poweroff(struct device *dev) 948{ 949 return -ENOSYS; 950} 951 952#endif 953 954/*----------------------------------------------------------------*/ 955 956/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. 957 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs 958 * probably list them in similar PNPBIOS tables; so PNP is more common. 959 * 960 * We don't use legacy "poke at the hardware" probing. Ancient PCs that 961 * predate even PNPBIOS should set up platform_bus devices. 962 */ 963 964#ifdef CONFIG_ACPI 965 966#include <linux/acpi.h> 967 968static u32 rtc_handler(void *context) 969{ 970 acpi_clear_event(ACPI_EVENT_RTC); 971 acpi_disable_event(ACPI_EVENT_RTC, 0); 972 return ACPI_INTERRUPT_HANDLED; 973} 974 975static inline void rtc_wake_setup(void) 976{ 977 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL); 978 /* 979 * After the RTC handler is installed, the Fixed_RTC event should 980 * be disabled. Only when the RTC alarm is set will it be enabled. 981 */ 982 acpi_clear_event(ACPI_EVENT_RTC); 983 acpi_disable_event(ACPI_EVENT_RTC, 0); 984} 985 986static void rtc_wake_on(struct device *dev) 987{ 988 acpi_clear_event(ACPI_EVENT_RTC); 989 acpi_enable_event(ACPI_EVENT_RTC, 0); 990} 991 992static void rtc_wake_off(struct device *dev) 993{ 994 acpi_disable_event(ACPI_EVENT_RTC, 0); 995} 996 997/* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find 998 * its device node and pass extra config data. This helps its driver use 999 * capabilities that the now-obsolete mc146818 didn't have, and informs it 1000 * that this board's RTC is wakeup-capable (per ACPI spec). 1001 */ 1002static struct cmos_rtc_board_info acpi_rtc_info; 1003 1004static void __devinit 1005cmos_wake_setup(struct device *dev) 1006{ 1007 if (acpi_disabled) 1008 return; 1009 1010 rtc_wake_setup(); 1011 acpi_rtc_info.wake_on = rtc_wake_on; 1012 acpi_rtc_info.wake_off = rtc_wake_off; 1013 1014 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 1015 dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 1016 acpi_gbl_FADT.month_alarm); 1017 acpi_gbl_FADT.month_alarm = 0; 1018 } 1019 1020 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; 1021 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; 1022 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; 1023 1024 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ 1025 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 1026 dev_info(dev, "RTC can wake from S4\n"); 1027 1028 dev->platform_data = &acpi_rtc_info; 1029 1030 /* RTC always wakes from S1/S2/S3, and often S4/STD */ 1031 device_init_wakeup(dev, 1); 1032} 1033 1034#else 1035 1036static void __devinit 1037cmos_wake_setup(struct device *dev) 1038{ 1039} 1040 1041#endif 1042 1043#ifdef CONFIG_PNP 1044 1045#include <linux/pnp.h> 1046 1047static int __devinit 1048cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1049{ 1050 cmos_wake_setup(&pnp->dev); 1051 1052 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0)) 1053 /* Some machines contain a PNP entry for the RTC, but 1054 * don't define the IRQ. It should always be safe to 1055 * hardcode it in these cases 1056 */ 1057 return cmos_do_probe(&pnp->dev, 1058 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8); 1059 else 1060 return cmos_do_probe(&pnp->dev, 1061 pnp_get_resource(pnp, IORESOURCE_IO, 0), 1062 pnp_irq(pnp, 0)); 1063} 1064 1065static void __exit cmos_pnp_remove(struct pnp_dev *pnp) 1066{ 1067 cmos_do_remove(&pnp->dev); 1068} 1069 1070#ifdef CONFIG_PM 1071 1072static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg) 1073{ 1074 return cmos_suspend(&pnp->dev); 1075} 1076 1077static int cmos_pnp_resume(struct pnp_dev *pnp) 1078{ 1079 return cmos_resume(&pnp->dev); 1080} 1081 1082#else 1083#define cmos_pnp_suspend NULL 1084#define cmos_pnp_resume NULL 1085#endif 1086 1087static void cmos_pnp_shutdown(struct pnp_dev *pnp) 1088{ 1089 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev)) 1090 return; 1091 1092 cmos_do_shutdown(); 1093} 1094 1095static const struct pnp_device_id rtc_ids[] = { 1096 { .id = "PNP0b00", }, 1097 { .id = "PNP0b01", }, 1098 { .id = "PNP0b02", }, 1099 { }, 1100}; 1101MODULE_DEVICE_TABLE(pnp, rtc_ids); 1102 1103static struct pnp_driver cmos_pnp_driver = { 1104 .name = (char *) driver_name, 1105 .id_table = rtc_ids, 1106 .probe = cmos_pnp_probe, 1107 .remove = __exit_p(cmos_pnp_remove), 1108 .shutdown = cmos_pnp_shutdown, 1109 1110 /* flag ensures resume() gets called, and stops syslog spam */ 1111 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1112 .suspend = cmos_pnp_suspend, 1113 .resume = cmos_pnp_resume, 1114}; 1115 1116#endif /* CONFIG_PNP */ 1117 1118/*----------------------------------------------------------------*/ 1119 1120/* Platform setup should have set up an RTC device, when PNP is 1121 * unavailable ... this could happen even on (older) PCs. 1122 */ 1123 1124static int __init cmos_platform_probe(struct platform_device *pdev) 1125{ 1126 cmos_wake_setup(&pdev->dev); 1127 return cmos_do_probe(&pdev->dev, 1128 platform_get_resource(pdev, IORESOURCE_IO, 0), 1129 platform_get_irq(pdev, 0)); 1130} 1131 1132static int __exit cmos_platform_remove(struct platform_device *pdev) 1133{ 1134 cmos_do_remove(&pdev->dev); 1135 return 0; 1136} 1137 1138static void cmos_platform_shutdown(struct platform_device *pdev) 1139{ 1140 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev)) 1141 return; 1142 1143 cmos_do_shutdown(); 1144} 1145 1146/* work with hotplug and coldplug */ 1147MODULE_ALIAS("platform:rtc_cmos"); 1148 1149static struct platform_driver cmos_platform_driver = { 1150 .remove = __exit_p(cmos_platform_remove), 1151 .shutdown = cmos_platform_shutdown, 1152 .driver = { 1153 .name = (char *) driver_name, 1154#ifdef CONFIG_PM 1155 .pm = &cmos_pm_ops, 1156#endif 1157 } 1158}; 1159 1160#ifdef CONFIG_PNP 1161static bool pnp_driver_registered; 1162#endif 1163static bool platform_driver_registered; 1164 1165static int __init cmos_init(void) 1166{ 1167 int retval = 0; 1168 1169#ifdef CONFIG_PNP 1170 retval = pnp_register_driver(&cmos_pnp_driver); 1171 if (retval == 0) 1172 pnp_driver_registered = true; 1173#endif 1174 1175 if (!cmos_rtc.dev) { 1176 retval = platform_driver_probe(&cmos_platform_driver, 1177 cmos_platform_probe); 1178 if (retval == 0) 1179 platform_driver_registered = true; 1180 } 1181 1182 if (retval == 0) 1183 return 0; 1184 1185#ifdef CONFIG_PNP 1186 if (pnp_driver_registered) 1187 pnp_unregister_driver(&cmos_pnp_driver); 1188#endif 1189 return retval; 1190} 1191module_init(cmos_init); 1192 1193static void __exit cmos_exit(void) 1194{ 1195#ifdef CONFIG_PNP 1196 if (pnp_driver_registered) 1197 pnp_unregister_driver(&cmos_pnp_driver); 1198#endif 1199 if (platform_driver_registered) 1200 platform_driver_unregister(&cmos_platform_driver); 1201} 1202module_exit(cmos_exit); 1203 1204 1205MODULE_AUTHOR("David Brownell"); 1206MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); 1207MODULE_LICENSE("GPL"); 1208