1/* 2 * Firmware I/O code for mac80211 Prism54 drivers 3 * 4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> 5 * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de> 6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> 7 * 8 * Based on: 9 * - the islsm (softmac prism54) driver, which is: 10 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al. 11 * - stlc45xx driver 12 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies). 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19#include <linux/init.h> 20#include <linux/slab.h> 21#include <linux/firmware.h> 22#include <linux/etherdevice.h> 23 24#include <net/mac80211.h> 25 26#include "p54.h" 27#include "eeprom.h" 28#include "lmac.h" 29 30int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw) 31{ 32 struct p54_common *priv = dev->priv; 33 struct exp_if *exp_if; 34 struct bootrec *bootrec; 35 u32 *data = (u32 *)fw->data; 36 u32 *end_data = (u32 *)fw->data + (fw->size >> 2); 37 u8 *fw_version = NULL; 38 size_t len; 39 int i; 40 int maxlen; 41 42 if (priv->rx_start) 43 return 0; 44 45 while (data < end_data && *data) 46 data++; 47 48 while (data < end_data && !*data) 49 data++; 50 51 bootrec = (struct bootrec *) data; 52 53 while (bootrec->data <= end_data && (bootrec->data + 54 (len = le32_to_cpu(bootrec->len))) <= end_data) { 55 u32 code = le32_to_cpu(bootrec->code); 56 switch (code) { 57 case BR_CODE_COMPONENT_ID: 58 priv->fw_interface = be32_to_cpup((__be32 *) 59 bootrec->data); 60 switch (priv->fw_interface) { 61 case FW_LM86: 62 case FW_LM20: 63 case FW_LM87: { 64 char *iftype = (char *)bootrec->data; 65 wiphy_info(priv->hw->wiphy, 66 "p54 detected a LM%c%c firmware\n", 67 iftype[2], iftype[3]); 68 break; 69 } 70 case FW_FMAC: 71 default: 72 wiphy_err(priv->hw->wiphy, 73 "unsupported firmware\n"); 74 return -ENODEV; 75 } 76 break; 77 case BR_CODE_COMPONENT_VERSION: 78 /* 24 bytes should be enough for all firmwares */ 79 if (strnlen((unsigned char *) bootrec->data, 24) < 24) 80 fw_version = (unsigned char *) bootrec->data; 81 break; 82 case BR_CODE_DESCR: { 83 struct bootrec_desc *desc = 84 (struct bootrec_desc *)bootrec->data; 85 priv->rx_start = le32_to_cpu(desc->rx_start); 86 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500; 87 priv->headroom = desc->headroom; 88 priv->tailroom = desc->tailroom; 89 priv->privacy_caps = desc->privacy_caps; 90 priv->rx_keycache_size = desc->rx_keycache_size; 91 if (le32_to_cpu(bootrec->len) == 11) 92 priv->rx_mtu = le16_to_cpu(desc->rx_mtu); 93 else 94 priv->rx_mtu = (size_t) 95 0x620 - priv->tx_hdr_len; 96 maxlen = priv->tx_hdr_len + /* USB devices */ 97 sizeof(struct p54_rx_data) + 98 4 + /* rx alignment */ 99 IEEE80211_MAX_FRAG_THRESHOLD; 100 if (priv->rx_mtu > maxlen && PAGE_SIZE == 4096) { 101 printk(KERN_INFO "p54: rx_mtu reduced from %d " 102 "to %d\n", priv->rx_mtu, maxlen); 103 priv->rx_mtu = maxlen; 104 } 105 break; 106 } 107 case BR_CODE_EXPOSED_IF: 108 exp_if = (struct exp_if *) bootrec->data; 109 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++) 110 if (exp_if[i].if_id == cpu_to_le16(IF_ID_LMAC)) 111 priv->fw_var = le16_to_cpu(exp_if[i].variant); 112 break; 113 case BR_CODE_DEPENDENT_IF: 114 break; 115 case BR_CODE_END_OF_BRA: 116 case LEGACY_BR_CODE_END_OF_BRA: 117 end_data = NULL; 118 break; 119 default: 120 break; 121 } 122 bootrec = (struct bootrec *)&bootrec->data[len]; 123 } 124 125 if (fw_version) 126 wiphy_info(priv->hw->wiphy, 127 "FW rev %s - Softmac protocol %x.%x\n", 128 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff); 129 130 if (priv->fw_var < 0x500) 131 wiphy_info(priv->hw->wiphy, 132 "you are using an obsolete firmware. " 133 "visit http://wireless.kernel.org/en/users/Drivers/p54 " 134 "and grab one for \"kernel >= 2.6.28\"!\n"); 135 136 if (priv->fw_var >= 0x300) { 137 /* Firmware supports QoS, use it! */ 138 139 if (priv->fw_var >= 0x500) { 140 priv->tx_stats[P54_QUEUE_AC_VO].limit = 16; 141 priv->tx_stats[P54_QUEUE_AC_VI].limit = 16; 142 priv->tx_stats[P54_QUEUE_AC_BE].limit = 16; 143 priv->tx_stats[P54_QUEUE_AC_BK].limit = 16; 144 } else { 145 priv->tx_stats[P54_QUEUE_AC_VO].limit = 3; 146 priv->tx_stats[P54_QUEUE_AC_VI].limit = 4; 147 priv->tx_stats[P54_QUEUE_AC_BE].limit = 3; 148 priv->tx_stats[P54_QUEUE_AC_BK].limit = 2; 149 } 150 priv->hw->queues = P54_QUEUE_AC_NUM; 151 } 152 153 wiphy_info(priv->hw->wiphy, 154 "cryptographic accelerator WEP:%s, TKIP:%s, CCMP:%s\n", 155 (priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" : "no", 156 (priv->privacy_caps & 157 (BR_DESC_PRIV_CAP_TKIP | BR_DESC_PRIV_CAP_MICHAEL)) 158 ? "YES" : "no", 159 (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP) 160 ? "YES" : "no"); 161 162 if (priv->rx_keycache_size) { 163 /* 164 * NOTE: 165 * 166 * The firmware provides at most 255 (0 - 254) slots 167 * for keys which are then used to offload decryption. 168 * As a result the 255 entry (aka 0xff) can be used 169 * safely by the driver to mark keys that didn't fit 170 * into the full cache. This trick saves us from 171 * keeping a extra list for uploaded keys. 172 */ 173 174 priv->used_rxkeys = kzalloc(BITS_TO_LONGS( 175 priv->rx_keycache_size), GFP_KERNEL); 176 177 if (!priv->used_rxkeys) 178 return -ENOMEM; 179 } 180 181 return 0; 182} 183EXPORT_SYMBOL_GPL(p54_parse_firmware); 184 185static struct sk_buff *p54_alloc_skb(struct p54_common *priv, u16 hdr_flags, 186 u16 payload_len, u16 type, gfp_t memflags) 187{ 188 struct p54_hdr *hdr; 189 struct sk_buff *skb; 190 size_t frame_len = sizeof(*hdr) + payload_len; 191 192 if (frame_len > P54_MAX_CTRL_FRAME_LEN) 193 return NULL; 194 195 if (unlikely(skb_queue_len(&priv->tx_pending) > 64)) 196 return NULL; 197 198 skb = __dev_alloc_skb(priv->tx_hdr_len + frame_len, memflags); 199 if (!skb) 200 return NULL; 201 skb_reserve(skb, priv->tx_hdr_len); 202 203 hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr)); 204 hdr->flags = cpu_to_le16(hdr_flags); 205 hdr->len = cpu_to_le16(payload_len); 206 hdr->type = cpu_to_le16(type); 207 hdr->tries = hdr->rts_tries = 0; 208 return skb; 209} 210 211int p54_download_eeprom(struct p54_common *priv, void *buf, 212 u16 offset, u16 len) 213{ 214 struct p54_eeprom_lm86 *eeprom_hdr; 215 struct sk_buff *skb; 216 size_t eeprom_hdr_size; 217 int ret = 0; 218 219 if (priv->fw_var >= 0x509) 220 eeprom_hdr_size = sizeof(*eeprom_hdr); 221 else 222 eeprom_hdr_size = 0x4; 223 224 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL, eeprom_hdr_size + 225 len, P54_CONTROL_TYPE_EEPROM_READBACK, 226 GFP_KERNEL); 227 if (unlikely(!skb)) 228 return -ENOMEM; 229 230 mutex_lock(&priv->eeprom_mutex); 231 priv->eeprom = buf; 232 eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb, 233 eeprom_hdr_size + len); 234 235 if (priv->fw_var < 0x509) { 236 eeprom_hdr->v1.offset = cpu_to_le16(offset); 237 eeprom_hdr->v1.len = cpu_to_le16(len); 238 } else { 239 eeprom_hdr->v2.offset = cpu_to_le32(offset); 240 eeprom_hdr->v2.len = cpu_to_le16(len); 241 eeprom_hdr->v2.magic2 = 0xf; 242 memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4); 243 } 244 245 p54_tx(priv, skb); 246 247 if (!wait_for_completion_interruptible_timeout( 248 &priv->eeprom_comp, HZ)) { 249 wiphy_err(priv->hw->wiphy, "device does not respond!\n"); 250 ret = -EBUSY; 251 } 252 priv->eeprom = NULL; 253 mutex_unlock(&priv->eeprom_mutex); 254 return ret; 255} 256 257int p54_update_beacon_tim(struct p54_common *priv, u16 aid, bool set) 258{ 259 struct sk_buff *skb; 260 struct p54_tim *tim; 261 262 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*tim), 263 P54_CONTROL_TYPE_TIM, GFP_ATOMIC); 264 if (unlikely(!skb)) 265 return -ENOMEM; 266 267 tim = (struct p54_tim *) skb_put(skb, sizeof(*tim)); 268 tim->count = 1; 269 tim->entry[0] = cpu_to_le16(set ? (aid | 0x8000) : aid); 270 p54_tx(priv, skb); 271 return 0; 272} 273 274int p54_sta_unlock(struct p54_common *priv, u8 *addr) 275{ 276 struct sk_buff *skb; 277 struct p54_sta_unlock *sta; 278 279 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*sta), 280 P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC); 281 if (unlikely(!skb)) 282 return -ENOMEM; 283 284 sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta)); 285 memcpy(sta->addr, addr, ETH_ALEN); 286 p54_tx(priv, skb); 287 return 0; 288} 289 290int p54_tx_cancel(struct p54_common *priv, __le32 req_id) 291{ 292 struct sk_buff *skb; 293 struct p54_txcancel *cancel; 294 u32 _req_id = le32_to_cpu(req_id); 295 296 if (unlikely(_req_id < priv->rx_start || _req_id > priv->rx_end)) 297 return -EINVAL; 298 299 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*cancel), 300 P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC); 301 if (unlikely(!skb)) 302 return -ENOMEM; 303 304 cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel)); 305 cancel->req_id = req_id; 306 p54_tx(priv, skb); 307 return 0; 308} 309 310int p54_setup_mac(struct p54_common *priv) 311{ 312 struct sk_buff *skb; 313 struct p54_setup_mac *setup; 314 u16 mode; 315 316 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup), 317 P54_CONTROL_TYPE_SETUP, GFP_ATOMIC); 318 if (!skb) 319 return -ENOMEM; 320 321 setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup)); 322 if (!(priv->hw->conf.flags & IEEE80211_CONF_IDLE)) { 323 switch (priv->mode) { 324 case NL80211_IFTYPE_STATION: 325 mode = P54_FILTER_TYPE_STATION; 326 break; 327 case NL80211_IFTYPE_AP: 328 mode = P54_FILTER_TYPE_AP; 329 break; 330 case NL80211_IFTYPE_ADHOC: 331 case NL80211_IFTYPE_MESH_POINT: 332 mode = P54_FILTER_TYPE_IBSS; 333 break; 334 case NL80211_IFTYPE_MONITOR: 335 mode = P54_FILTER_TYPE_PROMISCUOUS; 336 break; 337 default: 338 mode = P54_FILTER_TYPE_HIBERNATE; 339 break; 340 } 341 342 /* 343 * "TRANSPARENT and PROMISCUOUS are mutually exclusive" 344 * STSW45X0C LMAC API - page 12 345 */ 346 if (((priv->filter_flags & FIF_PROMISC_IN_BSS) || 347 (priv->filter_flags & FIF_OTHER_BSS)) && 348 (mode != P54_FILTER_TYPE_PROMISCUOUS)) 349 mode |= P54_FILTER_TYPE_TRANSPARENT; 350 } else { 351 mode = P54_FILTER_TYPE_HIBERNATE; 352 } 353 354 setup->mac_mode = cpu_to_le16(mode); 355 memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN); 356 memcpy(setup->bssid, priv->bssid, ETH_ALEN); 357 setup->rx_antenna = 2 & priv->rx_diversity_mask; /* automatic */ 358 setup->rx_align = 0; 359 if (priv->fw_var < 0x500) { 360 setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask); 361 memset(setup->v1.rts_rates, 0, 8); 362 setup->v1.rx_addr = cpu_to_le32(priv->rx_end); 363 setup->v1.max_rx = cpu_to_le16(priv->rx_mtu); 364 setup->v1.rxhw = cpu_to_le16(priv->rxhw); 365 setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer); 366 setup->v1.unalloc0 = cpu_to_le16(0); 367 } else { 368 setup->v2.rx_addr = cpu_to_le32(priv->rx_end); 369 setup->v2.max_rx = cpu_to_le16(priv->rx_mtu); 370 setup->v2.rxhw = cpu_to_le16(priv->rxhw); 371 setup->v2.timer = cpu_to_le16(priv->wakeup_timer); 372 setup->v2.truncate = cpu_to_le16(48896); 373 setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask); 374 setup->v2.sbss_offset = 0; 375 setup->v2.mcast_window = 0; 376 setup->v2.rx_rssi_threshold = 0; 377 setup->v2.rx_ed_threshold = 0; 378 setup->v2.ref_clock = cpu_to_le32(644245094); 379 setup->v2.lpf_bandwidth = cpu_to_le16(65535); 380 setup->v2.osc_start_delay = cpu_to_le16(65535); 381 } 382 p54_tx(priv, skb); 383 return 0; 384} 385 386int p54_scan(struct p54_common *priv, u16 mode, u16 dwell) 387{ 388 struct sk_buff *skb; 389 struct p54_hdr *hdr; 390 struct p54_scan_head *head; 391 struct p54_iq_autocal_entry *iq_autocal; 392 union p54_scan_body_union *body; 393 struct p54_scan_tail_rate *rate; 394 struct pda_rssi_cal_entry *rssi; 395 unsigned int i; 396 void *entry; 397 int band = priv->hw->conf.channel->band; 398 __le16 freq = cpu_to_le16(priv->hw->conf.channel->center_freq); 399 400 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*head) + 401 2 + sizeof(*iq_autocal) + sizeof(*body) + 402 sizeof(*rate) + 2 * sizeof(*rssi), 403 P54_CONTROL_TYPE_SCAN, GFP_ATOMIC); 404 if (!skb) 405 return -ENOMEM; 406 407 head = (struct p54_scan_head *) skb_put(skb, sizeof(*head)); 408 memset(head->scan_params, 0, sizeof(head->scan_params)); 409 head->mode = cpu_to_le16(mode); 410 head->dwell = cpu_to_le16(dwell); 411 head->freq = freq; 412 413 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) { 414 __le16 *pa_power_points = (__le16 *) skb_put(skb, 2); 415 *pa_power_points = cpu_to_le16(0x0c); 416 } 417 418 iq_autocal = (void *) skb_put(skb, sizeof(*iq_autocal)); 419 for (i = 0; i < priv->iq_autocal_len; i++) { 420 if (priv->iq_autocal[i].freq != freq) 421 continue; 422 423 memcpy(iq_autocal, &priv->iq_autocal[i].params, 424 sizeof(struct p54_iq_autocal_entry)); 425 break; 426 } 427 if (i == priv->iq_autocal_len) 428 goto err; 429 430 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) 431 body = (void *) skb_put(skb, sizeof(body->longbow)); 432 else 433 body = (void *) skb_put(skb, sizeof(body->normal)); 434 435 for (i = 0; i < priv->output_limit->entries; i++) { 436 __le16 *entry_freq = (void *) (priv->output_limit->data + 437 priv->output_limit->entry_size * i); 438 439 if (*entry_freq != freq) 440 continue; 441 442 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) { 443 memcpy(&body->longbow.power_limits, 444 (void *) entry_freq + sizeof(__le16), 445 priv->output_limit->entry_size); 446 } else { 447 struct pda_channel_output_limit *limits = 448 (void *) entry_freq; 449 450 body->normal.val_barker = 0x38; 451 body->normal.val_bpsk = body->normal.dup_bpsk = 452 limits->val_bpsk; 453 body->normal.val_qpsk = body->normal.dup_qpsk = 454 limits->val_qpsk; 455 body->normal.val_16qam = body->normal.dup_16qam = 456 limits->val_16qam; 457 body->normal.val_64qam = body->normal.dup_64qam = 458 limits->val_64qam; 459 } 460 break; 461 } 462 if (i == priv->output_limit->entries) 463 goto err; 464 465 entry = (void *)(priv->curve_data->data + priv->curve_data->offset); 466 for (i = 0; i < priv->curve_data->entries; i++) { 467 if (*((__le16 *)entry) != freq) { 468 entry += priv->curve_data->entry_size; 469 continue; 470 } 471 472 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) { 473 memcpy(&body->longbow.curve_data, 474 (void *) entry + sizeof(__le16), 475 priv->curve_data->entry_size); 476 } else { 477 struct p54_scan_body *chan = &body->normal; 478 struct pda_pa_curve_data *curve_data = 479 (void *) priv->curve_data->data; 480 481 entry += sizeof(__le16); 482 chan->pa_points_per_curve = 8; 483 memset(chan->curve_data, 0, sizeof(*chan->curve_data)); 484 memcpy(chan->curve_data, entry, 485 sizeof(struct p54_pa_curve_data_sample) * 486 min((u8)8, curve_data->points_per_channel)); 487 } 488 break; 489 } 490 if (i == priv->curve_data->entries) 491 goto err; 492 493 if ((priv->fw_var >= 0x500) && (priv->fw_var < 0x509)) { 494 rate = (void *) skb_put(skb, sizeof(*rate)); 495 rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask); 496 for (i = 0; i < sizeof(rate->rts_rates); i++) 497 rate->rts_rates[i] = i; 498 } 499 500 rssi = (struct pda_rssi_cal_entry *) skb_put(skb, sizeof(*rssi)); 501 rssi->mul = cpu_to_le16(priv->rssical_db[band].mul); 502 rssi->add = cpu_to_le16(priv->rssical_db[band].add); 503 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) { 504 /* Longbow frontend needs ever more */ 505 rssi = (void *) skb_put(skb, sizeof(*rssi)); 506 rssi->mul = cpu_to_le16(priv->rssical_db[band].longbow_unkn); 507 rssi->add = cpu_to_le16(priv->rssical_db[band].longbow_unk2); 508 } 509 510 if (priv->fw_var >= 0x509) { 511 rate = (void *) skb_put(skb, sizeof(*rate)); 512 rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask); 513 for (i = 0; i < sizeof(rate->rts_rates); i++) 514 rate->rts_rates[i] = i; 515 } 516 517 hdr = (struct p54_hdr *) skb->data; 518 hdr->len = cpu_to_le16(skb->len - sizeof(*hdr)); 519 520 p54_tx(priv, skb); 521 return 0; 522 523err: 524 wiphy_err(priv->hw->wiphy, "frequency change to channel %d failed.\n", 525 ieee80211_frequency_to_channel( 526 priv->hw->conf.channel->center_freq)); 527 528 dev_kfree_skb_any(skb); 529 return -EINVAL; 530} 531 532int p54_set_leds(struct p54_common *priv) 533{ 534 struct sk_buff *skb; 535 struct p54_led *led; 536 537 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led), 538 P54_CONTROL_TYPE_LED, GFP_ATOMIC); 539 if (unlikely(!skb)) 540 return -ENOMEM; 541 542 led = (struct p54_led *) skb_put(skb, sizeof(*led)); 543 led->flags = cpu_to_le16(0x0003); 544 led->mask[0] = led->mask[1] = cpu_to_le16(priv->softled_state); 545 led->delay[0] = cpu_to_le16(1); 546 led->delay[1] = cpu_to_le16(0); 547 p54_tx(priv, skb); 548 return 0; 549} 550 551int p54_set_edcf(struct p54_common *priv) 552{ 553 struct sk_buff *skb; 554 struct p54_edcf *edcf; 555 556 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf), 557 P54_CONTROL_TYPE_DCFINIT, GFP_ATOMIC); 558 if (unlikely(!skb)) 559 return -ENOMEM; 560 561 edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf)); 562 if (priv->use_short_slot) { 563 edcf->slottime = 9; 564 edcf->sifs = 0x10; 565 edcf->eofpad = 0x00; 566 } else { 567 edcf->slottime = 20; 568 edcf->sifs = 0x0a; 569 edcf->eofpad = 0x06; 570 } 571 /* (see prism54/isl_oid.h for further details) */ 572 edcf->frameburst = cpu_to_le16(0); 573 edcf->round_trip_delay = cpu_to_le16(0); 574 edcf->flags = 0; 575 memset(edcf->mapping, 0, sizeof(edcf->mapping)); 576 memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue)); 577 p54_tx(priv, skb); 578 return 0; 579} 580 581int p54_set_ps(struct p54_common *priv) 582{ 583 struct sk_buff *skb; 584 struct p54_psm *psm; 585 unsigned int i; 586 u16 mode; 587 588 if (priv->hw->conf.flags & IEEE80211_CONF_PS && 589 !priv->powersave_override) 590 mode = P54_PSM | P54_PSM_BEACON_TIMEOUT | P54_PSM_DTIM | 591 P54_PSM_CHECKSUM | P54_PSM_MCBC; 592 else 593 mode = P54_PSM_CAM; 594 595 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*psm), 596 P54_CONTROL_TYPE_PSM, GFP_ATOMIC); 597 if (!skb) 598 return -ENOMEM; 599 600 psm = (struct p54_psm *)skb_put(skb, sizeof(*psm)); 601 psm->mode = cpu_to_le16(mode); 602 psm->aid = cpu_to_le16(priv->aid); 603 for (i = 0; i < ARRAY_SIZE(psm->intervals); i++) { 604 psm->intervals[i].interval = 605 cpu_to_le16(priv->hw->conf.listen_interval); 606 psm->intervals[i].periods = cpu_to_le16(1); 607 } 608 609 psm->beacon_rssi_skip_max = 200; 610 psm->rssi_delta_threshold = 0; 611 psm->nr = 1; 612 psm->exclude[0] = WLAN_EID_TIM; 613 614 p54_tx(priv, skb); 615 return 0; 616} 617 618int p54_init_xbow_synth(struct p54_common *priv) 619{ 620 struct sk_buff *skb; 621 struct p54_xbow_synth *xbow; 622 623 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow), 624 P54_CONTROL_TYPE_XBOW_SYNTH_CFG, GFP_KERNEL); 625 if (unlikely(!skb)) 626 return -ENOMEM; 627 628 xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow)); 629 xbow->magic1 = cpu_to_le16(0x1); 630 xbow->magic2 = cpu_to_le16(0x2); 631 xbow->freq = cpu_to_le16(5390); 632 memset(xbow->padding, 0, sizeof(xbow->padding)); 633 p54_tx(priv, skb); 634 return 0; 635} 636 637int p54_upload_key(struct p54_common *priv, u8 algo, int slot, u8 idx, u8 len, 638 u8 *addr, u8* key) 639{ 640 struct sk_buff *skb; 641 struct p54_keycache *rxkey; 642 643 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey), 644 P54_CONTROL_TYPE_RX_KEYCACHE, GFP_KERNEL); 645 if (unlikely(!skb)) 646 return -ENOMEM; 647 648 rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey)); 649 rxkey->entry = slot; 650 rxkey->key_id = idx; 651 rxkey->key_type = algo; 652 if (addr) 653 memcpy(rxkey->mac, addr, ETH_ALEN); 654 else 655 memset(rxkey->mac, ~0, ETH_ALEN); 656 657 switch (algo) { 658 case P54_CRYPTO_WEP: 659 case P54_CRYPTO_AESCCMP: 660 rxkey->key_len = min_t(u8, 16, len); 661 memcpy(rxkey->key, key, rxkey->key_len); 662 break; 663 664 case P54_CRYPTO_TKIPMICHAEL: 665 rxkey->key_len = 24; 666 memcpy(rxkey->key, key, 16); 667 memcpy(&(rxkey->key[16]), &(key 668 [NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8); 669 break; 670 671 case P54_CRYPTO_NONE: 672 rxkey->key_len = 0; 673 memset(rxkey->key, 0, sizeof(rxkey->key)); 674 break; 675 676 default: 677 wiphy_err(priv->hw->wiphy, 678 "invalid cryptographic algorithm: %d\n", algo); 679 dev_kfree_skb(skb); 680 return -EINVAL; 681 } 682 683 p54_tx(priv, skb); 684 return 0; 685} 686 687int p54_fetch_statistics(struct p54_common *priv) 688{ 689 struct ieee80211_tx_info *txinfo; 690 struct p54_tx_info *p54info; 691 struct sk_buff *skb; 692 693 skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL, 694 sizeof(struct p54_statistics), 695 P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL); 696 if (!skb) 697 return -ENOMEM; 698 699 /* 700 * The statistic feedback causes some extra headaches here, if it 701 * is not to crash/corrupt the firmware data structures. 702 * 703 * Unlike all other Control Get OIDs we can not use helpers like 704 * skb_put to reserve the space for the data we're requesting. 705 * Instead the extra frame length -which will hold the results later- 706 * will only be told to the p54_assign_address, so that following 707 * frames won't be placed into the allegedly empty area. 708 */ 709 txinfo = IEEE80211_SKB_CB(skb); 710 p54info = (void *) txinfo->rate_driver_data; 711 p54info->extra_len = sizeof(struct p54_statistics); 712 713 p54_tx(priv, skb); 714 return 0; 715} 716