1/* 2 * Atheros AR9170 driver 3 * 4 * MAC programming 5 * 6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; see the file COPYING. If not, see 20 * http://www.gnu.org/licenses/. 21 * 22 * This file incorporates work covered by the following copyright and 23 * permission notice: 24 * Copyright (c) 2007-2008 Atheros Communications, Inc. 25 * 26 * Permission to use, copy, modify, and/or distribute this software for any 27 * purpose with or without fee is hereby granted, provided that the above 28 * copyright notice and this permission notice appear in all copies. 29 * 30 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 31 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 32 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 33 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 34 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 35 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 36 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 37 */ 38 39#include <asm/unaligned.h> 40 41#include "ar9170.h" 42#include "cmd.h" 43 44int ar9170_set_dyn_sifs_ack(struct ar9170 *ar) 45{ 46 u32 val; 47 48 if (conf_is_ht40(&ar->hw->conf)) 49 val = 0x010a; 50 else { 51 if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ) 52 val = 0x105; 53 else 54 val = 0x104; 55 } 56 57 return ar9170_write_reg(ar, AR9170_MAC_REG_DYNAMIC_SIFS_ACK, val); 58} 59 60int ar9170_set_slot_time(struct ar9170 *ar) 61{ 62 u32 slottime = 20; 63 64 if (!ar->vif) 65 return 0; 66 67 if ((ar->hw->conf.channel->band == IEEE80211_BAND_5GHZ) || 68 ar->vif->bss_conf.use_short_slot) 69 slottime = 9; 70 71 return ar9170_write_reg(ar, AR9170_MAC_REG_SLOT_TIME, slottime << 10); 72} 73 74int ar9170_set_basic_rates(struct ar9170 *ar) 75{ 76 u8 cck, ofdm; 77 78 if (!ar->vif) 79 return 0; 80 81 ofdm = ar->vif->bss_conf.basic_rates >> 4; 82 83 if (ar->hw->conf.channel->band == IEEE80211_BAND_5GHZ) 84 cck = 0; 85 else 86 cck = ar->vif->bss_conf.basic_rates & 0xf; 87 88 return ar9170_write_reg(ar, AR9170_MAC_REG_BASIC_RATE, 89 ofdm << 8 | cck); 90} 91 92int ar9170_set_qos(struct ar9170 *ar) 93{ 94 ar9170_regwrite_begin(ar); 95 96 ar9170_regwrite(AR9170_MAC_REG_AC0_CW, ar->edcf[0].cw_min | 97 (ar->edcf[0].cw_max << 16)); 98 ar9170_regwrite(AR9170_MAC_REG_AC1_CW, ar->edcf[1].cw_min | 99 (ar->edcf[1].cw_max << 16)); 100 ar9170_regwrite(AR9170_MAC_REG_AC2_CW, ar->edcf[2].cw_min | 101 (ar->edcf[2].cw_max << 16)); 102 ar9170_regwrite(AR9170_MAC_REG_AC3_CW, ar->edcf[3].cw_min | 103 (ar->edcf[3].cw_max << 16)); 104 ar9170_regwrite(AR9170_MAC_REG_AC4_CW, ar->edcf[4].cw_min | 105 (ar->edcf[4].cw_max << 16)); 106 107 ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_AIFS, 108 ((ar->edcf[0].aifs * 9 + 10)) | 109 ((ar->edcf[1].aifs * 9 + 10) << 12) | 110 ((ar->edcf[2].aifs * 9 + 10) << 24)); 111 ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_AIFS, 112 ((ar->edcf[2].aifs * 9 + 10) >> 8) | 113 ((ar->edcf[3].aifs * 9 + 10) << 4) | 114 ((ar->edcf[4].aifs * 9 + 10) << 16)); 115 116 ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP, 117 ar->edcf[0].txop | ar->edcf[1].txop << 16); 118 ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP, 119 ar->edcf[2].txop | ar->edcf[3].txop << 16); 120 121 ar9170_regwrite_finish(); 122 123 return ar9170_regwrite_result(); 124} 125 126static int ar9170_set_ampdu_density(struct ar9170 *ar, u8 mpdudensity) 127{ 128 u32 val; 129 130 /* don't allow AMPDU density > 8us */ 131 if (mpdudensity > 6) 132 return -EINVAL; 133 134 /* Watch out! Otus uses slightly different density values. */ 135 val = 0x140a00 | (mpdudensity ? (mpdudensity + 1) : 0); 136 137 ar9170_regwrite_begin(ar); 138 ar9170_regwrite(AR9170_MAC_REG_AMPDU_DENSITY, val); 139 ar9170_regwrite_finish(); 140 141 return ar9170_regwrite_result(); 142} 143 144int ar9170_init_mac(struct ar9170 *ar) 145{ 146 ar9170_regwrite_begin(ar); 147 148 ar9170_regwrite(AR9170_MAC_REG_ACK_EXTENSION, 0x40); 149 150 ar9170_regwrite(AR9170_MAC_REG_RETRY_MAX, 0); 151 152 /* enable MMIC */ 153 ar9170_regwrite(AR9170_MAC_REG_SNIFFER, 154 AR9170_MAC_REG_SNIFFER_DEFAULTS); 155 156 ar9170_regwrite(AR9170_MAC_REG_RX_THRESHOLD, 0xc1f80); 157 158 ar9170_regwrite(AR9170_MAC_REG_RX_PE_DELAY, 0x70); 159 ar9170_regwrite(AR9170_MAC_REG_EIFS_AND_SIFS, 0xa144000); 160 ar9170_regwrite(AR9170_MAC_REG_SLOT_TIME, 9 << 10); 161 162 /* CF-END mode */ 163 ar9170_regwrite(0x1c3b2c, 0x19000000); 164 165 /* NAV protects ACK only (in TXOP) */ 166 ar9170_regwrite(0x1c3b38, 0x201); 167 168 /* Set Beacon PHY CTRL's TPC to 0x7, TA1=1 */ 169 /* OTUS set AM to 0x1 */ 170 ar9170_regwrite(AR9170_MAC_REG_BCN_HT1, 0x8000170); 171 172 ar9170_regwrite(AR9170_MAC_REG_BACKOFF_PROTECT, 0x105); 173 174 /* AGG test code*/ 175 /* Aggregation MAX number and timeout */ 176 ar9170_regwrite(0x1c3b9c, 0x10000a); 177 178 ar9170_regwrite(AR9170_MAC_REG_FRAMETYPE_FILTER, 179 AR9170_MAC_REG_FTF_DEFAULTS); 180 181 /* Enable deaggregator, response in sniffer mode */ 182 ar9170_regwrite(0x1c3c40, 0x1 | 1<<30); 183 184 /* rate sets */ 185 ar9170_regwrite(AR9170_MAC_REG_BASIC_RATE, 0x150f); 186 ar9170_regwrite(AR9170_MAC_REG_MANDATORY_RATE, 0x150f); 187 ar9170_regwrite(AR9170_MAC_REG_RTS_CTS_RATE, 0x10b01bb); 188 189 /* MIMO response control */ 190 ar9170_regwrite(0x1c3694, 0x4003C1E);/* bit 26~28 otus-AM */ 191 192 /* switch MAC to OTUS interface */ 193 ar9170_regwrite(0x1c3600, 0x3); 194 195 ar9170_regwrite(AR9170_MAC_REG_AMPDU_RX_THRESH, 0xffff); 196 197 /* set PHY register read timeout (??) */ 198 ar9170_regwrite(AR9170_MAC_REG_MISC_680, 0xf00008); 199 200 ar9170_regwrite(AR9170_MAC_REG_RX_TIMEOUT, 0x0); 201 202 /* Set CPU clock frequency to 88/80MHz */ 203 ar9170_regwrite(AR9170_PWR_REG_CLOCK_SEL, 204 AR9170_PWR_CLK_AHB_80_88MHZ | 205 AR9170_PWR_CLK_DAC_160_INV_DLY); 206 207 /* Set WLAN DMA interrupt mode: generate int per packet */ 208 ar9170_regwrite(AR9170_MAC_REG_TXRX_MPI, 0x110011); 209 210 ar9170_regwrite(AR9170_MAC_REG_FCS_SELECT, 211 AR9170_MAC_FCS_FIFO_PROT); 212 213 /* Disables the CF_END frame, undocumented register */ 214 ar9170_regwrite(AR9170_MAC_REG_TXOP_NOT_ENOUGH_IND, 215 0x141E0F48); 216 217 ar9170_regwrite_finish(); 218 219 return ar9170_regwrite_result(); 220} 221 222static int ar9170_set_mac_reg(struct ar9170 *ar, const u32 reg, const u8 *mac) 223{ 224 static const u8 zero[ETH_ALEN] = { 0 }; 225 226 if (!mac) 227 mac = zero; 228 229 ar9170_regwrite_begin(ar); 230 231 ar9170_regwrite(reg, get_unaligned_le32(mac)); 232 ar9170_regwrite(reg + 4, get_unaligned_le16(mac + 4)); 233 234 ar9170_regwrite_finish(); 235 236 return ar9170_regwrite_result(); 237} 238 239int ar9170_update_multicast(struct ar9170 *ar, const u64 mc_hash) 240{ 241 int err; 242 243 ar9170_regwrite_begin(ar); 244 ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_H, mc_hash >> 32); 245 ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_L, mc_hash); 246 ar9170_regwrite_finish(); 247 err = ar9170_regwrite_result(); 248 if (err) 249 return err; 250 251 ar->cur_mc_hash = mc_hash; 252 return 0; 253} 254 255int ar9170_update_frame_filter(struct ar9170 *ar, const u32 filter) 256{ 257 int err; 258 259 err = ar9170_write_reg(ar, AR9170_MAC_REG_FRAMETYPE_FILTER, filter); 260 if (err) 261 return err; 262 263 ar->cur_filter = filter; 264 return 0; 265} 266 267static int ar9170_set_promiscouous(struct ar9170 *ar) 268{ 269 u32 encr_mode, sniffer; 270 int err; 271 272 err = ar9170_read_reg(ar, AR9170_MAC_REG_SNIFFER, &sniffer); 273 if (err) 274 return err; 275 276 err = ar9170_read_reg(ar, AR9170_MAC_REG_ENCRYPTION, &encr_mode); 277 if (err) 278 return err; 279 280 if (ar->sniffer_enabled) { 281 sniffer |= AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC; 282 283 /* 284 * Rx decryption works in place. 285 * 286 * If we don't disable it, the hardware will render all 287 * encrypted frames which are encrypted with an unknown 288 * key useless. 289 */ 290 291 encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE; 292 ar->sniffer_enabled = true; 293 } else { 294 sniffer &= ~AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC; 295 296 if (ar->rx_software_decryption) 297 encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE; 298 else 299 encr_mode &= ~AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE; 300 } 301 302 ar9170_regwrite_begin(ar); 303 ar9170_regwrite(AR9170_MAC_REG_ENCRYPTION, encr_mode); 304 ar9170_regwrite(AR9170_MAC_REG_SNIFFER, sniffer); 305 ar9170_regwrite_finish(); 306 307 return ar9170_regwrite_result(); 308} 309 310int ar9170_set_operating_mode(struct ar9170 *ar) 311{ 312 struct ath_common *common = &ar->common; 313 u32 pm_mode = AR9170_MAC_REG_POWERMGT_DEFAULTS; 314 u8 *mac_addr, *bssid; 315 int err; 316 317 if (ar->vif) { 318 mac_addr = common->macaddr; 319 bssid = common->curbssid; 320 321 switch (ar->vif->type) { 322 case NL80211_IFTYPE_MESH_POINT: 323 case NL80211_IFTYPE_ADHOC: 324 pm_mode |= AR9170_MAC_REG_POWERMGT_IBSS; 325 break; 326 case NL80211_IFTYPE_AP: 327 pm_mode |= AR9170_MAC_REG_POWERMGT_AP; 328 break; 329 case NL80211_IFTYPE_WDS: 330 pm_mode |= AR9170_MAC_REG_POWERMGT_AP_WDS; 331 break; 332 case NL80211_IFTYPE_MONITOR: 333 ar->sniffer_enabled = true; 334 ar->rx_software_decryption = true; 335 break; 336 default: 337 pm_mode |= AR9170_MAC_REG_POWERMGT_STA; 338 break; 339 } 340 } else { 341 mac_addr = NULL; 342 bssid = NULL; 343 } 344 345 err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_MAC_ADDR_L, mac_addr); 346 if (err) 347 return err; 348 349 err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_BSSID_L, bssid); 350 if (err) 351 return err; 352 353 err = ar9170_set_promiscouous(ar); 354 if (err) 355 return err; 356 357 /* set AMPDU density to 8us. */ 358 err = ar9170_set_ampdu_density(ar, 6); 359 if (err) 360 return err; 361 362 ar9170_regwrite_begin(ar); 363 364 ar9170_regwrite(AR9170_MAC_REG_POWERMANAGEMENT, pm_mode); 365 ar9170_regwrite_finish(); 366 367 return ar9170_regwrite_result(); 368} 369 370int ar9170_set_hwretry_limit(struct ar9170 *ar, unsigned int max_retry) 371{ 372 u32 tmp = min_t(u32, 0x33333, max_retry * 0x11111); 373 374 return ar9170_write_reg(ar, AR9170_MAC_REG_RETRY_MAX, tmp); 375} 376 377int ar9170_set_beacon_timers(struct ar9170 *ar) 378{ 379 u32 v = 0; 380 u32 pretbtt = 0; 381 382 if (ar->vif) { 383 v |= ar->vif->bss_conf.beacon_int; 384 385 if (ar->enable_beacon) { 386 switch (ar->vif->type) { 387 case NL80211_IFTYPE_MESH_POINT: 388 case NL80211_IFTYPE_ADHOC: 389 v |= BIT(25); 390 break; 391 case NL80211_IFTYPE_AP: 392 v |= BIT(24); 393 pretbtt = (ar->vif->bss_conf.beacon_int - 6) << 394 16; 395 break; 396 default: 397 break; 398 } 399 } 400 401 v |= ar->vif->bss_conf.dtim_period << 16; 402 } 403 404 ar9170_regwrite_begin(ar); 405 ar9170_regwrite(AR9170_MAC_REG_PRETBTT, pretbtt); 406 ar9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, v); 407 ar9170_regwrite_finish(); 408 return ar9170_regwrite_result(); 409} 410 411int ar9170_update_beacon(struct ar9170 *ar) 412{ 413 struct sk_buff *skb; 414 __le32 *data, *old = NULL; 415 u32 word; 416 int i; 417 418 skb = ieee80211_beacon_get(ar->hw, ar->vif); 419 if (!skb) 420 return -ENOMEM; 421 422 data = (__le32 *)skb->data; 423 if (ar->beacon) 424 old = (__le32 *)ar->beacon->data; 425 426 ar9170_regwrite_begin(ar); 427 for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) { 428 429 if (old && (data[i] == old[i])) 430 continue; 431 432 word = le32_to_cpu(data[i]); 433 ar9170_regwrite(AR9170_BEACON_BUFFER_ADDRESS + 4 * i, word); 434 } 435 436 if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ) 437 ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP, 438 ((skb->len + 4) << (3 + 16)) + 0x0400); 439 else 440 ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP, 441 ((skb->len + 4) << 16) + 0x001b); 442 443 ar9170_regwrite(AR9170_MAC_REG_BCN_LENGTH, skb->len + 4); 444 ar9170_regwrite(AR9170_MAC_REG_BCN_ADDR, AR9170_BEACON_BUFFER_ADDRESS); 445 ar9170_regwrite(AR9170_MAC_REG_BCN_CTRL, 1); 446 447 ar9170_regwrite_finish(); 448 449 dev_kfree_skb(ar->beacon); 450 ar->beacon = skb; 451 452 return ar9170_regwrite_result(); 453} 454 455void ar9170_new_beacon(struct work_struct *work) 456{ 457 struct ar9170 *ar = container_of(work, struct ar9170, 458 beacon_work); 459 struct sk_buff *skb; 460 461 if (unlikely(!IS_STARTED(ar))) 462 return ; 463 464 mutex_lock(&ar->mutex); 465 466 if (!ar->vif) 467 goto out; 468 469 ar9170_update_beacon(ar); 470 471 rcu_read_lock(); 472 while ((skb = ieee80211_get_buffered_bc(ar->hw, ar->vif))) 473 ar9170_op_tx(ar->hw, skb); 474 475 rcu_read_unlock(); 476 477 out: 478 mutex_unlock(&ar->mutex); 479} 480 481int ar9170_upload_key(struct ar9170 *ar, u8 id, const u8 *mac, u8 ktype, 482 u8 keyidx, u8 *keydata, int keylen) 483{ 484 __le32 vals[7]; 485 static const u8 bcast[ETH_ALEN] = 486 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 487 u8 dummy; 488 489 mac = mac ? : bcast; 490 491 vals[0] = cpu_to_le32((keyidx << 16) + id); 492 vals[1] = cpu_to_le32(mac[1] << 24 | mac[0] << 16 | ktype); 493 vals[2] = cpu_to_le32(mac[5] << 24 | mac[4] << 16 | 494 mac[3] << 8 | mac[2]); 495 memset(&vals[3], 0, 16); 496 if (keydata) 497 memcpy(&vals[3], keydata, keylen); 498 499 return ar->exec_cmd(ar, AR9170_CMD_EKEY, 500 sizeof(vals), (u8 *)vals, 501 1, &dummy); 502} 503 504int ar9170_disable_key(struct ar9170 *ar, u8 id) 505{ 506 __le32 val = cpu_to_le32(id); 507 u8 dummy; 508 509 return ar->exec_cmd(ar, AR9170_CMD_EKEY, 510 sizeof(val), (u8 *)&val, 511 1, &dummy); 512} 513