1/* $Id: lmc_media.c,v 1.13 2000/04/11 05:25:26 Exp $ */ 2 3#include <linux/kernel.h> 4#include <linux/string.h> 5#include <linux/timer.h> 6#include <linux/ptrace.h> 7#include <linux/errno.h> 8#include <linux/ioport.h> 9#include <linux/interrupt.h> 10#include <linux/in.h> 11#include <linux/if_arp.h> 12#include <linux/netdevice.h> 13#include <linux/etherdevice.h> 14#include <linux/skbuff.h> 15#include <linux/inet.h> 16#include <linux/bitops.h> 17 18#include <asm/processor.h> /* Processor type for cache alignment. */ 19#include <asm/io.h> 20#include <asm/dma.h> 21 22#include <asm/uaccess.h> 23 24#include "lmc.h" 25#include "lmc_var.h" 26#include "lmc_ioctl.h" 27#include "lmc_debug.h" 28 29#define CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 1 30 31 /* 32 * Copyright (c) 1997-2000 LAN Media Corporation (LMC) 33 * All rights reserved. www.lanmedia.com 34 * 35 * This code is written by: 36 * Andrew Stanley-Jones (asj@cban.com) 37 * Rob Braun (bbraun@vix.com), 38 * Michael Graff (explorer@vix.com) and 39 * Matt Thomas (matt@3am-software.com). 40 * 41 * This software may be used and distributed according to the terms 42 * of the GNU General Public License version 2, incorporated herein by reference. 43 */ 44 45/* 46 * protocol independent method. 47 */ 48static void lmc_set_protocol (lmc_softc_t * const, lmc_ctl_t *); 49 50/* 51 * media independent methods to check on media status, link, light LEDs, 52 * etc. 53 */ 54static void lmc_ds3_init (lmc_softc_t * const); 55static void lmc_ds3_default (lmc_softc_t * const); 56static void lmc_ds3_set_status (lmc_softc_t * const, lmc_ctl_t *); 57static void lmc_ds3_set_100ft (lmc_softc_t * const, int); 58static int lmc_ds3_get_link_status (lmc_softc_t * const); 59static void lmc_ds3_set_crc_length (lmc_softc_t * const, int); 60static void lmc_ds3_set_scram (lmc_softc_t * const, int); 61static void lmc_ds3_watchdog (lmc_softc_t * const); 62 63static void lmc_hssi_init (lmc_softc_t * const); 64static void lmc_hssi_default (lmc_softc_t * const); 65static void lmc_hssi_set_status (lmc_softc_t * const, lmc_ctl_t *); 66static void lmc_hssi_set_clock (lmc_softc_t * const, int); 67static int lmc_hssi_get_link_status (lmc_softc_t * const); 68static void lmc_hssi_set_link_status (lmc_softc_t * const, int); 69static void lmc_hssi_set_crc_length (lmc_softc_t * const, int); 70static void lmc_hssi_watchdog (lmc_softc_t * const); 71 72static void lmc_ssi_init (lmc_softc_t * const); 73static void lmc_ssi_default (lmc_softc_t * const); 74static void lmc_ssi_set_status (lmc_softc_t * const, lmc_ctl_t *); 75static void lmc_ssi_set_clock (lmc_softc_t * const, int); 76static void lmc_ssi_set_speed (lmc_softc_t * const, lmc_ctl_t *); 77static int lmc_ssi_get_link_status (lmc_softc_t * const); 78static void lmc_ssi_set_link_status (lmc_softc_t * const, int); 79static void lmc_ssi_set_crc_length (lmc_softc_t * const, int); 80static void lmc_ssi_watchdog (lmc_softc_t * const); 81 82static void lmc_t1_init (lmc_softc_t * const); 83static void lmc_t1_default (lmc_softc_t * const); 84static void lmc_t1_set_status (lmc_softc_t * const, lmc_ctl_t *); 85static int lmc_t1_get_link_status (lmc_softc_t * const); 86static void lmc_t1_set_circuit_type (lmc_softc_t * const, int); 87static void lmc_t1_set_crc_length (lmc_softc_t * const, int); 88static void lmc_t1_set_clock (lmc_softc_t * const, int); 89static void lmc_t1_watchdog (lmc_softc_t * const); 90 91static void lmc_dummy_set_1 (lmc_softc_t * const, int); 92static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *); 93 94static inline void write_av9110_bit (lmc_softc_t *, int); 95static void write_av9110(lmc_softc_t *, u32, u32, u32, u32, u32); 96 97lmc_media_t lmc_ds3_media = { 98 lmc_ds3_init, /* special media init stuff */ 99 lmc_ds3_default, /* reset to default state */ 100 lmc_ds3_set_status, /* reset status to state provided */ 101 lmc_dummy_set_1, /* set clock source */ 102 lmc_dummy_set2_1, /* set line speed */ 103 lmc_ds3_set_100ft, /* set cable length */ 104 lmc_ds3_set_scram, /* set scrambler */ 105 lmc_ds3_get_link_status, /* get link status */ 106 lmc_dummy_set_1, /* set link status */ 107 lmc_ds3_set_crc_length, /* set CRC length */ 108 lmc_dummy_set_1, /* set T1 or E1 circuit type */ 109 lmc_ds3_watchdog 110}; 111 112lmc_media_t lmc_hssi_media = { 113 lmc_hssi_init, /* special media init stuff */ 114 lmc_hssi_default, /* reset to default state */ 115 lmc_hssi_set_status, /* reset status to state provided */ 116 lmc_hssi_set_clock, /* set clock source */ 117 lmc_dummy_set2_1, /* set line speed */ 118 lmc_dummy_set_1, /* set cable length */ 119 lmc_dummy_set_1, /* set scrambler */ 120 lmc_hssi_get_link_status, /* get link status */ 121 lmc_hssi_set_link_status, /* set link status */ 122 lmc_hssi_set_crc_length, /* set CRC length */ 123 lmc_dummy_set_1, /* set T1 or E1 circuit type */ 124 lmc_hssi_watchdog 125}; 126 127lmc_media_t lmc_ssi_media = { lmc_ssi_init, /* special media init stuff */ 128 lmc_ssi_default, /* reset to default state */ 129 lmc_ssi_set_status, /* reset status to state provided */ 130 lmc_ssi_set_clock, /* set clock source */ 131 lmc_ssi_set_speed, /* set line speed */ 132 lmc_dummy_set_1, /* set cable length */ 133 lmc_dummy_set_1, /* set scrambler */ 134 lmc_ssi_get_link_status, /* get link status */ 135 lmc_ssi_set_link_status, /* set link status */ 136 lmc_ssi_set_crc_length, /* set CRC length */ 137 lmc_dummy_set_1, /* set T1 or E1 circuit type */ 138 lmc_ssi_watchdog 139}; 140 141lmc_media_t lmc_t1_media = { 142 lmc_t1_init, /* special media init stuff */ 143 lmc_t1_default, /* reset to default state */ 144 lmc_t1_set_status, /* reset status to state provided */ 145 lmc_t1_set_clock, /* set clock source */ 146 lmc_dummy_set2_1, /* set line speed */ 147 lmc_dummy_set_1, /* set cable length */ 148 lmc_dummy_set_1, /* set scrambler */ 149 lmc_t1_get_link_status, /* get link status */ 150 lmc_dummy_set_1, /* set link status */ 151 lmc_t1_set_crc_length, /* set CRC length */ 152 lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */ 153 lmc_t1_watchdog 154}; 155 156static void 157lmc_dummy_set_1 (lmc_softc_t * const sc, int a) 158{ 159} 160 161static void 162lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a) 163{ 164} 165 166/* 167 * HSSI methods 168 */ 169 170static void 171lmc_hssi_init (lmc_softc_t * const sc) 172{ 173 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200; 174 175 lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK); 176} 177 178static void 179lmc_hssi_default (lmc_softc_t * const sc) 180{ 181 sc->lmc_miireg16 = LMC_MII16_LED_ALL; 182 183 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); 184 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); 185 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); 186} 187 188/* 189 * Given a user provided state, set ourselves up to match it. This will 190 * always reset the card if needed. 191 */ 192static void 193lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) 194{ 195 if (ctl == NULL) 196 { 197 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source); 198 lmc_set_protocol (sc, NULL); 199 200 return; 201 } 202 203 /* 204 * check for change in clock source 205 */ 206 if (ctl->clock_source && !sc->ictl.clock_source) 207 { 208 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT); 209 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT; 210 } 211 else if (!ctl->clock_source && sc->ictl.clock_source) 212 { 213 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT; 214 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); 215 } 216 217 lmc_set_protocol (sc, ctl); 218} 219 220/* 221 * 1 == internal, 0 == external 222 */ 223static void 224lmc_hssi_set_clock (lmc_softc_t * const sc, int ie) 225{ 226 int old; 227 old = sc->ictl.clock_source; 228 if (ie == LMC_CTL_CLOCK_SOURCE_EXT) 229 { 230 sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK; 231 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 232 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT; 233 if(old != ie) 234 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS); 235 } 236 else 237 { 238 sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK); 239 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 240 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; 241 if(old != ie) 242 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS); 243 } 244} 245 246/* 247 * return hardware link status. 248 * 0 == link is down, 1 == link is up. 249 */ 250static int 251lmc_hssi_get_link_status (lmc_softc_t * const sc) 252{ 253 /* 254 * We're using the same code as SSI since 255 * they're practically the same 256 */ 257 return lmc_ssi_get_link_status(sc); 258} 259 260static void 261lmc_hssi_set_link_status (lmc_softc_t * const sc, int state) 262{ 263 if (state == LMC_LINK_UP) 264 sc->lmc_miireg16 |= LMC_MII16_HSSI_TA; 265 else 266 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA; 267 268 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 269} 270 271/* 272 * 0 == 16bit, 1 == 32bit 273 */ 274static void 275lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state) 276{ 277 if (state == LMC_CTL_CRC_LENGTH_32) 278 { 279 /* 32 bit */ 280 sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC; 281 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; 282 } 283 else 284 { 285 /* 16 bit */ 286 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC; 287 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; 288 } 289 290 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 291} 292 293static void 294lmc_hssi_watchdog (lmc_softc_t * const sc) 295{ 296 /* HSSI is blank */ 297} 298 299/* 300 * DS3 methods 301 */ 302 303/* 304 * Set cable length 305 */ 306static void 307lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie) 308{ 309 if (ie == LMC_CTL_CABLE_LENGTH_GT_100FT) 310 { 311 sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO; 312 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT; 313 } 314 else if (ie == LMC_CTL_CABLE_LENGTH_LT_100FT) 315 { 316 sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO; 317 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT; 318 } 319 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 320} 321 322static void 323lmc_ds3_default (lmc_softc_t * const sc) 324{ 325 sc->lmc_miireg16 = LMC_MII16_LED_ALL; 326 327 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); 328 sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT); 329 sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF); 330 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); 331} 332 333/* 334 * Given a user provided state, set ourselves up to match it. This will 335 * always reset the card if needed. 336 */ 337static void 338lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) 339{ 340 if (ctl == NULL) 341 { 342 sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length); 343 sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff); 344 lmc_set_protocol (sc, NULL); 345 346 return; 347 } 348 349 /* 350 * check for change in cable length setting 351 */ 352 if (ctl->cable_length && !sc->ictl.cable_length) 353 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT); 354 else if (!ctl->cable_length && sc->ictl.cable_length) 355 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT); 356 357 /* 358 * Check for change in scrambler setting (requires reset) 359 */ 360 if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff) 361 lmc_ds3_set_scram (sc, LMC_CTL_ON); 362 else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff) 363 lmc_ds3_set_scram (sc, LMC_CTL_OFF); 364 365 lmc_set_protocol (sc, ctl); 366} 367 368static void 369lmc_ds3_init (lmc_softc_t * const sc) 370{ 371 int i; 372 373 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245; 374 375 /* writes zeros everywhere */ 376 for (i = 0; i < 21; i++) 377 { 378 lmc_mii_writereg (sc, 0, 17, i); 379 lmc_mii_writereg (sc, 0, 18, 0); 380 } 381 382 /* set some essential bits */ 383 lmc_mii_writereg (sc, 0, 17, 1); 384 lmc_mii_writereg (sc, 0, 18, 0x25); /* ser, xtx */ 385 386 lmc_mii_writereg (sc, 0, 17, 5); 387 lmc_mii_writereg (sc, 0, 18, 0x80); /* emode */ 388 389 lmc_mii_writereg (sc, 0, 17, 14); 390 lmc_mii_writereg (sc, 0, 18, 0x30); /* rcgen, tcgen */ 391 392 /* clear counters and latched bits */ 393 for (i = 0; i < 21; i++) 394 { 395 lmc_mii_writereg (sc, 0, 17, i); 396 lmc_mii_readreg (sc, 0, 18); 397 } 398} 399 400/* 401 * 1 == DS3 payload scrambled, 0 == not scrambled 402 */ 403static void 404lmc_ds3_set_scram (lmc_softc_t * const sc, int ie) 405{ 406 if (ie == LMC_CTL_ON) 407 { 408 sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM; 409 sc->ictl.scrambler_onoff = LMC_CTL_ON; 410 } 411 else 412 { 413 sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM; 414 sc->ictl.scrambler_onoff = LMC_CTL_OFF; 415 } 416 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 417} 418 419/* 420 * return hardware link status. 421 * 0 == link is down, 1 == link is up. 422 */ 423static int 424lmc_ds3_get_link_status (lmc_softc_t * const sc) 425{ 426 u16 link_status, link_status_11; 427 int ret = 1; 428 429 lmc_mii_writereg (sc, 0, 17, 7); 430 link_status = lmc_mii_readreg (sc, 0, 18); 431 432 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions 433 * led0 yellow = far-end adapter is in Red alarm condition 434 * led1 blue = received an Alarm Indication signal 435 * (upstream failure) 436 * led2 Green = power to adapter, Gate Array loaded & driver 437 * attached 438 * led3 red = Loss of Signal (LOS) or out of frame (OOF) 439 * conditions detected on T3 receive signal 440 */ 441 442 lmc_led_on(sc, LMC_DS3_LED2); 443 444 if ((link_status & LMC_FRAMER_REG0_DLOS) || 445 (link_status & LMC_FRAMER_REG0_OOFS)){ 446 ret = 0; 447 if(sc->last_led_err[3] != 1){ 448 u16 r1; 449 lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */ 450 r1 = lmc_mii_readreg (sc, 0, 18); 451 r1 &= 0xfe; 452 lmc_mii_writereg(sc, 0, 18, r1); 453 printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name); 454 } 455 lmc_led_on(sc, LMC_DS3_LED3); /* turn on red LED */ 456 sc->last_led_err[3] = 1; 457 } 458 else { 459 lmc_led_off(sc, LMC_DS3_LED3); /* turn on red LED */ 460 if(sc->last_led_err[3] == 1){ 461 u16 r1; 462 lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */ 463 r1 = lmc_mii_readreg (sc, 0, 18); 464 r1 |= 0x01; 465 lmc_mii_writereg(sc, 0, 18, r1); 466 } 467 sc->last_led_err[3] = 0; 468 } 469 470 lmc_mii_writereg(sc, 0, 17, 0x10); 471 link_status_11 = lmc_mii_readreg(sc, 0, 18); 472 if((link_status & LMC_FRAMER_REG0_AIS) || 473 (link_status_11 & LMC_FRAMER_REG10_XBIT)) { 474 ret = 0; 475 if(sc->last_led_err[0] != 1){ 476 printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name); 477 printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name); 478 } 479 lmc_led_on(sc, LMC_DS3_LED0); 480 sc->last_led_err[0] = 1; 481 } 482 else { 483 lmc_led_off(sc, LMC_DS3_LED0); 484 sc->last_led_err[0] = 0; 485 } 486 487 lmc_mii_writereg (sc, 0, 17, 9); 488 link_status = lmc_mii_readreg (sc, 0, 18); 489 490 if(link_status & LMC_FRAMER_REG9_RBLUE){ 491 ret = 0; 492 if(sc->last_led_err[1] != 1){ 493 printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name); 494 } 495 lmc_led_on(sc, LMC_DS3_LED1); 496 sc->last_led_err[1] = 1; 497 } 498 else { 499 lmc_led_off(sc, LMC_DS3_LED1); 500 sc->last_led_err[1] = 0; 501 } 502 503 return ret; 504} 505 506/* 507 * 0 == 16bit, 1 == 32bit 508 */ 509static void 510lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state) 511{ 512 if (state == LMC_CTL_CRC_LENGTH_32) 513 { 514 /* 32 bit */ 515 sc->lmc_miireg16 |= LMC_MII16_DS3_CRC; 516 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; 517 } 518 else 519 { 520 /* 16 bit */ 521 sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC; 522 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; 523 } 524 525 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 526} 527 528static void 529lmc_ds3_watchdog (lmc_softc_t * const sc) 530{ 531 532} 533 534 535/* 536 * SSI methods 537 */ 538 539static void lmc_ssi_init(lmc_softc_t * const sc) 540{ 541 u16 mii17; 542 int cable; 543 544 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000; 545 546 mii17 = lmc_mii_readreg(sc, 0, 17); 547 548 cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT; 549 sc->ictl.cable_type = cable; 550 551 lmc_gpio_mkoutput(sc, LMC_GEP_SSI_TXCLOCK); 552} 553 554static void 555lmc_ssi_default (lmc_softc_t * const sc) 556{ 557 sc->lmc_miireg16 = LMC_MII16_LED_ALL; 558 559 /* 560 * make TXCLOCK always be an output 561 */ 562 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK); 563 564 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); 565 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); 566 sc->lmc_media->set_speed (sc, NULL); 567 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); 568} 569 570/* 571 * Given a user provided state, set ourselves up to match it. This will 572 * always reset the card if needed. 573 */ 574static void 575lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) 576{ 577 if (ctl == NULL) 578 { 579 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source); 580 sc->lmc_media->set_speed (sc, &sc->ictl); 581 lmc_set_protocol (sc, NULL); 582 583 return; 584 } 585 586 /* 587 * check for change in clock source 588 */ 589 if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT 590 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT) 591 { 592 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT); 593 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT; 594 } 595 else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT 596 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT) 597 { 598 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); 599 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT; 600 } 601 602 if (ctl->clock_rate != sc->ictl.clock_rate) 603 sc->lmc_media->set_speed (sc, ctl); 604 605 lmc_set_protocol (sc, ctl); 606} 607 608/* 609 * 1 == internal, 0 == external 610 */ 611static void 612lmc_ssi_set_clock (lmc_softc_t * const sc, int ie) 613{ 614 int old; 615 old = ie; 616 if (ie == LMC_CTL_CLOCK_SOURCE_EXT) 617 { 618 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK); 619 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 620 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT; 621 if(ie != old) 622 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS); 623 } 624 else 625 { 626 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK; 627 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 628 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; 629 if(ie != old) 630 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS); 631 } 632} 633 634static void 635lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl) 636{ 637 lmc_ctl_t *ictl = &sc->ictl; 638 lmc_av9110_t *av; 639 640 /* original settings for clock rate of: 641 * 100 Khz (8,25,0,0,2) were incorrect 642 * they should have been 80,125,1,3,3 643 * There are 17 param combinations to produce this freq. 644 * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations) 645 */ 646 if (ctl == NULL) 647 { 648 av = &ictl->cardspec.ssi; 649 ictl->clock_rate = 1500000; 650 av->f = ictl->clock_rate; 651 av->n = 120; 652 av->m = 100; 653 av->v = 1; 654 av->x = 1; 655 av->r = 2; 656 657 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); 658 return; 659 } 660 661 av = &ctl->cardspec.ssi; 662 663 if (av->f == 0) 664 return; 665 666 ictl->clock_rate = av->f; /* really, this is the rate we are */ 667 ictl->cardspec.ssi = *av; 668 669 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r); 670} 671 672/* 673 * return hardware link status. 674 * 0 == link is down, 1 == link is up. 675 */ 676static int 677lmc_ssi_get_link_status (lmc_softc_t * const sc) 678{ 679 u16 link_status; 680 u32 ticks; 681 int ret = 1; 682 int hw_hdsk = 1; 683 684 /* 685 * missing CTS? Hmm. If we require CTS on, we may never get the 686 * link to come up, so omit it in this test. 687 * 688 * Also, it seems that with a loopback cable, DCD isn't asserted, 689 * so just check for things like this: 690 * DSR _must_ be asserted. 691 * One of DCD or CTS must be asserted. 692 */ 693 694 /* LMC 1000 (SSI) LED definitions 695 * led0 Green = power to adapter, Gate Array loaded & 696 * driver attached 697 * led1 Green = DSR and DTR and RTS and CTS are set 698 * led2 Green = Cable detected 699 * led3 red = No timing is available from the 700 * cable or the on-board frequency 701 * generator. 702 */ 703 704 link_status = lmc_mii_readreg (sc, 0, 16); 705 706 /* Is the transmit clock still available */ 707 ticks = LMC_CSR_READ (sc, csr_gp_timer); 708 ticks = 0x0000ffff - (ticks & 0x0000ffff); 709 710 lmc_led_on (sc, LMC_MII16_LED0); 711 712 /* ====== transmit clock determination ===== */ 713 if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) { 714 lmc_led_off(sc, LMC_MII16_LED3); 715 } 716 else if (ticks == 0 ) { /* no clock found ? */ 717 ret = 0; 718 if (sc->last_led_err[3] != 1) { 719 sc->extra_stats.tx_lossOfClockCnt++; 720 printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name); 721 } 722 sc->last_led_err[3] = 1; 723 lmc_led_on (sc, LMC_MII16_LED3); /* turn ON red LED */ 724 } 725 else { 726 if(sc->last_led_err[3] == 1) 727 printk(KERN_WARNING "%s: Clock Returned\n", sc->name); 728 sc->last_led_err[3] = 0; 729 lmc_led_off (sc, LMC_MII16_LED3); /* turn OFF red LED */ 730 } 731 732 if ((link_status & LMC_MII16_SSI_DSR) == 0) { /* Also HSSI CA */ 733 ret = 0; 734 hw_hdsk = 0; 735 } 736 737#ifdef CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 738 if ((link_status & (LMC_MII16_SSI_CTS | LMC_MII16_SSI_DCD)) == 0){ 739 ret = 0; 740 hw_hdsk = 0; 741 } 742#endif 743 744 if(hw_hdsk == 0){ 745 if(sc->last_led_err[1] != 1) 746 printk(KERN_WARNING "%s: DSR not asserted\n", sc->name); 747 sc->last_led_err[1] = 1; 748 lmc_led_off(sc, LMC_MII16_LED1); 749 } 750 else { 751 if(sc->last_led_err[1] != 0) 752 printk(KERN_WARNING "%s: DSR now asserted\n", sc->name); 753 sc->last_led_err[1] = 0; 754 lmc_led_on(sc, LMC_MII16_LED1); 755 } 756 757 if(ret == 1) { 758 lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */ 759 } 760 761 return ret; 762} 763 764static void 765lmc_ssi_set_link_status (lmc_softc_t * const sc, int state) 766{ 767 if (state == LMC_LINK_UP) 768 { 769 sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS); 770 printk (LMC_PRINTF_FMT ": asserting DTR and RTS\n", LMC_PRINTF_ARGS); 771 } 772 else 773 { 774 sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS); 775 printk (LMC_PRINTF_FMT ": deasserting DTR and RTS\n", LMC_PRINTF_ARGS); 776 } 777 778 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 779 780} 781 782/* 783 * 0 == 16bit, 1 == 32bit 784 */ 785static void 786lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state) 787{ 788 if (state == LMC_CTL_CRC_LENGTH_32) 789 { 790 /* 32 bit */ 791 sc->lmc_miireg16 |= LMC_MII16_SSI_CRC; 792 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; 793 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4; 794 795 } 796 else 797 { 798 /* 16 bit */ 799 sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC; 800 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; 801 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2; 802 } 803 804 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 805} 806 807/* 808 * These are bits to program the ssi frequency generator 809 */ 810static inline void 811write_av9110_bit (lmc_softc_t * sc, int c) 812{ 813 /* 814 * set the data bit as we need it. 815 */ 816 sc->lmc_gpio &= ~(LMC_GEP_CLK); 817 if (c & 0x01) 818 sc->lmc_gpio |= LMC_GEP_DATA; 819 else 820 sc->lmc_gpio &= ~(LMC_GEP_DATA); 821 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 822 823 /* 824 * set the clock to high 825 */ 826 sc->lmc_gpio |= LMC_GEP_CLK; 827 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 828 829 /* 830 * set the clock to low again. 831 */ 832 sc->lmc_gpio &= ~(LMC_GEP_CLK); 833 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 834} 835 836static void write_av9110(lmc_softc_t *sc, u32 n, u32 m, u32 v, u32 x, u32 r) 837{ 838 int i; 839 840 841 sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR; 842 sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK); 843 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 844 845 /* 846 * Set the TXCLOCK, GENERATOR, SERIAL, and SERIALCLK 847 * as outputs. 848 */ 849 lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK 850 | LMC_GEP_SSI_GENERATOR)); 851 852 sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR); 853 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 854 855 /* 856 * a shifting we will go... 857 */ 858 for (i = 0; i < 7; i++) 859 write_av9110_bit (sc, n >> i); 860 for (i = 0; i < 7; i++) 861 write_av9110_bit (sc, m >> i); 862 for (i = 0; i < 1; i++) 863 write_av9110_bit (sc, v >> i); 864 for (i = 0; i < 2; i++) 865 write_av9110_bit (sc, x >> i); 866 for (i = 0; i < 2; i++) 867 write_av9110_bit (sc, r >> i); 868 for (i = 0; i < 5; i++) 869 write_av9110_bit (sc, 0x17 >> i); 870 871 /* 872 * stop driving serial-related signals 873 */ 874 lmc_gpio_mkinput (sc, 875 (LMC_GEP_DATA | LMC_GEP_CLK 876 | LMC_GEP_SSI_GENERATOR)); 877} 878 879static void lmc_ssi_watchdog(lmc_softc_t * const sc) 880{ 881 u16 mii17 = lmc_mii_readreg(sc, 0, 17); 882 if (((mii17 >> 3) & 7) == 7) 883 lmc_led_off(sc, LMC_MII16_LED2); 884 else 885 lmc_led_on(sc, LMC_MII16_LED2); 886} 887 888/* 889 * T1 methods 890 */ 891 892/* 893 * The framer regs are multiplexed through MII regs 17 & 18 894 * write the register address to MII reg 17 and the * data to MII reg 18. */ 895static void 896lmc_t1_write (lmc_softc_t * const sc, int a, int d) 897{ 898 lmc_mii_writereg (sc, 0, 17, a); 899 lmc_mii_writereg (sc, 0, 18, d); 900} 901 902/* Save a warning 903static int 904lmc_t1_read (lmc_softc_t * const sc, int a) 905{ 906 lmc_mii_writereg (sc, 0, 17, a); 907 return lmc_mii_readreg (sc, 0, 18); 908} 909*/ 910 911 912static void 913lmc_t1_init (lmc_softc_t * const sc) 914{ 915 u16 mii16; 916 int i; 917 918 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200; 919 mii16 = lmc_mii_readreg (sc, 0, 16); 920 921 /* reset 8370 */ 922 mii16 &= ~LMC_MII16_T1_RST; 923 lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST); 924 lmc_mii_writereg (sc, 0, 16, mii16); 925 926 /* set T1 or E1 line. Uses sc->lmcmii16 reg in function so update it */ 927 sc->lmc_miireg16 = mii16; 928 lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1); 929 mii16 = sc->lmc_miireg16; 930 931 lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */ 932 lmc_t1_write (sc, 0x02, 0x42); /* JAT_CR - jitter atten config */ 933 lmc_t1_write (sc, 0x14, 0x00); /* LOOP - loopback config */ 934 lmc_t1_write (sc, 0x15, 0x00); /* DL3_TS - external data link timeslot */ 935 lmc_t1_write (sc, 0x18, 0xFF); /* PIO - programmable I/O */ 936 lmc_t1_write (sc, 0x19, 0x30); /* POE - programmable OE */ 937 lmc_t1_write (sc, 0x1A, 0x0F); /* CMUX - clock input mux */ 938 lmc_t1_write (sc, 0x20, 0x41); /* LIU_CR - RX LIU config */ 939 lmc_t1_write (sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */ 940 lmc_t1_write (sc, 0x40, 0x03); /* RCR0 - RX config */ 941 lmc_t1_write (sc, 0x45, 0x00); /* RALM - RX alarm config */ 942 lmc_t1_write (sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */ 943 lmc_t1_write (sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */ 944 lmc_t1_write (sc, 0x70, 0x0D); /* TCR0 - TX framer config */ 945 lmc_t1_write (sc, 0x71, 0x05); /* TCR1 - TX config */ 946 lmc_t1_write (sc, 0x72, 0x0B); /* TFRM - TX frame format */ 947 lmc_t1_write (sc, 0x73, 0x00); /* TERROR - TX error insert */ 948 lmc_t1_write (sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */ 949 lmc_t1_write (sc, 0x75, 0x00); /* TALM - TX alarm signal config */ 950 lmc_t1_write (sc, 0x76, 0x00); /* TPATT - TX test pattern config */ 951 lmc_t1_write (sc, 0x77, 0x00); /* TLB - TX inband loopback config */ 952 lmc_t1_write (sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter config */ 953 lmc_t1_write (sc, 0x91, 0x05); /* CSEL - clad freq sel */ 954 lmc_t1_write (sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */ 955 lmc_t1_write (sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */ 956 lmc_t1_write (sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */ 957 lmc_t1_write (sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */ 958 lmc_t1_write (sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */ 959 for (i = 0; i < 32; i++) 960 { 961 lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */ 962 lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */ 963 lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */ 964 } 965 for (i = 1; i < 25; i++) 966 { 967 lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */ 968 } 969 970 mii16 |= LMC_MII16_T1_XOE; 971 lmc_mii_writereg (sc, 0, 16, mii16); 972 sc->lmc_miireg16 = mii16; 973} 974 975static void 976lmc_t1_default (lmc_softc_t * const sc) 977{ 978 sc->lmc_miireg16 = LMC_MII16_LED_ALL; 979 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); 980 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1); 981 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); 982 /* Right now we can only clock from out internal source */ 983 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; 984} 985/* * Given a user provided state, set ourselves up to match it. This will * always reset the card if needed. 986 */ 987static void 988lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) 989{ 990 if (ctl == NULL) 991 { 992 sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type); 993 lmc_set_protocol (sc, NULL); 994 995 return; 996 } 997 /* 998 * check for change in circuit type */ 999 if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1 1000 && sc->ictl.circuit_type == 1001 LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc, 1002 LMC_CTL_CIRCUIT_TYPE_E1); 1003 else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1 1004 && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1) 1005 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1); 1006 lmc_set_protocol (sc, ctl); 1007} 1008/* 1009 * return hardware link status. 1010 * 0 == link is down, 1 == link is up. 1011 */ static int 1012lmc_t1_get_link_status (lmc_softc_t * const sc) 1013{ 1014 u16 link_status; 1015 int ret = 1; 1016 1017 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions 1018 * led0 yellow = far-end adapter is in Red alarm condition 1019 * led1 blue = received an Alarm Indication signal 1020 * (upstream failure) 1021 * led2 Green = power to adapter, Gate Array loaded & driver 1022 * attached 1023 * led3 red = Loss of Signal (LOS) or out of frame (OOF) 1024 * conditions detected on T3 receive signal 1025 */ 1026 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status in"); 1027 lmc_led_on(sc, LMC_DS3_LED2); 1028 1029 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS); 1030 link_status = lmc_mii_readreg (sc, 0, 18); 1031 1032 1033 if (link_status & T1F_RAIS) { /* turn on blue LED */ 1034 ret = 0; 1035 if(sc->last_led_err[1] != 1){ 1036 printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name); 1037 } 1038 lmc_led_on(sc, LMC_DS3_LED1); 1039 sc->last_led_err[1] = 1; 1040 } 1041 else { 1042 if(sc->last_led_err[1] != 0){ 1043 printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name); 1044 } 1045 lmc_led_off (sc, LMC_DS3_LED1); 1046 sc->last_led_err[1] = 0; 1047 } 1048 1049 /* 1050 * Yellow Alarm is nasty evil stuff, looks at data patterns 1051 * inside the channel and confuses it with HDLC framing 1052 * ignore all yellow alarms. 1053 * 1054 * Do listen to MultiFrame Yellow alarm which while implemented 1055 * different ways isn't in the channel and hence somewhat 1056 * more reliable 1057 */ 1058 1059 if (link_status & T1F_RMYEL) { 1060 ret = 0; 1061 if(sc->last_led_err[0] != 1){ 1062 printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name); 1063 } 1064 lmc_led_on(sc, LMC_DS3_LED0); 1065 sc->last_led_err[0] = 1; 1066 } 1067 else { 1068 if(sc->last_led_err[0] != 0){ 1069 printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name); 1070 } 1071 lmc_led_off(sc, LMC_DS3_LED0); 1072 sc->last_led_err[0] = 0; 1073 } 1074 1075 /* 1076 * Loss of signal and los of frame 1077 * Use the green bit to identify which one lit the led 1078 */ 1079 if(link_status & T1F_RLOF){ 1080 ret = 0; 1081 if(sc->last_led_err[3] != 1){ 1082 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name); 1083 } 1084 lmc_led_on(sc, LMC_DS3_LED3); 1085 sc->last_led_err[3] = 1; 1086 1087 } 1088 else { 1089 if(sc->last_led_err[3] != 0){ 1090 printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name); 1091 } 1092 if( ! (link_status & T1F_RLOS)) 1093 lmc_led_off(sc, LMC_DS3_LED3); 1094 sc->last_led_err[3] = 0; 1095 } 1096 1097 if(link_status & T1F_RLOS){ 1098 ret = 0; 1099 if(sc->last_led_err[2] != 1){ 1100 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name); 1101 } 1102 lmc_led_on(sc, LMC_DS3_LED3); 1103 sc->last_led_err[2] = 1; 1104 1105 } 1106 else { 1107 if(sc->last_led_err[2] != 0){ 1108 printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name); 1109 } 1110 if( ! (link_status & T1F_RLOF)) 1111 lmc_led_off(sc, LMC_DS3_LED3); 1112 sc->last_led_err[2] = 0; 1113 } 1114 1115 sc->lmc_xinfo.t1_alarm1_status = link_status; 1116 1117 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS); 1118 sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18); 1119 1120 1121 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status out"); 1122 1123 return ret; 1124} 1125 1126/* 1127 * 1 == T1 Circuit Type , 0 == E1 Circuit Type 1128 */ 1129static void 1130lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie) 1131{ 1132 if (ie == LMC_CTL_CIRCUIT_TYPE_T1) { 1133 sc->lmc_miireg16 |= LMC_MII16_T1_Z; 1134 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1; 1135 printk(KERN_INFO "%s: In T1 Mode\n", sc->name); 1136 } 1137 else { 1138 sc->lmc_miireg16 &= ~LMC_MII16_T1_Z; 1139 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1; 1140 printk(KERN_INFO "%s: In E1 Mode\n", sc->name); 1141 } 1142 1143 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 1144 1145} 1146 1147/* 1148 * 0 == 16bit, 1 == 32bit */ 1149static void 1150lmc_t1_set_crc_length (lmc_softc_t * const sc, int state) 1151{ 1152 if (state == LMC_CTL_CRC_LENGTH_32) 1153 { 1154 /* 32 bit */ 1155 sc->lmc_miireg16 |= LMC_MII16_T1_CRC; 1156 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32; 1157 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4; 1158 1159 } 1160 else 1161 { 1162 /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC; 1163 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16; 1164 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2; 1165 1166 } 1167 1168 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16); 1169} 1170 1171/* 1172 * 1 == internal, 0 == external 1173 */ 1174static void 1175lmc_t1_set_clock (lmc_softc_t * const sc, int ie) 1176{ 1177 int old; 1178 old = ie; 1179 if (ie == LMC_CTL_CLOCK_SOURCE_EXT) 1180 { 1181 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK); 1182 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 1183 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT; 1184 if(old != ie) 1185 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS); 1186 } 1187 else 1188 { 1189 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK; 1190 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio); 1191 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT; 1192 if(old != ie) 1193 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS); 1194 } 1195} 1196 1197static void 1198lmc_t1_watchdog (lmc_softc_t * const sc) 1199{ 1200} 1201 1202static void 1203lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl) 1204{ 1205 if (!ctl) 1206 sc->ictl.keepalive_onoff = LMC_CTL_ON; 1207} 1208