1/* 2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card. 3 * 4 * Written 2000 by Adam Fritzler 5 * 6 * This software may be used and distributed according to the terms 7 * of the GNU General Public License, incorporated herein by reference. 8 * 9 * This driver module supports the following cards: 10 * - Madge Smart 16/4 Ringnode MC16 11 * - Madge Smart 16/4 Ringnode MC32 (??) 12 * 13 * Maintainer(s): 14 * AF Adam Fritzler 15 * 16 * Modification History: 17 * 16-Jan-00 AF Created 18 * 19 */ 20static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n"; 21 22#include <linux/module.h> 23#include <linux/mca.h> 24#include <linux/slab.h> 25#include <linux/kernel.h> 26#include <linux/errno.h> 27#include <linux/init.h> 28#include <linux/netdevice.h> 29#include <linux/trdevice.h> 30 31#include <asm/system.h> 32#include <asm/io.h> 33#include <asm/irq.h> 34 35#include "tms380tr.h" 36#include "madgemc.h" /* Madge-specific constants */ 37 38#define MADGEMC_IO_EXTENT 32 39#define MADGEMC_SIF_OFFSET 0x08 40 41struct card_info { 42 /* 43 * These are read from the BIA ROM. 44 */ 45 unsigned int manid; 46 unsigned int cardtype; 47 unsigned int cardrev; 48 unsigned int ramsize; 49 50 /* 51 * These are read from the MCA POS registers. 52 */ 53 unsigned int burstmode:2; 54 unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */ 55 unsigned int arblevel:4; 56 unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */ 57 unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */ 58}; 59 60static int madgemc_open(struct net_device *dev); 61static int madgemc_close(struct net_device *dev); 62static int madgemc_chipset_init(struct net_device *dev); 63static void madgemc_read_rom(struct net_device *dev, struct card_info *card); 64static unsigned short madgemc_setnselout_pins(struct net_device *dev); 65static void madgemc_setcabletype(struct net_device *dev, int type); 66 67static int madgemc_mcaproc(char *buf, int slot, void *d); 68 69static void madgemc_setregpage(struct net_device *dev, int page); 70static void madgemc_setsifsel(struct net_device *dev, int val); 71static void madgemc_setint(struct net_device *dev, int val); 72 73static irqreturn_t madgemc_interrupt(int irq, void *dev_id); 74 75#define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 76#define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 77#define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 78#define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 79 80/* 81 * Read a byte-length value from the register. 82 */ 83static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg) 84{ 85 unsigned short ret; 86 if (reg<0x8) 87 ret = SIFREADB(reg); 88 else { 89 madgemc_setregpage(dev, 1); 90 ret = SIFREADB(reg); 91 madgemc_setregpage(dev, 0); 92 } 93 return ret; 94} 95 96/* 97 * Write a byte-length value to a register. 98 */ 99static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg) 100{ 101 if (reg<0x8) 102 SIFWRITEB(val, reg); 103 else { 104 madgemc_setregpage(dev, 1); 105 SIFWRITEB(val, reg); 106 madgemc_setregpage(dev, 0); 107 } 108} 109 110/* 111 * Read a word-length value from a register 112 */ 113static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg) 114{ 115 unsigned short ret; 116 if (reg<0x8) 117 ret = SIFREADW(reg); 118 else { 119 madgemc_setregpage(dev, 1); 120 ret = SIFREADW(reg); 121 madgemc_setregpage(dev, 0); 122 } 123 return ret; 124} 125 126/* 127 * Write a word-length value to a register. 128 */ 129static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg) 130{ 131 if (reg<0x8) 132 SIFWRITEW(val, reg); 133 else { 134 madgemc_setregpage(dev, 1); 135 SIFWRITEW(val, reg); 136 madgemc_setregpage(dev, 0); 137 } 138} 139 140static struct net_device_ops madgemc_netdev_ops __read_mostly; 141 142static int __devinit madgemc_probe(struct device *device) 143{ 144 static int versionprinted; 145 struct net_device *dev; 146 struct net_local *tp; 147 struct card_info *card; 148 struct mca_device *mdev = to_mca_device(device); 149 int ret = 0; 150 151 if (versionprinted++ == 0) 152 printk("%s", version); 153 154 if(mca_device_claimed(mdev)) 155 return -EBUSY; 156 mca_device_set_claim(mdev, 1); 157 158 dev = alloc_trdev(sizeof(struct net_local)); 159 if (!dev) { 160 printk("madgemc: unable to allocate dev space\n"); 161 mca_device_set_claim(mdev, 0); 162 ret = -ENOMEM; 163 goto getout; 164 } 165 166 dev->netdev_ops = &madgemc_netdev_ops; 167 168 card = kmalloc(sizeof(struct card_info), GFP_KERNEL); 169 if (card==NULL) { 170 printk("madgemc: unable to allocate card struct\n"); 171 ret = -ENOMEM; 172 goto getout1; 173 } 174 175 /* 176 * Parse configuration information. This all comes 177 * directly from the publicly available @002d.ADF. 178 * Get it from Madge or your local ADF library. 179 */ 180 181 /* 182 * Base address 183 */ 184 dev->base_addr = 0x0a20 + 185 ((mdev->pos[2] & MC16_POS2_ADDR2)?0x0400:0) + 186 ((mdev->pos[0] & MC16_POS0_ADDR1)?0x1000:0) + 187 ((mdev->pos[3] & MC16_POS3_ADDR3)?0x2000:0); 188 189 /* 190 * Interrupt line 191 */ 192 switch(mdev->pos[0] >> 6) { /* upper two bits */ 193 case 0x1: dev->irq = 3; break; 194 case 0x2: dev->irq = 9; break; /* IRQ 2 = IRQ 9 */ 195 case 0x3: dev->irq = 10; break; 196 default: dev->irq = 0; break; 197 } 198 199 if (dev->irq == 0) { 200 printk("%s: invalid IRQ\n", dev->name); 201 ret = -EBUSY; 202 goto getout2; 203 } 204 205 if (!request_region(dev->base_addr, MADGEMC_IO_EXTENT, 206 "madgemc")) { 207 printk(KERN_INFO "madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev->slot, dev->base_addr); 208 dev->base_addr += MADGEMC_SIF_OFFSET; 209 ret = -EBUSY; 210 goto getout2; 211 } 212 dev->base_addr += MADGEMC_SIF_OFFSET; 213 214 /* 215 * Arbitration Level 216 */ 217 card->arblevel = ((mdev->pos[0] >> 1) & 0x7) + 8; 218 219 /* 220 * Burst mode and Fairness 221 */ 222 card->burstmode = ((mdev->pos[2] >> 6) & 0x3); 223 card->fairness = ((mdev->pos[2] >> 4) & 0x1); 224 225 /* 226 * Ring Speed 227 */ 228 if ((mdev->pos[1] >> 2)&0x1) 229 card->ringspeed = 2; /* not selected */ 230 else if ((mdev->pos[2] >> 5) & 0x1) 231 card->ringspeed = 1; /* 16Mb */ 232 else 233 card->ringspeed = 0; /* 4Mb */ 234 235 /* 236 * Cable type 237 */ 238 if ((mdev->pos[1] >> 6)&0x1) 239 card->cabletype = 1; /* STP/DB9 */ 240 else 241 card->cabletype = 0; /* UTP/RJ-45 */ 242 243 244 /* 245 * ROM Info. This requires us to actually twiddle 246 * bits on the card, so we must ensure above that 247 * the base address is free of conflict (request_region above). 248 */ 249 madgemc_read_rom(dev, card); 250 251 if (card->manid != 0x4d) { /* something went wrong */ 252 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev->name, card->manid); 253 goto getout3; 254 } 255 256 if ((card->cardtype != 0x08) && (card->cardtype != 0x0d)) { 257 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev->name, card->cardtype); 258 ret = -EIO; 259 goto getout3; 260 } 261 262 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */ 263 if ((card->cardtype == 0x08) && (card->cardrev <= 0x01)) 264 card->ramsize = 128; 265 else 266 card->ramsize = 256; 267 268 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n", 269 dev->name, 270 (card->cardtype == 0x08)?MADGEMC16_CARDNAME: 271 MADGEMC32_CARDNAME, card->cardrev, 272 dev->base_addr, dev->irq); 273 274 if (card->cardtype == 0x0d) 275 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev->name); 276 277 if (card->ringspeed==2) { /* Unknown */ 278 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev->name); 279 card->ringspeed = 1; /* default to 16mb */ 280 } 281 282 printk("%s: RAM Size: %dKB\n", dev->name, card->ramsize); 283 284 printk("%s: Ring Speed: %dMb/sec on %s\n", dev->name, 285 (card->ringspeed)?16:4, 286 card->cabletype?"STP/DB9":"UTP/RJ-45"); 287 printk("%s: Arbitration Level: %d\n", dev->name, 288 card->arblevel); 289 290 printk("%s: Burst Mode: ", dev->name); 291 switch(card->burstmode) { 292 case 0: printk("Cycle steal"); break; 293 case 1: printk("Limited burst"); break; 294 case 2: printk("Delayed release"); break; 295 case 3: printk("Immediate release"); break; 296 } 297 printk(" (%s)\n", (card->fairness)?"Unfair":"Fair"); 298 299 300 /* 301 * Enable SIF before we assign the interrupt handler, 302 * just in case we get spurious interrupts that need 303 * handling. 304 */ 305 outb(0, dev->base_addr + MC_CONTROL_REG0); /* sanity */ 306 madgemc_setsifsel(dev, 1); 307 if (request_irq(dev->irq, madgemc_interrupt, IRQF_SHARED, 308 "madgemc", dev)) { 309 ret = -EBUSY; 310 goto getout3; 311 } 312 313 madgemc_chipset_init(dev); /* enables interrupts! */ 314 madgemc_setcabletype(dev, card->cabletype); 315 316 /* Setup MCA structures */ 317 mca_device_set_name(mdev, (card->cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME); 318 mca_set_adapter_procfn(mdev->slot, madgemc_mcaproc, dev); 319 320 printk("%s: Ring Station Address: %pM\n", 321 dev->name, dev->dev_addr); 322 323 if (tmsdev_init(dev, device)) { 324 printk("%s: unable to get memory for dev->priv.\n", 325 dev->name); 326 ret = -ENOMEM; 327 goto getout4; 328 } 329 tp = netdev_priv(dev); 330 331 /* 332 * The MC16 is physically a 32bit card. However, Madge 333 * insists on calling it 16bit, so I'll assume here that 334 * they know what they're talking about. Cut off DMA 335 * at 16mb. 336 */ 337 tp->setnselout = madgemc_setnselout_pins; 338 tp->sifwriteb = madgemc_sifwriteb; 339 tp->sifreadb = madgemc_sifreadb; 340 tp->sifwritew = madgemc_sifwritew; 341 tp->sifreadw = madgemc_sifreadw; 342 tp->DataRate = (card->ringspeed)?SPEED_16:SPEED_4; 343 344 memcpy(tp->ProductID, "Madge MCA 16/4 ", PROD_ID_SIZE + 1); 345 346 tp->tmspriv = card; 347 dev_set_drvdata(device, dev); 348 349 if (register_netdev(dev) == 0) 350 return 0; 351 352 dev_set_drvdata(device, NULL); 353 ret = -ENOMEM; 354getout4: 355 free_irq(dev->irq, dev); 356getout3: 357 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, 358 MADGEMC_IO_EXTENT); 359getout2: 360 kfree(card); 361getout1: 362 free_netdev(dev); 363getout: 364 mca_device_set_claim(mdev, 0); 365 return ret; 366} 367 368/* 369 * Handle interrupts generated by the card 370 * 371 * The MicroChannel Madge cards need slightly more handling 372 * after an interrupt than other TMS380 cards do. 373 * 374 * First we must make sure it was this card that generated the 375 * interrupt (since interrupt sharing is allowed). Then, 376 * because we're using level-triggered interrupts (as is 377 * standard on MCA), we must toggle the interrupt line 378 * on the card in order to claim and acknowledge the interrupt. 379 * Once that is done, the interrupt should be handlable in 380 * the normal tms380tr_interrupt() routine. 381 * 382 * There's two ways we can check to see if the interrupt is ours, 383 * both with their own disadvantages... 384 * 385 * 1) Read in the SIFSTS register from the TMS controller. This 386 * is guarenteed to be accurate, however, there's a fairly 387 * large performance penalty for doing so: the Madge chips 388 * must request the register from the Eagle, the Eagle must 389 * read them from its internal bus, and then take the route 390 * back out again, for a 16bit read. 391 * 392 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs. 393 * The major disadvantage here is that the accuracy of the 394 * bit is in question. However, it cuts out the extra read 395 * cycles it takes to read the Eagle's SIF, as its only an 396 * 8bit read, and theoretically the Madge bit is directly 397 * connected to the interrupt latch coming out of the Eagle 398 * hardware (that statement is not verified). 399 * 400 * I can't determine which of these methods has the best win. For now, 401 * we make a compromise. Use the Madge way for the first interrupt, 402 * which should be the fast-path, and then once we hit the first 403 * interrupt, keep on trying using the SIF method until we've 404 * exhausted all contiguous interrupts. 405 * 406 */ 407static irqreturn_t madgemc_interrupt(int irq, void *dev_id) 408{ 409 int pending,reg1; 410 struct net_device *dev; 411 412 if (!dev_id) { 413 printk("madgemc_interrupt: was not passed a dev_id!\n"); 414 return IRQ_NONE; 415 } 416 417 dev = (struct net_device *)dev_id; 418 419 /* Make sure its really us. -- the Madge way */ 420 pending = inb(dev->base_addr + MC_CONTROL_REG0); 421 if (!(pending & MC_CONTROL_REG0_SINTR)) 422 return IRQ_NONE; /* not our interrupt */ 423 424 /* 425 * Since we're level-triggered, we may miss the rising edge 426 * of the next interrupt while we're off handling this one, 427 * so keep checking until the SIF verifies that it has nothing 428 * left for us to do. 429 */ 430 pending = STS_SYSTEM_IRQ; 431 do { 432 if (pending & STS_SYSTEM_IRQ) { 433 434 /* Toggle the interrupt to reset the latch on card */ 435 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 436 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, 437 dev->base_addr + MC_CONTROL_REG1); 438 outb(reg1, dev->base_addr + MC_CONTROL_REG1); 439 440 /* Continue handling as normal */ 441 tms380tr_interrupt(irq, dev_id); 442 443 pending = SIFREADW(SIFSTS); /* restart - the SIF way */ 444 445 } else 446 return IRQ_HANDLED; 447 } while (1); 448 449 return IRQ_HANDLED; /* not reachable */ 450} 451 452/* 453 * Set the card to the prefered ring speed. 454 * 455 * Unlike newer cards, the MC16/32 have their speed selection 456 * circuit connected to the Madge ASICs and not to the TMS380 457 * NSELOUT pins. Set the ASIC bits correctly here, and return 458 * zero to leave the TMS NSELOUT bits unaffected. 459 * 460 */ 461static unsigned short madgemc_setnselout_pins(struct net_device *dev) 462{ 463 unsigned char reg1; 464 struct net_local *tp = netdev_priv(dev); 465 466 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 467 468 if(tp->DataRate == SPEED_16) 469 reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */ 470 else if (reg1 & MC_CONTROL_REG1_SPEED_SEL) 471 reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */ 472 outb(reg1, dev->base_addr + MC_CONTROL_REG1); 473 474 return 0; /* no change */ 475} 476 477/* 478 * Set the register page. This equates to the SRSX line 479 * on the TMS380Cx6. 480 * 481 * Register selection is normally done via three contiguous 482 * bits. However, some boards (such as the MC16/32) use only 483 * two bits, plus a separate bit in the glue chip. This 484 * sets the SRSX bit (the top bit). See page 4-17 in the 485 * Yellow Book for which registers are affected. 486 * 487 */ 488static void madgemc_setregpage(struct net_device *dev, int page) 489{ 490 static int reg1; 491 492 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 493 if ((page == 0) && (reg1 & MC_CONTROL_REG1_SRSX)) { 494 outb(reg1 ^ MC_CONTROL_REG1_SRSX, 495 dev->base_addr + MC_CONTROL_REG1); 496 } 497 else if (page == 1) { 498 outb(reg1 | MC_CONTROL_REG1_SRSX, 499 dev->base_addr + MC_CONTROL_REG1); 500 } 501 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 502} 503 504/* 505 * The SIF registers are not mapped into register space by default 506 * Set this to 1 to map them, 0 to map the BIA ROM. 507 * 508 */ 509static void madgemc_setsifsel(struct net_device *dev, int val) 510{ 511 unsigned int reg0; 512 513 reg0 = inb(dev->base_addr + MC_CONTROL_REG0); 514 if ((val == 0) && (reg0 & MC_CONTROL_REG0_SIFSEL)) { 515 outb(reg0 ^ MC_CONTROL_REG0_SIFSEL, 516 dev->base_addr + MC_CONTROL_REG0); 517 } else if (val == 1) { 518 outb(reg0 | MC_CONTROL_REG0_SIFSEL, 519 dev->base_addr + MC_CONTROL_REG0); 520 } 521 reg0 = inb(dev->base_addr + MC_CONTROL_REG0); 522} 523 524/* 525 * Enable SIF interrupts 526 * 527 * This does not enable interrupts in the SIF, but rather 528 * enables SIF interrupts to be passed onto the host. 529 * 530 */ 531static void madgemc_setint(struct net_device *dev, int val) 532{ 533 unsigned int reg1; 534 535 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 536 if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) { 537 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, 538 dev->base_addr + MC_CONTROL_REG1); 539 } else if (val == 1) { 540 outb(reg1 | MC_CONTROL_REG1_SINTEN, 541 dev->base_addr + MC_CONTROL_REG1); 542 } 543} 544 545/* 546 * Cable type is set via control register 7. Bit zero high 547 * for UTP, low for STP. 548 */ 549static void madgemc_setcabletype(struct net_device *dev, int type) 550{ 551 outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP, 552 dev->base_addr + MC_CONTROL_REG7); 553} 554 555/* 556 * Enable the functions of the Madge chipset needed for 557 * full working order. 558 */ 559static int madgemc_chipset_init(struct net_device *dev) 560{ 561 outb(0, dev->base_addr + MC_CONTROL_REG1); /* pull SRESET low */ 562 tms380tr_wait(100); /* wait for card to reset */ 563 564 /* bring back into normal operating mode */ 565 outb(MC_CONTROL_REG1_NSRESET, dev->base_addr + MC_CONTROL_REG1); 566 567 /* map SIF registers */ 568 madgemc_setsifsel(dev, 1); 569 570 /* enable SIF interrupts */ 571 madgemc_setint(dev, 1); 572 573 return 0; 574} 575 576/* 577 * Disable the board, and put back into power-up state. 578 */ 579static void madgemc_chipset_close(struct net_device *dev) 580{ 581 /* disable interrupts */ 582 madgemc_setint(dev, 0); 583 /* unmap SIF registers */ 584 madgemc_setsifsel(dev, 0); 585} 586 587/* 588 * Read the card type (MC16 or MC32) from the card. 589 * 590 * The configuration registers are stored in two separate 591 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE) 592 * for page zero, or setting bit 3 for page one. 593 * 594 * Page zero contains the following data: 595 * Byte 0: Manufacturer ID (0x4D -- ASCII "M") 596 * Byte 1: Card type: 597 * 0x08 for MC16 598 * 0x0D for MC32 599 * Byte 2: Card revision 600 * Byte 3: Mirror of POS config register 0 601 * Byte 4: Mirror of POS 1 602 * Byte 5: Mirror of POS 2 603 * 604 * Page one contains the following data: 605 * Byte 0: Unused 606 * Byte 1-6: BIA, MSB to LSB. 607 * 608 * Note that to read the BIA, we must unmap the SIF registers 609 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data 610 * will reside in the same logical location. For this reason, 611 * _never_ read the BIA while the Eagle processor is running! 612 * The SIF will be completely inaccessible until the BIA operation 613 * is complete. 614 * 615 */ 616static void madgemc_read_rom(struct net_device *dev, struct card_info *card) 617{ 618 unsigned long ioaddr; 619 unsigned char reg0, reg1, tmpreg0, i; 620 621 ioaddr = dev->base_addr; 622 623 reg0 = inb(ioaddr + MC_CONTROL_REG0); 624 reg1 = inb(ioaddr + MC_CONTROL_REG1); 625 626 /* Switch to page zero and unmap SIF */ 627 tmpreg0 = reg0 & ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL); 628 outb(tmpreg0, ioaddr + MC_CONTROL_REG0); 629 630 card->manid = inb(ioaddr + MC_ROM_MANUFACTURERID); 631 card->cardtype = inb(ioaddr + MC_ROM_ADAPTERID); 632 card->cardrev = inb(ioaddr + MC_ROM_REVISION); 633 634 /* Switch to rom page one */ 635 outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0); 636 637 /* Read BIA */ 638 dev->addr_len = 6; 639 for (i = 0; i < 6; i++) 640 dev->dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i); 641 642 /* Restore original register values */ 643 outb(reg0, ioaddr + MC_CONTROL_REG0); 644 outb(reg1, ioaddr + MC_CONTROL_REG1); 645} 646 647static int madgemc_open(struct net_device *dev) 648{ 649 /* 650 * Go ahead and reinitialize the chipset again, just to 651 * make sure we didn't get left in a bad state. 652 */ 653 madgemc_chipset_init(dev); 654 tms380tr_open(dev); 655 return 0; 656} 657 658static int madgemc_close(struct net_device *dev) 659{ 660 tms380tr_close(dev); 661 madgemc_chipset_close(dev); 662 return 0; 663} 664 665/* 666 * Give some details available from /proc/mca/slotX 667 */ 668static int madgemc_mcaproc(char *buf, int slot, void *d) 669{ 670 struct net_device *dev = (struct net_device *)d; 671 struct net_local *tp = netdev_priv(dev); 672 struct card_info *curcard = tp->tmspriv; 673 int len = 0; 674 675 len += sprintf(buf+len, "-------\n"); 676 if (curcard) { 677 len += sprintf(buf+len, "Card Revision: %d\n", curcard->cardrev); 678 len += sprintf(buf+len, "RAM Size: %dkb\n", curcard->ramsize); 679 len += sprintf(buf+len, "Cable type: %s\n", (curcard->cabletype)?"STP/DB9":"UTP/RJ-45"); 680 len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard->ringspeed)?16:4); 681 len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp->DataRate==SPEED_16)?16:4); 682 len += sprintf(buf+len, "Device: %s\n", dev->name); 683 len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev->base_addr); 684 len += sprintf(buf+len, "IRQ: %d\n", dev->irq); 685 len += sprintf(buf+len, "Arbitration Level: %d\n", curcard->arblevel); 686 len += sprintf(buf+len, "Burst Mode: "); 687 switch(curcard->burstmode) { 688 case 0: len += sprintf(buf+len, "Cycle steal"); break; 689 case 1: len += sprintf(buf+len, "Limited burst"); break; 690 case 2: len += sprintf(buf+len, "Delayed release"); break; 691 case 3: len += sprintf(buf+len, "Immediate release"); break; 692 } 693 len += sprintf(buf+len, " (%s)\n", (curcard->fairness)?"Unfair":"Fair"); 694 695 len += sprintf(buf+len, "Ring Station Address: %pM\n", 696 dev->dev_addr); 697 } else 698 len += sprintf(buf+len, "Card not configured\n"); 699 700 return len; 701} 702 703static int __devexit madgemc_remove(struct device *device) 704{ 705 struct net_device *dev = dev_get_drvdata(device); 706 struct net_local *tp; 707 struct card_info *card; 708 709 BUG_ON(!dev); 710 711 tp = netdev_priv(dev); 712 card = tp->tmspriv; 713 kfree(card); 714 tp->tmspriv = NULL; 715 716 unregister_netdev(dev); 717 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT); 718 free_irq(dev->irq, dev); 719 tmsdev_term(dev); 720 free_netdev(dev); 721 dev_set_drvdata(device, NULL); 722 723 return 0; 724} 725 726static short madgemc_adapter_ids[] __initdata = { 727 0x002d, 728 0x0000 729}; 730 731static struct mca_driver madgemc_driver = { 732 .id_table = madgemc_adapter_ids, 733 .driver = { 734 .name = "madgemc", 735 .bus = &mca_bus_type, 736 .probe = madgemc_probe, 737 .remove = __devexit_p(madgemc_remove), 738 }, 739}; 740 741static int __init madgemc_init (void) 742{ 743 madgemc_netdev_ops = tms380tr_netdev_ops; 744 madgemc_netdev_ops.ndo_open = madgemc_open; 745 madgemc_netdev_ops.ndo_stop = madgemc_close; 746 747 return mca_register_driver (&madgemc_driver); 748} 749 750static void __exit madgemc_exit (void) 751{ 752 mca_unregister_driver (&madgemc_driver); 753} 754 755module_init(madgemc_init); 756module_exit(madgemc_exit); 757 758MODULE_LICENSE("GPL"); 759