1/*************************************************************************** 2 * 3 * Copyright (C) 2004-2008 SMSC 4 * Copyright (C) 2005-2008 ARM 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 * 20 *************************************************************************** 21 * Rewritten, heavily based on smsc911x simple driver by SMSC. 22 * Partly uses io macros from smc91x.c by Nicolas Pitre 23 * 24 * Supported devices: 25 * LAN9115, LAN9116, LAN9117, LAN9118 26 * LAN9215, LAN9216, LAN9217, LAN9218 27 * LAN9210, LAN9211 28 * LAN9220, LAN9221 29 * 30 */ 31 32#include <linux/crc32.h> 33#include <linux/delay.h> 34#include <linux/errno.h> 35#include <linux/etherdevice.h> 36#include <linux/ethtool.h> 37#include <linux/init.h> 38#include <linux/ioport.h> 39#include <linux/kernel.h> 40#include <linux/module.h> 41#include <linux/netdevice.h> 42#include <linux/platform_device.h> 43#include <linux/sched.h> 44#include <linux/timer.h> 45#include <linux/bug.h> 46#include <linux/bitops.h> 47#include <linux/irq.h> 48#include <linux/io.h> 49#include <linux/swab.h> 50#include <linux/phy.h> 51#include <linux/smsc911x.h> 52#include <linux/device.h> 53#include "smsc911x.h" 54 55#define SMSC_CHIPNAME "smsc911x" 56#define SMSC_MDIONAME "smsc911x-mdio" 57#define SMSC_DRV_VERSION "2008-10-21" 58 59MODULE_LICENSE("GPL"); 60MODULE_VERSION(SMSC_DRV_VERSION); 61MODULE_ALIAS("platform:smsc911x"); 62 63#if USE_DEBUG > 0 64static int debug = 16; 65#else 66static int debug = 3; 67#endif 68 69module_param(debug, int, 0); 70MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 71 72struct smsc911x_data { 73 void __iomem *ioaddr; 74 75 unsigned int idrev; 76 77 /* used to decide which workarounds apply */ 78 unsigned int generation; 79 80 /* device configuration (copied from platform_data during probe) */ 81 struct smsc911x_platform_config config; 82 83 /* This needs to be acquired before calling any of below: 84 * smsc911x_mac_read(), smsc911x_mac_write() 85 */ 86 spinlock_t mac_lock; 87 88 /* spinlock to ensure register accesses are serialised */ 89 spinlock_t dev_lock; 90 91 struct phy_device *phy_dev; 92 struct mii_bus *mii_bus; 93 int phy_irq[PHY_MAX_ADDR]; 94 unsigned int using_extphy; 95 int last_duplex; 96 int last_carrier; 97 98 u32 msg_enable; 99 unsigned int gpio_setting; 100 unsigned int gpio_orig_setting; 101 struct net_device *dev; 102 struct napi_struct napi; 103 104 unsigned int software_irq_signal; 105 106#ifdef USE_PHY_WORK_AROUND 107#define MIN_PACKET_SIZE (64) 108 char loopback_tx_pkt[MIN_PACKET_SIZE]; 109 char loopback_rx_pkt[MIN_PACKET_SIZE]; 110 unsigned int resetcount; 111#endif 112 113 unsigned int multicast_update_pending; 114 unsigned int set_bits_mask; 115 unsigned int clear_bits_mask; 116 unsigned int hashhi; 117 unsigned int hashlo; 118}; 119 120static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 121{ 122 if (pdata->config.flags & SMSC911X_USE_32BIT) 123 return readl(pdata->ioaddr + reg); 124 125 if (pdata->config.flags & SMSC911X_USE_16BIT) 126 return ((readw(pdata->ioaddr + reg) & 0xFFFF) | 127 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16)); 128 129 BUG(); 130 return 0; 131} 132 133static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 134{ 135 u32 data; 136 unsigned long flags; 137 138 spin_lock_irqsave(&pdata->dev_lock, flags); 139 data = __smsc911x_reg_read(pdata, reg); 140 spin_unlock_irqrestore(&pdata->dev_lock, flags); 141 142 return data; 143} 144 145static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 146 u32 val) 147{ 148 if (pdata->config.flags & SMSC911X_USE_32BIT) { 149 writel(val, pdata->ioaddr + reg); 150 return; 151 } 152 153 if (pdata->config.flags & SMSC911X_USE_16BIT) { 154 writew(val & 0xFFFF, pdata->ioaddr + reg); 155 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2); 156 return; 157 } 158 159 BUG(); 160} 161 162static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 163 u32 val) 164{ 165 unsigned long flags; 166 167 spin_lock_irqsave(&pdata->dev_lock, flags); 168 __smsc911x_reg_write(pdata, reg, val); 169 spin_unlock_irqrestore(&pdata->dev_lock, flags); 170} 171 172/* Writes a packet to the TX_DATA_FIFO */ 173static inline void 174smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf, 175 unsigned int wordcount) 176{ 177 unsigned long flags; 178 179 spin_lock_irqsave(&pdata->dev_lock, flags); 180 181 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 182 while (wordcount--) 183 __smsc911x_reg_write(pdata, TX_DATA_FIFO, 184 swab32(*buf++)); 185 goto out; 186 } 187 188 if (pdata->config.flags & SMSC911X_USE_32BIT) { 189 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount); 190 goto out; 191 } 192 193 if (pdata->config.flags & SMSC911X_USE_16BIT) { 194 while (wordcount--) 195 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++); 196 goto out; 197 } 198 199 BUG(); 200out: 201 spin_unlock_irqrestore(&pdata->dev_lock, flags); 202} 203 204/* Reads a packet out of the RX_DATA_FIFO */ 205static inline void 206smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf, 207 unsigned int wordcount) 208{ 209 unsigned long flags; 210 211 spin_lock_irqsave(&pdata->dev_lock, flags); 212 213 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 214 while (wordcount--) 215 *buf++ = swab32(__smsc911x_reg_read(pdata, 216 RX_DATA_FIFO)); 217 goto out; 218 } 219 220 if (pdata->config.flags & SMSC911X_USE_32BIT) { 221 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount); 222 goto out; 223 } 224 225 if (pdata->config.flags & SMSC911X_USE_16BIT) { 226 while (wordcount--) 227 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO); 228 goto out; 229 } 230 231 BUG(); 232out: 233 spin_unlock_irqrestore(&pdata->dev_lock, flags); 234} 235 236/* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read 237 * and smsc911x_mac_write, so assumes mac_lock is held */ 238static int smsc911x_mac_complete(struct smsc911x_data *pdata) 239{ 240 int i; 241 u32 val; 242 243 SMSC_ASSERT_MAC_LOCK(pdata); 244 245 for (i = 0; i < 40; i++) { 246 val = smsc911x_reg_read(pdata, MAC_CSR_CMD); 247 if (!(val & MAC_CSR_CMD_CSR_BUSY_)) 248 return 0; 249 } 250 SMSC_WARNING(HW, "Timed out waiting for MAC not BUSY. " 251 "MAC_CSR_CMD: 0x%08X", val); 252 return -EIO; 253} 254 255/* Fetches a MAC register value. Assumes mac_lock is acquired */ 256static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset) 257{ 258 unsigned int temp; 259 260 SMSC_ASSERT_MAC_LOCK(pdata); 261 262 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 263 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 264 SMSC_WARNING(HW, "MAC busy at entry"); 265 return 0xFFFFFFFF; 266 } 267 268 /* Send the MAC cmd */ 269 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 270 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_)); 271 272 temp = smsc911x_reg_read(pdata, BYTE_TEST); 273 274 /* Wait for the read to complete */ 275 if (likely(smsc911x_mac_complete(pdata) == 0)) 276 return smsc911x_reg_read(pdata, MAC_CSR_DATA); 277 278 SMSC_WARNING(HW, "MAC busy after read"); 279 return 0xFFFFFFFF; 280} 281 282/* Set a mac register, mac_lock must be acquired before calling */ 283static void smsc911x_mac_write(struct smsc911x_data *pdata, 284 unsigned int offset, u32 val) 285{ 286 unsigned int temp; 287 288 SMSC_ASSERT_MAC_LOCK(pdata); 289 290 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 291 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 292 SMSC_WARNING(HW, 293 "smsc911x_mac_write failed, MAC busy at entry"); 294 return; 295 } 296 297 /* Send data to write */ 298 smsc911x_reg_write(pdata, MAC_CSR_DATA, val); 299 300 /* Write the actual data */ 301 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 302 MAC_CSR_CMD_CSR_BUSY_)); 303 304 temp = smsc911x_reg_read(pdata, BYTE_TEST); 305 306 /* Wait for the write to complete */ 307 if (likely(smsc911x_mac_complete(pdata) == 0)) 308 return; 309 310 SMSC_WARNING(HW, 311 "smsc911x_mac_write failed, MAC busy after write"); 312} 313 314/* Get a phy register */ 315static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx) 316{ 317 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 318 unsigned long flags; 319 unsigned int addr; 320 int i, reg; 321 322 spin_lock_irqsave(&pdata->mac_lock, flags); 323 324 /* Confirm MII not busy */ 325 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 326 SMSC_WARNING(HW, 327 "MII is busy in smsc911x_mii_read???"); 328 reg = -EIO; 329 goto out; 330 } 331 332 /* Set the address, index & direction (read from PHY) */ 333 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6); 334 smsc911x_mac_write(pdata, MII_ACC, addr); 335 336 /* Wait for read to complete w/ timeout */ 337 for (i = 0; i < 100; i++) 338 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 339 reg = smsc911x_mac_read(pdata, MII_DATA); 340 goto out; 341 } 342 343 SMSC_WARNING(HW, "Timed out waiting for MII read to finish"); 344 reg = -EIO; 345 346out: 347 spin_unlock_irqrestore(&pdata->mac_lock, flags); 348 return reg; 349} 350 351/* Set a phy register */ 352static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx, 353 u16 val) 354{ 355 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 356 unsigned long flags; 357 unsigned int addr; 358 int i, reg; 359 360 spin_lock_irqsave(&pdata->mac_lock, flags); 361 362 /* Confirm MII not busy */ 363 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 364 SMSC_WARNING(HW, 365 "MII is busy in smsc911x_mii_write???"); 366 reg = -EIO; 367 goto out; 368 } 369 370 /* Put the data to write in the MAC */ 371 smsc911x_mac_write(pdata, MII_DATA, val); 372 373 /* Set the address, index & direction (write to PHY) */ 374 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | 375 MII_ACC_MII_WRITE_; 376 smsc911x_mac_write(pdata, MII_ACC, addr); 377 378 /* Wait for write to complete w/ timeout */ 379 for (i = 0; i < 100; i++) 380 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 381 reg = 0; 382 goto out; 383 } 384 385 SMSC_WARNING(HW, "Timed out waiting for MII write to finish"); 386 reg = -EIO; 387 388out: 389 spin_unlock_irqrestore(&pdata->mac_lock, flags); 390 return reg; 391} 392 393/* Switch to external phy. Assumes tx and rx are stopped. */ 394static void smsc911x_phy_enable_external(struct smsc911x_data *pdata) 395{ 396 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 397 398 /* Disable phy clocks to the MAC */ 399 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 400 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; 401 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 402 udelay(10); /* Enough time for clocks to stop */ 403 404 /* Switch to external phy */ 405 hwcfg |= HW_CFG_EXT_PHY_EN_; 406 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 407 408 /* Enable phy clocks to the MAC */ 409 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 410 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; 411 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 412 udelay(10); /* Enough time for clocks to restart */ 413 414 hwcfg |= HW_CFG_SMI_SEL_; 415 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 416} 417 418/* Autodetects and enables external phy if present on supported chips. 419 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY 420 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */ 421static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata) 422{ 423 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 424 425 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) { 426 SMSC_TRACE(HW, "Forcing internal PHY"); 427 pdata->using_extphy = 0; 428 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) { 429 SMSC_TRACE(HW, "Forcing external PHY"); 430 smsc911x_phy_enable_external(pdata); 431 pdata->using_extphy = 1; 432 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) { 433 SMSC_TRACE(HW, "HW_CFG EXT_PHY_DET set, using external PHY"); 434 smsc911x_phy_enable_external(pdata); 435 pdata->using_extphy = 1; 436 } else { 437 SMSC_TRACE(HW, "HW_CFG EXT_PHY_DET clear, using internal PHY"); 438 pdata->using_extphy = 0; 439 } 440} 441 442/* Fetches a tx status out of the status fifo */ 443static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata) 444{ 445 unsigned int result = 446 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_; 447 448 if (result != 0) 449 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO); 450 451 return result; 452} 453 454/* Fetches the next rx status */ 455static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata) 456{ 457 unsigned int result = 458 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_; 459 460 if (result != 0) 461 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO); 462 463 return result; 464} 465 466#ifdef USE_PHY_WORK_AROUND 467static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata) 468{ 469 unsigned int tries; 470 u32 wrsz; 471 u32 rdsz; 472 ulong bufp; 473 474 for (tries = 0; tries < 10; tries++) { 475 unsigned int txcmd_a; 476 unsigned int txcmd_b; 477 unsigned int status; 478 unsigned int pktlength; 479 unsigned int i; 480 481 /* Zero-out rx packet memory */ 482 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE); 483 484 /* Write tx packet to 118 */ 485 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16; 486 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 487 txcmd_a |= MIN_PACKET_SIZE; 488 489 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE; 490 491 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a); 492 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b); 493 494 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3); 495 wrsz = MIN_PACKET_SIZE + 3; 496 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3); 497 wrsz >>= 2; 498 499 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 500 501 /* Wait till transmit is done */ 502 i = 60; 503 do { 504 udelay(5); 505 status = smsc911x_tx_get_txstatus(pdata); 506 } while ((i--) && (!status)); 507 508 if (!status) { 509 SMSC_WARNING(HW, "Failed to transmit " 510 "during loopback test"); 511 continue; 512 } 513 if (status & TX_STS_ES_) { 514 SMSC_WARNING(HW, "Transmit encountered " 515 "errors during loopback test"); 516 continue; 517 } 518 519 /* Wait till receive is done */ 520 i = 60; 521 do { 522 udelay(5); 523 status = smsc911x_rx_get_rxstatus(pdata); 524 } while ((i--) && (!status)); 525 526 if (!status) { 527 SMSC_WARNING(HW, 528 "Failed to receive during loopback test"); 529 continue; 530 } 531 if (status & RX_STS_ES_) { 532 SMSC_WARNING(HW, "Receive encountered " 533 "errors during loopback test"); 534 continue; 535 } 536 537 pktlength = ((status & 0x3FFF0000UL) >> 16); 538 bufp = (ulong)pdata->loopback_rx_pkt; 539 rdsz = pktlength + 3; 540 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3); 541 rdsz >>= 2; 542 543 smsc911x_rx_readfifo(pdata, (unsigned int *)bufp, rdsz); 544 545 if (pktlength != (MIN_PACKET_SIZE + 4)) { 546 SMSC_WARNING(HW, "Unexpected packet size " 547 "during loop back test, size=%d, will retry", 548 pktlength); 549 } else { 550 unsigned int j; 551 int mismatch = 0; 552 for (j = 0; j < MIN_PACKET_SIZE; j++) { 553 if (pdata->loopback_tx_pkt[j] 554 != pdata->loopback_rx_pkt[j]) { 555 mismatch = 1; 556 break; 557 } 558 } 559 if (!mismatch) { 560 SMSC_TRACE(HW, "Successfully verified " 561 "loopback packet"); 562 return 0; 563 } else { 564 SMSC_WARNING(HW, "Data mismatch " 565 "during loop back test, will retry"); 566 } 567 } 568 } 569 570 return -EIO; 571} 572 573static int smsc911x_phy_reset(struct smsc911x_data *pdata) 574{ 575 struct phy_device *phy_dev = pdata->phy_dev; 576 unsigned int temp; 577 unsigned int i = 100000; 578 579 BUG_ON(!phy_dev); 580 BUG_ON(!phy_dev->bus); 581 582 SMSC_TRACE(HW, "Performing PHY BCR Reset"); 583 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET); 584 do { 585 msleep(1); 586 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, 587 MII_BMCR); 588 } while ((i--) && (temp & BMCR_RESET)); 589 590 if (temp & BMCR_RESET) { 591 SMSC_WARNING(HW, "PHY reset failed to complete."); 592 return -EIO; 593 } 594 /* Extra delay required because the phy may not be completed with 595 * its reset when BMCR_RESET is cleared. Specs say 256 uS is 596 * enough delay but using 1ms here to be safe */ 597 msleep(1); 598 599 return 0; 600} 601 602static int smsc911x_phy_loopbacktest(struct net_device *dev) 603{ 604 struct smsc911x_data *pdata = netdev_priv(dev); 605 struct phy_device *phy_dev = pdata->phy_dev; 606 int result = -EIO; 607 unsigned int i, val; 608 unsigned long flags; 609 610 /* Initialise tx packet using broadcast destination address */ 611 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN); 612 613 /* Use incrementing source address */ 614 for (i = 6; i < 12; i++) 615 pdata->loopback_tx_pkt[i] = (char)i; 616 617 /* Set length type field */ 618 pdata->loopback_tx_pkt[12] = 0x00; 619 pdata->loopback_tx_pkt[13] = 0x00; 620 621 for (i = 14; i < MIN_PACKET_SIZE; i++) 622 pdata->loopback_tx_pkt[i] = (char)i; 623 624 val = smsc911x_reg_read(pdata, HW_CFG); 625 val &= HW_CFG_TX_FIF_SZ_; 626 val |= HW_CFG_SF_; 627 smsc911x_reg_write(pdata, HW_CFG, val); 628 629 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 630 smsc911x_reg_write(pdata, RX_CFG, 631 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8); 632 633 for (i = 0; i < 10; i++) { 634 /* Set PHY to 10/FD, no ANEG, and loopback mode */ 635 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 636 BMCR_LOOPBACK | BMCR_FULLDPLX); 637 638 /* Enable MAC tx/rx, FD */ 639 spin_lock_irqsave(&pdata->mac_lock, flags); 640 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_ 641 | MAC_CR_TXEN_ | MAC_CR_RXEN_); 642 spin_unlock_irqrestore(&pdata->mac_lock, flags); 643 644 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) { 645 result = 0; 646 break; 647 } 648 pdata->resetcount++; 649 650 /* Disable MAC rx */ 651 spin_lock_irqsave(&pdata->mac_lock, flags); 652 smsc911x_mac_write(pdata, MAC_CR, 0); 653 spin_unlock_irqrestore(&pdata->mac_lock, flags); 654 655 smsc911x_phy_reset(pdata); 656 } 657 658 /* Disable MAC */ 659 spin_lock_irqsave(&pdata->mac_lock, flags); 660 smsc911x_mac_write(pdata, MAC_CR, 0); 661 spin_unlock_irqrestore(&pdata->mac_lock, flags); 662 663 /* Cancel PHY loopback mode */ 664 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0); 665 666 smsc911x_reg_write(pdata, TX_CFG, 0); 667 smsc911x_reg_write(pdata, RX_CFG, 0); 668 669 return result; 670} 671#endif /* USE_PHY_WORK_AROUND */ 672 673static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata) 674{ 675 struct phy_device *phy_dev = pdata->phy_dev; 676 u32 afc = smsc911x_reg_read(pdata, AFC_CFG); 677 u32 flow; 678 unsigned long flags; 679 680 if (phy_dev->duplex == DUPLEX_FULL) { 681 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE); 682 u16 rmtadv = phy_read(phy_dev, MII_LPA); 683 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 684 685 if (cap & FLOW_CTRL_RX) 686 flow = 0xFFFF0002; 687 else 688 flow = 0; 689 690 if (cap & FLOW_CTRL_TX) 691 afc |= 0xF; 692 else 693 afc &= ~0xF; 694 695 SMSC_TRACE(HW, "rx pause %s, tx pause %s", 696 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 697 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 698 } else { 699 SMSC_TRACE(HW, "half duplex"); 700 flow = 0; 701 afc |= 0xF; 702 } 703 704 spin_lock_irqsave(&pdata->mac_lock, flags); 705 smsc911x_mac_write(pdata, FLOW, flow); 706 spin_unlock_irqrestore(&pdata->mac_lock, flags); 707 708 smsc911x_reg_write(pdata, AFC_CFG, afc); 709} 710 711/* Update link mode if anything has changed. Called periodically when the 712 * PHY is in polling mode, even if nothing has changed. */ 713static void smsc911x_phy_adjust_link(struct net_device *dev) 714{ 715 struct smsc911x_data *pdata = netdev_priv(dev); 716 struct phy_device *phy_dev = pdata->phy_dev; 717 unsigned long flags; 718 int carrier; 719 720 if (phy_dev->duplex != pdata->last_duplex) { 721 unsigned int mac_cr; 722 SMSC_TRACE(HW, "duplex state has changed"); 723 724 spin_lock_irqsave(&pdata->mac_lock, flags); 725 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 726 if (phy_dev->duplex) { 727 SMSC_TRACE(HW, 728 "configuring for full duplex mode"); 729 mac_cr |= MAC_CR_FDPX_; 730 } else { 731 SMSC_TRACE(HW, 732 "configuring for half duplex mode"); 733 mac_cr &= ~MAC_CR_FDPX_; 734 } 735 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 736 spin_unlock_irqrestore(&pdata->mac_lock, flags); 737 738 smsc911x_phy_update_flowcontrol(pdata); 739 pdata->last_duplex = phy_dev->duplex; 740 } 741 742 carrier = netif_carrier_ok(dev); 743 if (carrier != pdata->last_carrier) { 744 SMSC_TRACE(HW, "carrier state has changed"); 745 if (carrier) { 746 SMSC_TRACE(HW, "configuring for carrier OK"); 747 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) && 748 (!pdata->using_extphy)) { 749 /* Restore original GPIO configuration */ 750 pdata->gpio_setting = pdata->gpio_orig_setting; 751 smsc911x_reg_write(pdata, GPIO_CFG, 752 pdata->gpio_setting); 753 } 754 } else { 755 SMSC_TRACE(HW, "configuring for no carrier"); 756 /* Check global setting that LED1 757 * usage is 10/100 indicator */ 758 pdata->gpio_setting = smsc911x_reg_read(pdata, 759 GPIO_CFG); 760 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) && 761 (!pdata->using_extphy)) { 762 /* Force 10/100 LED off, after saving 763 * original GPIO configuration */ 764 pdata->gpio_orig_setting = pdata->gpio_setting; 765 766 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_; 767 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_ 768 | GPIO_CFG_GPIODIR0_ 769 | GPIO_CFG_GPIOD0_); 770 smsc911x_reg_write(pdata, GPIO_CFG, 771 pdata->gpio_setting); 772 } 773 } 774 pdata->last_carrier = carrier; 775 } 776} 777 778static int smsc911x_mii_probe(struct net_device *dev) 779{ 780 struct smsc911x_data *pdata = netdev_priv(dev); 781 struct phy_device *phydev = NULL; 782 int ret; 783 784 /* find the first phy */ 785 phydev = phy_find_first(pdata->mii_bus); 786 if (!phydev) { 787 pr_err("%s: no PHY found\n", dev->name); 788 return -ENODEV; 789 } 790 791 SMSC_TRACE(PROBE, "PHY %d: addr %d, phy_id 0x%08X", 792 phy_addr, phydev->addr, phydev->phy_id); 793 794 ret = phy_connect_direct(dev, phydev, 795 &smsc911x_phy_adjust_link, 0, 796 pdata->config.phy_interface); 797 798 if (ret) { 799 pr_err("%s: Could not attach to PHY\n", dev->name); 800 return ret; 801 } 802 803 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", 804 dev->name, phydev->drv->name, 805 dev_name(&phydev->dev), phydev->irq); 806 807 /* mask with MAC supported features */ 808 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause | 809 SUPPORTED_Asym_Pause); 810 phydev->advertising = phydev->supported; 811 812 pdata->phy_dev = phydev; 813 pdata->last_duplex = -1; 814 pdata->last_carrier = -1; 815 816#ifdef USE_PHY_WORK_AROUND 817 if (smsc911x_phy_loopbacktest(dev) < 0) { 818 SMSC_WARNING(HW, "Failed Loop Back Test"); 819 return -ENODEV; 820 } 821 SMSC_TRACE(HW, "Passed Loop Back Test"); 822#endif /* USE_PHY_WORK_AROUND */ 823 824 SMSC_TRACE(HW, "phy initialised successfully"); 825 return 0; 826} 827 828static int __devinit smsc911x_mii_init(struct platform_device *pdev, 829 struct net_device *dev) 830{ 831 struct smsc911x_data *pdata = netdev_priv(dev); 832 int err = -ENXIO, i; 833 834 pdata->mii_bus = mdiobus_alloc(); 835 if (!pdata->mii_bus) { 836 err = -ENOMEM; 837 goto err_out_1; 838 } 839 840 pdata->mii_bus->name = SMSC_MDIONAME; 841 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id); 842 pdata->mii_bus->priv = pdata; 843 pdata->mii_bus->read = smsc911x_mii_read; 844 pdata->mii_bus->write = smsc911x_mii_write; 845 pdata->mii_bus->irq = pdata->phy_irq; 846 for (i = 0; i < PHY_MAX_ADDR; ++i) 847 pdata->mii_bus->irq[i] = PHY_POLL; 848 849 pdata->mii_bus->parent = &pdev->dev; 850 851 switch (pdata->idrev & 0xFFFF0000) { 852 case 0x01170000: 853 case 0x01150000: 854 case 0x117A0000: 855 case 0x115A0000: 856 /* External PHY supported, try to autodetect */ 857 smsc911x_phy_initialise_external(pdata); 858 break; 859 default: 860 SMSC_TRACE(HW, "External PHY is not supported, " 861 "using internal PHY"); 862 pdata->using_extphy = 0; 863 break; 864 } 865 866 if (!pdata->using_extphy) { 867 /* Mask all PHYs except ID 1 (internal) */ 868 pdata->mii_bus->phy_mask = ~(1 << 1); 869 } 870 871 if (mdiobus_register(pdata->mii_bus)) { 872 SMSC_WARNING(PROBE, "Error registering mii bus"); 873 goto err_out_free_bus_2; 874 } 875 876 if (smsc911x_mii_probe(dev) < 0) { 877 SMSC_WARNING(PROBE, "Error registering mii bus"); 878 goto err_out_unregister_bus_3; 879 } 880 881 return 0; 882 883err_out_unregister_bus_3: 884 mdiobus_unregister(pdata->mii_bus); 885err_out_free_bus_2: 886 mdiobus_free(pdata->mii_bus); 887err_out_1: 888 return err; 889} 890 891/* Gets the number of tx statuses in the fifo */ 892static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata) 893{ 894 return (smsc911x_reg_read(pdata, TX_FIFO_INF) 895 & TX_FIFO_INF_TSUSED_) >> 16; 896} 897 898/* Reads tx statuses and increments counters where necessary */ 899static void smsc911x_tx_update_txcounters(struct net_device *dev) 900{ 901 struct smsc911x_data *pdata = netdev_priv(dev); 902 unsigned int tx_stat; 903 904 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) { 905 if (unlikely(tx_stat & 0x80000000)) { 906 /* In this driver the packet tag is used as the packet 907 * length. Since a packet length can never reach the 908 * size of 0x8000, this bit is reserved. It is worth 909 * noting that the "reserved bit" in the warning above 910 * does not reference a hardware defined reserved bit 911 * but rather a driver defined one. 912 */ 913 SMSC_WARNING(HW, 914 "Packet tag reserved bit is high"); 915 } else { 916 if (unlikely(tx_stat & TX_STS_ES_)) { 917 dev->stats.tx_errors++; 918 } else { 919 dev->stats.tx_packets++; 920 dev->stats.tx_bytes += (tx_stat >> 16); 921 } 922 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) { 923 dev->stats.collisions += 16; 924 dev->stats.tx_aborted_errors += 1; 925 } else { 926 dev->stats.collisions += 927 ((tx_stat >> 3) & 0xF); 928 } 929 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_)) 930 dev->stats.tx_carrier_errors += 1; 931 if (unlikely(tx_stat & TX_STS_LATE_COL_)) { 932 dev->stats.collisions++; 933 dev->stats.tx_aborted_errors++; 934 } 935 } 936 } 937} 938 939/* Increments the Rx error counters */ 940static void 941smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat) 942{ 943 int crc_err = 0; 944 945 if (unlikely(rxstat & RX_STS_ES_)) { 946 dev->stats.rx_errors++; 947 if (unlikely(rxstat & RX_STS_CRC_ERR_)) { 948 dev->stats.rx_crc_errors++; 949 crc_err = 1; 950 } 951 } 952 if (likely(!crc_err)) { 953 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) && 954 (rxstat & RX_STS_LENGTH_ERR_))) 955 dev->stats.rx_length_errors++; 956 if (rxstat & RX_STS_MCAST_) 957 dev->stats.multicast++; 958 } 959} 960 961/* Quickly dumps bad packets */ 962static void 963smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes) 964{ 965 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2; 966 967 if (likely(pktwords >= 4)) { 968 unsigned int timeout = 500; 969 unsigned int val; 970 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_); 971 do { 972 udelay(1); 973 val = smsc911x_reg_read(pdata, RX_DP_CTRL); 974 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout); 975 976 if (unlikely(timeout == 0)) 977 SMSC_WARNING(HW, "Timed out waiting for " 978 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val); 979 } else { 980 unsigned int temp; 981 while (pktwords--) 982 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO); 983 } 984} 985 986/* NAPI poll function */ 987static int smsc911x_poll(struct napi_struct *napi, int budget) 988{ 989 struct smsc911x_data *pdata = 990 container_of(napi, struct smsc911x_data, napi); 991 struct net_device *dev = pdata->dev; 992 int npackets = 0; 993 994 while (npackets < budget) { 995 unsigned int pktlength; 996 unsigned int pktwords; 997 struct sk_buff *skb; 998 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata); 999 1000 if (!rxstat) { 1001 unsigned int temp; 1002 /* We processed all packets available. Tell NAPI it can 1003 * stop polling then re-enable rx interrupts */ 1004 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_); 1005 napi_complete(napi); 1006 temp = smsc911x_reg_read(pdata, INT_EN); 1007 temp |= INT_EN_RSFL_EN_; 1008 smsc911x_reg_write(pdata, INT_EN, temp); 1009 break; 1010 } 1011 1012 /* Count packet for NAPI scheduling, even if it has an error. 1013 * Error packets still require cycles to discard */ 1014 npackets++; 1015 1016 pktlength = ((rxstat & 0x3FFF0000) >> 16); 1017 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2; 1018 smsc911x_rx_counterrors(dev, rxstat); 1019 1020 if (unlikely(rxstat & RX_STS_ES_)) { 1021 SMSC_WARNING(RX_ERR, 1022 "Discarding packet with error bit set"); 1023 /* Packet has an error, discard it and continue with 1024 * the next */ 1025 smsc911x_rx_fastforward(pdata, pktwords); 1026 dev->stats.rx_dropped++; 1027 continue; 1028 } 1029 1030 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN); 1031 if (unlikely(!skb)) { 1032 SMSC_WARNING(RX_ERR, 1033 "Unable to allocate skb for rx packet"); 1034 /* Drop the packet and stop this polling iteration */ 1035 smsc911x_rx_fastforward(pdata, pktwords); 1036 dev->stats.rx_dropped++; 1037 break; 1038 } 1039 1040 skb->data = skb->head; 1041 skb_reset_tail_pointer(skb); 1042 1043 /* Align IP on 16B boundary */ 1044 skb_reserve(skb, NET_IP_ALIGN); 1045 skb_put(skb, pktlength - 4); 1046 smsc911x_rx_readfifo(pdata, (unsigned int *)skb->head, 1047 pktwords); 1048 skb->protocol = eth_type_trans(skb, dev); 1049 skb->ip_summed = CHECKSUM_NONE; 1050 netif_receive_skb(skb); 1051 1052 /* Update counters */ 1053 dev->stats.rx_packets++; 1054 dev->stats.rx_bytes += (pktlength - 4); 1055 } 1056 1057 /* Return total received packets */ 1058 return npackets; 1059} 1060 1061/* Returns hash bit number for given MAC address 1062 * Example: 1063 * 01 00 5E 00 00 01 -> returns bit number 31 */ 1064static unsigned int smsc911x_hash(char addr[ETH_ALEN]) 1065{ 1066 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 1067} 1068 1069static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata) 1070{ 1071 /* Performs the multicast & mac_cr update. This is called when 1072 * safe on the current hardware, and with the mac_lock held */ 1073 unsigned int mac_cr; 1074 1075 SMSC_ASSERT_MAC_LOCK(pdata); 1076 1077 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1078 mac_cr |= pdata->set_bits_mask; 1079 mac_cr &= ~(pdata->clear_bits_mask); 1080 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1081 smsc911x_mac_write(pdata, HASHH, pdata->hashhi); 1082 smsc911x_mac_write(pdata, HASHL, pdata->hashlo); 1083 SMSC_TRACE(HW, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X", 1084 mac_cr, pdata->hashhi, pdata->hashlo); 1085} 1086 1087static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata) 1088{ 1089 unsigned int mac_cr; 1090 1091 /* This function is only called for older LAN911x devices 1092 * (revA or revB), where MAC_CR, HASHH and HASHL should not 1093 * be modified during Rx - newer devices immediately update the 1094 * registers. 1095 * 1096 * This is called from interrupt context */ 1097 1098 spin_lock(&pdata->mac_lock); 1099 1100 /* Check Rx has stopped */ 1101 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_) 1102 SMSC_WARNING(DRV, "Rx not stopped"); 1103 1104 /* Perform the update - safe to do now Rx has stopped */ 1105 smsc911x_rx_multicast_update(pdata); 1106 1107 /* Re-enable Rx */ 1108 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1109 mac_cr |= MAC_CR_RXEN_; 1110 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1111 1112 pdata->multicast_update_pending = 0; 1113 1114 spin_unlock(&pdata->mac_lock); 1115} 1116 1117static int smsc911x_soft_reset(struct smsc911x_data *pdata) 1118{ 1119 unsigned int timeout; 1120 unsigned int temp; 1121 1122 /* Reset the LAN911x */ 1123 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_); 1124 timeout = 10; 1125 do { 1126 udelay(10); 1127 temp = smsc911x_reg_read(pdata, HW_CFG); 1128 } while ((--timeout) && (temp & HW_CFG_SRST_)); 1129 1130 if (unlikely(temp & HW_CFG_SRST_)) { 1131 SMSC_WARNING(DRV, "Failed to complete reset"); 1132 return -EIO; 1133 } 1134 return 0; 1135} 1136 1137/* Sets the device MAC address to dev_addr, called with mac_lock held */ 1138static void 1139smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6]) 1140{ 1141 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4]; 1142 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) | 1143 (dev_addr[1] << 8) | dev_addr[0]; 1144 1145 SMSC_ASSERT_MAC_LOCK(pdata); 1146 1147 smsc911x_mac_write(pdata, ADDRH, mac_high16); 1148 smsc911x_mac_write(pdata, ADDRL, mac_low32); 1149} 1150 1151static int smsc911x_open(struct net_device *dev) 1152{ 1153 struct smsc911x_data *pdata = netdev_priv(dev); 1154 unsigned int timeout; 1155 unsigned int temp; 1156 unsigned int intcfg; 1157 1158 /* if the phy is not yet registered, retry later*/ 1159 if (!pdata->phy_dev) { 1160 SMSC_WARNING(HW, "phy_dev is NULL"); 1161 return -EAGAIN; 1162 } 1163 1164 if (!is_valid_ether_addr(dev->dev_addr)) { 1165 SMSC_WARNING(HW, "dev_addr is not a valid MAC address"); 1166 return -EADDRNOTAVAIL; 1167 } 1168 1169 /* Reset the LAN911x */ 1170 if (!(pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS)) 1171 { 1172 if (smsc911x_soft_reset(pdata)) { 1173 SMSC_WARNING(HW, "soft reset failed"); 1174 return -EIO; 1175 } 1176 } 1177 1178 smsc911x_reg_write(pdata, HW_CFG, 0x00050000); 1179 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740); 1180 1181 /* Make sure EEPROM has finished loading before setting GPIO_CFG */ 1182 timeout = 50; 1183 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) && 1184 --timeout) { 1185 udelay(10); 1186 } 1187 1188 if (unlikely(timeout == 0)) 1189 SMSC_WARNING(IFUP, 1190 "Timed out waiting for EEPROM busy bit to clear"); 1191 1192 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000); 1193 1194 /* The soft reset above cleared the device's MAC address, 1195 * restore it from local copy (set in probe) */ 1196 spin_lock_irq(&pdata->mac_lock); 1197 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1198 spin_unlock_irq(&pdata->mac_lock); 1199 1200 /* Initialise irqs, but leave all sources disabled */ 1201 smsc911x_reg_write(pdata, INT_EN, 0); 1202 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF); 1203 1204 /* Set interrupt deassertion to 100uS */ 1205 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_); 1206 1207 if (pdata->config.irq_polarity) { 1208 SMSC_TRACE(IFUP, "irq polarity: active high"); 1209 intcfg |= INT_CFG_IRQ_POL_; 1210 } else { 1211 SMSC_TRACE(IFUP, "irq polarity: active low"); 1212 } 1213 1214 if (pdata->config.irq_type) { 1215 SMSC_TRACE(IFUP, "irq type: push-pull"); 1216 intcfg |= INT_CFG_IRQ_TYPE_; 1217 } else { 1218 SMSC_TRACE(IFUP, "irq type: open drain"); 1219 } 1220 1221 smsc911x_reg_write(pdata, INT_CFG, intcfg); 1222 1223 SMSC_TRACE(IFUP, "Testing irq handler using IRQ %d", dev->irq); 1224 pdata->software_irq_signal = 0; 1225 smp_wmb(); 1226 1227 temp = smsc911x_reg_read(pdata, INT_EN); 1228 temp |= INT_EN_SW_INT_EN_; 1229 smsc911x_reg_write(pdata, INT_EN, temp); 1230 1231 timeout = 1000; 1232 while (timeout--) { 1233 if (pdata->software_irq_signal) 1234 break; 1235 msleep(1); 1236 } 1237 1238 if (!pdata->software_irq_signal) { 1239 dev_warn(&dev->dev, "ISR failed signaling test (IRQ %d)\n", 1240 dev->irq); 1241 return -ENODEV; 1242 } 1243 SMSC_TRACE(IFUP, "IRQ handler passed test using IRQ %d", dev->irq); 1244 1245 dev_info(&dev->dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n", 1246 (unsigned long)pdata->ioaddr, dev->irq); 1247 1248 /* Reset the last known duplex and carrier */ 1249 pdata->last_duplex = -1; 1250 pdata->last_carrier = -1; 1251 1252 /* Bring the PHY up */ 1253 phy_start(pdata->phy_dev); 1254 1255 temp = smsc911x_reg_read(pdata, HW_CFG); 1256 /* Preserve TX FIFO size and external PHY configuration */ 1257 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF); 1258 temp |= HW_CFG_SF_; 1259 smsc911x_reg_write(pdata, HW_CFG, temp); 1260 1261 temp = smsc911x_reg_read(pdata, FIFO_INT); 1262 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1263 temp &= ~(FIFO_INT_RX_STS_LEVEL_); 1264 smsc911x_reg_write(pdata, FIFO_INT, temp); 1265 1266 /* set RX Data offset to 2 bytes for alignment */ 1267 smsc911x_reg_write(pdata, RX_CFG, (2 << 8)); 1268 1269 /* enable NAPI polling before enabling RX interrupts */ 1270 napi_enable(&pdata->napi); 1271 1272 temp = smsc911x_reg_read(pdata, INT_EN); 1273 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_); 1274 smsc911x_reg_write(pdata, INT_EN, temp); 1275 1276 spin_lock_irq(&pdata->mac_lock); 1277 temp = smsc911x_mac_read(pdata, MAC_CR); 1278 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); 1279 smsc911x_mac_write(pdata, MAC_CR, temp); 1280 spin_unlock_irq(&pdata->mac_lock); 1281 1282 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 1283 1284 netif_start_queue(dev); 1285 return 0; 1286} 1287 1288/* Entry point for stopping the interface */ 1289static int smsc911x_stop(struct net_device *dev) 1290{ 1291 struct smsc911x_data *pdata = netdev_priv(dev); 1292 unsigned int temp; 1293 1294 /* Disable all device interrupts */ 1295 temp = smsc911x_reg_read(pdata, INT_CFG); 1296 temp &= ~INT_CFG_IRQ_EN_; 1297 smsc911x_reg_write(pdata, INT_CFG, temp); 1298 1299 /* Stop Tx and Rx polling */ 1300 netif_stop_queue(dev); 1301 napi_disable(&pdata->napi); 1302 1303 /* At this point all Rx and Tx activity is stopped */ 1304 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1305 smsc911x_tx_update_txcounters(dev); 1306 1307 /* Bring the PHY down */ 1308 if (pdata->phy_dev) 1309 phy_stop(pdata->phy_dev); 1310 1311 SMSC_TRACE(IFDOWN, "Interface stopped"); 1312 return 0; 1313} 1314 1315/* Entry point for transmitting a packet */ 1316static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 1317{ 1318 struct smsc911x_data *pdata = netdev_priv(dev); 1319 unsigned int freespace; 1320 unsigned int tx_cmd_a; 1321 unsigned int tx_cmd_b; 1322 unsigned int temp; 1323 u32 wrsz; 1324 ulong bufp; 1325 1326 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_; 1327 1328 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD)) 1329 SMSC_WARNING(TX_ERR, 1330 "Tx data fifo low, space available: %d", freespace); 1331 1332 /* Word alignment adjustment */ 1333 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16; 1334 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 1335 tx_cmd_a |= (unsigned int)skb->len; 1336 1337 tx_cmd_b = ((unsigned int)skb->len) << 16; 1338 tx_cmd_b |= (unsigned int)skb->len; 1339 1340 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a); 1341 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b); 1342 1343 bufp = (ulong)skb->data & (~0x3); 1344 wrsz = (u32)skb->len + 3; 1345 wrsz += (u32)((ulong)skb->data & 0x3); 1346 wrsz >>= 2; 1347 1348 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 1349 freespace -= (skb->len + 32); 1350 dev_kfree_skb(skb); 1351 1352 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30)) 1353 smsc911x_tx_update_txcounters(dev); 1354 1355 if (freespace < TX_FIFO_LOW_THRESHOLD) { 1356 netif_stop_queue(dev); 1357 temp = smsc911x_reg_read(pdata, FIFO_INT); 1358 temp &= 0x00FFFFFF; 1359 temp |= 0x32000000; 1360 smsc911x_reg_write(pdata, FIFO_INT, temp); 1361 } 1362 1363 return NETDEV_TX_OK; 1364} 1365 1366/* Entry point for getting status counters */ 1367static struct net_device_stats *smsc911x_get_stats(struct net_device *dev) 1368{ 1369 struct smsc911x_data *pdata = netdev_priv(dev); 1370 smsc911x_tx_update_txcounters(dev); 1371 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1372 return &dev->stats; 1373} 1374 1375/* Entry point for setting addressing modes */ 1376static void smsc911x_set_multicast_list(struct net_device *dev) 1377{ 1378 struct smsc911x_data *pdata = netdev_priv(dev); 1379 unsigned long flags; 1380 1381 if (dev->flags & IFF_PROMISC) { 1382 /* Enabling promiscuous mode */ 1383 pdata->set_bits_mask = MAC_CR_PRMS_; 1384 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1385 pdata->hashhi = 0; 1386 pdata->hashlo = 0; 1387 } else if (dev->flags & IFF_ALLMULTI) { 1388 /* Enabling all multicast mode */ 1389 pdata->set_bits_mask = MAC_CR_MCPAS_; 1390 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_); 1391 pdata->hashhi = 0; 1392 pdata->hashlo = 0; 1393 } else if (!netdev_mc_empty(dev)) { 1394 /* Enabling specific multicast addresses */ 1395 unsigned int hash_high = 0; 1396 unsigned int hash_low = 0; 1397 struct netdev_hw_addr *ha; 1398 1399 pdata->set_bits_mask = MAC_CR_HPFILT_; 1400 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1401 1402 netdev_for_each_mc_addr(ha, dev) { 1403 unsigned int bitnum = smsc911x_hash(ha->addr); 1404 unsigned int mask = 0x01 << (bitnum & 0x1F); 1405 1406 if (bitnum & 0x20) 1407 hash_high |= mask; 1408 else 1409 hash_low |= mask; 1410 } 1411 1412 pdata->hashhi = hash_high; 1413 pdata->hashlo = hash_low; 1414 } else { 1415 /* Enabling local MAC address only */ 1416 pdata->set_bits_mask = 0; 1417 pdata->clear_bits_mask = 1418 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1419 pdata->hashhi = 0; 1420 pdata->hashlo = 0; 1421 } 1422 1423 spin_lock_irqsave(&pdata->mac_lock, flags); 1424 1425 if (pdata->generation <= 1) { 1426 /* Older hardware revision - cannot change these flags while 1427 * receiving data */ 1428 if (!pdata->multicast_update_pending) { 1429 unsigned int temp; 1430 SMSC_TRACE(HW, "scheduling mcast update"); 1431 pdata->multicast_update_pending = 1; 1432 1433 /* Request the hardware to stop, then perform the 1434 * update when we get an RX_STOP interrupt */ 1435 temp = smsc911x_mac_read(pdata, MAC_CR); 1436 temp &= ~(MAC_CR_RXEN_); 1437 smsc911x_mac_write(pdata, MAC_CR, temp); 1438 } else { 1439 /* There is another update pending, this should now 1440 * use the newer values */ 1441 } 1442 } else { 1443 /* Newer hardware revision - can write immediately */ 1444 smsc911x_rx_multicast_update(pdata); 1445 } 1446 1447 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1448} 1449 1450static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id) 1451{ 1452 struct net_device *dev = dev_id; 1453 struct smsc911x_data *pdata = netdev_priv(dev); 1454 u32 intsts = smsc911x_reg_read(pdata, INT_STS); 1455 u32 inten = smsc911x_reg_read(pdata, INT_EN); 1456 int serviced = IRQ_NONE; 1457 u32 temp; 1458 1459 if (unlikely(intsts & inten & INT_STS_SW_INT_)) { 1460 temp = smsc911x_reg_read(pdata, INT_EN); 1461 temp &= (~INT_EN_SW_INT_EN_); 1462 smsc911x_reg_write(pdata, INT_EN, temp); 1463 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_); 1464 pdata->software_irq_signal = 1; 1465 smp_wmb(); 1466 serviced = IRQ_HANDLED; 1467 } 1468 1469 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) { 1470 /* Called when there is a multicast update scheduled and 1471 * it is now safe to complete the update */ 1472 SMSC_TRACE(INTR, "RX Stop interrupt"); 1473 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_); 1474 if (pdata->multicast_update_pending) 1475 smsc911x_rx_multicast_update_workaround(pdata); 1476 serviced = IRQ_HANDLED; 1477 } 1478 1479 if (intsts & inten & INT_STS_TDFA_) { 1480 temp = smsc911x_reg_read(pdata, FIFO_INT); 1481 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1482 smsc911x_reg_write(pdata, FIFO_INT, temp); 1483 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_); 1484 netif_wake_queue(dev); 1485 serviced = IRQ_HANDLED; 1486 } 1487 1488 if (unlikely(intsts & inten & INT_STS_RXE_)) { 1489 SMSC_TRACE(INTR, "RX Error interrupt"); 1490 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_); 1491 serviced = IRQ_HANDLED; 1492 } 1493 1494 if (likely(intsts & inten & INT_STS_RSFL_)) { 1495 if (likely(napi_schedule_prep(&pdata->napi))) { 1496 /* Disable Rx interrupts */ 1497 temp = smsc911x_reg_read(pdata, INT_EN); 1498 temp &= (~INT_EN_RSFL_EN_); 1499 smsc911x_reg_write(pdata, INT_EN, temp); 1500 /* Schedule a NAPI poll */ 1501 __napi_schedule(&pdata->napi); 1502 } else { 1503 SMSC_WARNING(RX_ERR, 1504 "napi_schedule_prep failed"); 1505 } 1506 serviced = IRQ_HANDLED; 1507 } 1508 1509 return serviced; 1510} 1511 1512#ifdef CONFIG_NET_POLL_CONTROLLER 1513static void smsc911x_poll_controller(struct net_device *dev) 1514{ 1515 disable_irq(dev->irq); 1516 smsc911x_irqhandler(0, dev); 1517 enable_irq(dev->irq); 1518} 1519#endif /* CONFIG_NET_POLL_CONTROLLER */ 1520 1521static int smsc911x_set_mac_address(struct net_device *dev, void *p) 1522{ 1523 struct smsc911x_data *pdata = netdev_priv(dev); 1524 struct sockaddr *addr = p; 1525 1526 /* On older hardware revisions we cannot change the mac address 1527 * registers while receiving data. Newer devices can safely change 1528 * this at any time. */ 1529 if (pdata->generation <= 1 && netif_running(dev)) 1530 return -EBUSY; 1531 1532 if (!is_valid_ether_addr(addr->sa_data)) 1533 return -EADDRNOTAVAIL; 1534 1535 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); 1536 1537 spin_lock_irq(&pdata->mac_lock); 1538 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1539 spin_unlock_irq(&pdata->mac_lock); 1540 1541 dev_info(&dev->dev, "MAC Address: %pM\n", dev->dev_addr); 1542 1543 return 0; 1544} 1545 1546/* Standard ioctls for mii-tool */ 1547static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 1548{ 1549 struct smsc911x_data *pdata = netdev_priv(dev); 1550 1551 if (!netif_running(dev) || !pdata->phy_dev) 1552 return -EINVAL; 1553 1554 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd); 1555} 1556 1557static int 1558smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1559{ 1560 struct smsc911x_data *pdata = netdev_priv(dev); 1561 1562 cmd->maxtxpkt = 1; 1563 cmd->maxrxpkt = 1; 1564 return phy_ethtool_gset(pdata->phy_dev, cmd); 1565} 1566 1567static int 1568smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1569{ 1570 struct smsc911x_data *pdata = netdev_priv(dev); 1571 1572 return phy_ethtool_sset(pdata->phy_dev, cmd); 1573} 1574 1575static void smsc911x_ethtool_getdrvinfo(struct net_device *dev, 1576 struct ethtool_drvinfo *info) 1577{ 1578 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver)); 1579 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version)); 1580 strlcpy(info->bus_info, dev_name(dev->dev.parent), 1581 sizeof(info->bus_info)); 1582} 1583 1584static int smsc911x_ethtool_nwayreset(struct net_device *dev) 1585{ 1586 struct smsc911x_data *pdata = netdev_priv(dev); 1587 1588 return phy_start_aneg(pdata->phy_dev); 1589} 1590 1591static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev) 1592{ 1593 struct smsc911x_data *pdata = netdev_priv(dev); 1594 return pdata->msg_enable; 1595} 1596 1597static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) 1598{ 1599 struct smsc911x_data *pdata = netdev_priv(dev); 1600 pdata->msg_enable = level; 1601} 1602 1603static int smsc911x_ethtool_getregslen(struct net_device *dev) 1604{ 1605 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) * 1606 sizeof(u32); 1607} 1608 1609static void 1610smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs, 1611 void *buf) 1612{ 1613 struct smsc911x_data *pdata = netdev_priv(dev); 1614 struct phy_device *phy_dev = pdata->phy_dev; 1615 unsigned long flags; 1616 unsigned int i; 1617 unsigned int j = 0; 1618 u32 *data = buf; 1619 1620 regs->version = pdata->idrev; 1621 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32))) 1622 data[j++] = smsc911x_reg_read(pdata, i); 1623 1624 for (i = MAC_CR; i <= WUCSR; i++) { 1625 spin_lock_irqsave(&pdata->mac_lock, flags); 1626 data[j++] = smsc911x_mac_read(pdata, i); 1627 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1628 } 1629 1630 for (i = 0; i <= 31; i++) 1631 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i); 1632} 1633 1634static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata) 1635{ 1636 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG); 1637 temp &= ~GPIO_CFG_EEPR_EN_; 1638 smsc911x_reg_write(pdata, GPIO_CFG, temp); 1639 msleep(1); 1640} 1641 1642static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op) 1643{ 1644 int timeout = 100; 1645 u32 e2cmd; 1646 1647 SMSC_TRACE(DRV, "op 0x%08x", op); 1648 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) { 1649 SMSC_WARNING(DRV, "Busy at start"); 1650 return -EBUSY; 1651 } 1652 1653 e2cmd = op | E2P_CMD_EPC_BUSY_; 1654 smsc911x_reg_write(pdata, E2P_CMD, e2cmd); 1655 1656 do { 1657 msleep(1); 1658 e2cmd = smsc911x_reg_read(pdata, E2P_CMD); 1659 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout)); 1660 1661 if (!timeout) { 1662 SMSC_TRACE(DRV, "TIMED OUT"); 1663 return -EAGAIN; 1664 } 1665 1666 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) { 1667 SMSC_TRACE(DRV, "Error occured during eeprom operation"); 1668 return -EINVAL; 1669 } 1670 1671 return 0; 1672} 1673 1674static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata, 1675 u8 address, u8 *data) 1676{ 1677 u32 op = E2P_CMD_EPC_CMD_READ_ | address; 1678 int ret; 1679 1680 SMSC_TRACE(DRV, "address 0x%x", address); 1681 ret = smsc911x_eeprom_send_cmd(pdata, op); 1682 1683 if (!ret) 1684 data[address] = smsc911x_reg_read(pdata, E2P_DATA); 1685 1686 return ret; 1687} 1688 1689static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata, 1690 u8 address, u8 data) 1691{ 1692 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address; 1693 u32 temp; 1694 int ret; 1695 1696 SMSC_TRACE(DRV, "address 0x%x, data 0x%x", address, data); 1697 ret = smsc911x_eeprom_send_cmd(pdata, op); 1698 1699 if (!ret) { 1700 op = E2P_CMD_EPC_CMD_WRITE_ | address; 1701 smsc911x_reg_write(pdata, E2P_DATA, (u32)data); 1702 1703 temp = smsc911x_reg_read(pdata, BYTE_TEST); 1704 1705 ret = smsc911x_eeprom_send_cmd(pdata, op); 1706 } 1707 1708 return ret; 1709} 1710 1711static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev) 1712{ 1713 return SMSC911X_EEPROM_SIZE; 1714} 1715 1716static int smsc911x_ethtool_get_eeprom(struct net_device *dev, 1717 struct ethtool_eeprom *eeprom, u8 *data) 1718{ 1719 struct smsc911x_data *pdata = netdev_priv(dev); 1720 u8 eeprom_data[SMSC911X_EEPROM_SIZE]; 1721 int len; 1722 int i; 1723 1724 smsc911x_eeprom_enable_access(pdata); 1725 1726 len = min(eeprom->len, SMSC911X_EEPROM_SIZE); 1727 for (i = 0; i < len; i++) { 1728 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data); 1729 if (ret < 0) { 1730 eeprom->len = 0; 1731 return ret; 1732 } 1733 } 1734 1735 memcpy(data, &eeprom_data[eeprom->offset], len); 1736 eeprom->len = len; 1737 return 0; 1738} 1739 1740static int smsc911x_ethtool_set_eeprom(struct net_device *dev, 1741 struct ethtool_eeprom *eeprom, u8 *data) 1742{ 1743 int ret; 1744 struct smsc911x_data *pdata = netdev_priv(dev); 1745 1746 smsc911x_eeprom_enable_access(pdata); 1747 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_); 1748 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data); 1749 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_); 1750 1751 /* Single byte write, according to man page */ 1752 eeprom->len = 1; 1753 1754 return ret; 1755} 1756 1757static const struct ethtool_ops smsc911x_ethtool_ops = { 1758 .get_settings = smsc911x_ethtool_getsettings, 1759 .set_settings = smsc911x_ethtool_setsettings, 1760 .get_link = ethtool_op_get_link, 1761 .get_drvinfo = smsc911x_ethtool_getdrvinfo, 1762 .nway_reset = smsc911x_ethtool_nwayreset, 1763 .get_msglevel = smsc911x_ethtool_getmsglevel, 1764 .set_msglevel = smsc911x_ethtool_setmsglevel, 1765 .get_regs_len = smsc911x_ethtool_getregslen, 1766 .get_regs = smsc911x_ethtool_getregs, 1767 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len, 1768 .get_eeprom = smsc911x_ethtool_get_eeprom, 1769 .set_eeprom = smsc911x_ethtool_set_eeprom, 1770}; 1771 1772static const struct net_device_ops smsc911x_netdev_ops = { 1773 .ndo_open = smsc911x_open, 1774 .ndo_stop = smsc911x_stop, 1775 .ndo_start_xmit = smsc911x_hard_start_xmit, 1776 .ndo_get_stats = smsc911x_get_stats, 1777 .ndo_set_multicast_list = smsc911x_set_multicast_list, 1778 .ndo_do_ioctl = smsc911x_do_ioctl, 1779 .ndo_change_mtu = eth_change_mtu, 1780 .ndo_validate_addr = eth_validate_addr, 1781 .ndo_set_mac_address = smsc911x_set_mac_address, 1782#ifdef CONFIG_NET_POLL_CONTROLLER 1783 .ndo_poll_controller = smsc911x_poll_controller, 1784#endif 1785}; 1786 1787/* copies the current mac address from hardware to dev->dev_addr */ 1788static void __devinit smsc911x_read_mac_address(struct net_device *dev) 1789{ 1790 struct smsc911x_data *pdata = netdev_priv(dev); 1791 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH); 1792 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL); 1793 1794 dev->dev_addr[0] = (u8)(mac_low32); 1795 dev->dev_addr[1] = (u8)(mac_low32 >> 8); 1796 dev->dev_addr[2] = (u8)(mac_low32 >> 16); 1797 dev->dev_addr[3] = (u8)(mac_low32 >> 24); 1798 dev->dev_addr[4] = (u8)(mac_high16); 1799 dev->dev_addr[5] = (u8)(mac_high16 >> 8); 1800} 1801 1802/* Initializing private device structures, only called from probe */ 1803static int __devinit smsc911x_init(struct net_device *dev) 1804{ 1805 struct smsc911x_data *pdata = netdev_priv(dev); 1806 unsigned int byte_test; 1807 1808 SMSC_TRACE(PROBE, "Driver Parameters:"); 1809 SMSC_TRACE(PROBE, "LAN base: 0x%08lX", 1810 (unsigned long)pdata->ioaddr); 1811 SMSC_TRACE(PROBE, "IRQ: %d", dev->irq); 1812 SMSC_TRACE(PROBE, "PHY will be autodetected."); 1813 1814 spin_lock_init(&pdata->dev_lock); 1815 1816 if (pdata->ioaddr == 0) { 1817 SMSC_WARNING(PROBE, "pdata->ioaddr: 0x00000000"); 1818 return -ENODEV; 1819 } 1820 1821 /* Check byte ordering */ 1822 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 1823 SMSC_TRACE(PROBE, "BYTE_TEST: 0x%08X", byte_test); 1824 if (byte_test == 0x43218765) { 1825 SMSC_TRACE(PROBE, "BYTE_TEST looks swapped, " 1826 "applying WORD_SWAP"); 1827 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff); 1828 1829 /* 1 dummy read of BYTE_TEST is needed after a write to 1830 * WORD_SWAP before its contents are valid */ 1831 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 1832 1833 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 1834 } 1835 1836 if (byte_test != 0x87654321) { 1837 SMSC_WARNING(DRV, "BYTE_TEST: 0x%08X", byte_test); 1838 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) { 1839 SMSC_WARNING(PROBE, 1840 "top 16 bits equal to bottom 16 bits"); 1841 SMSC_TRACE(PROBE, "This may mean the chip is set " 1842 "for 32 bit while the bus is reading 16 bit"); 1843 } 1844 return -ENODEV; 1845 } 1846 1847 /* Default generation to zero (all workarounds apply) */ 1848 pdata->generation = 0; 1849 1850 pdata->idrev = smsc911x_reg_read(pdata, ID_REV); 1851 switch (pdata->idrev & 0xFFFF0000) { 1852 case 0x01180000: 1853 case 0x01170000: 1854 case 0x01160000: 1855 case 0x01150000: 1856 /* LAN911[5678] family */ 1857 pdata->generation = pdata->idrev & 0x0000FFFF; 1858 break; 1859 1860 case 0x118A0000: 1861 case 0x117A0000: 1862 case 0x116A0000: 1863 case 0x115A0000: 1864 /* LAN921[5678] family */ 1865 pdata->generation = 3; 1866 break; 1867 1868 case 0x92100000: 1869 case 0x92110000: 1870 case 0x92200000: 1871 case 0x92210000: 1872 /* LAN9210/LAN9211/LAN9220/LAN9221 */ 1873 pdata->generation = 4; 1874 break; 1875 1876 default: 1877 SMSC_WARNING(PROBE, "LAN911x not identified, idrev: 0x%08X", 1878 pdata->idrev); 1879 return -ENODEV; 1880 } 1881 1882 SMSC_TRACE(PROBE, "LAN911x identified, idrev: 0x%08X, generation: %d", 1883 pdata->idrev, pdata->generation); 1884 1885 if (pdata->generation == 0) 1886 SMSC_WARNING(PROBE, 1887 "This driver is not intended for this chip revision"); 1888 1889 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) 1890 smsc911x_read_mac_address(dev); 1891 1892 /* Reset the LAN911x */ 1893 if (smsc911x_soft_reset(pdata)) 1894 return -ENODEV; 1895 1896 /* Disable all interrupt sources until we bring the device up */ 1897 smsc911x_reg_write(pdata, INT_EN, 0); 1898 1899 ether_setup(dev); 1900 dev->flags |= IFF_MULTICAST; 1901 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT); 1902 dev->netdev_ops = &smsc911x_netdev_ops; 1903 dev->ethtool_ops = &smsc911x_ethtool_ops; 1904 1905 return 0; 1906} 1907 1908static int __devexit smsc911x_drv_remove(struct platform_device *pdev) 1909{ 1910 struct net_device *dev; 1911 struct smsc911x_data *pdata; 1912 struct resource *res; 1913 1914 dev = platform_get_drvdata(pdev); 1915 BUG_ON(!dev); 1916 pdata = netdev_priv(dev); 1917 BUG_ON(!pdata); 1918 BUG_ON(!pdata->ioaddr); 1919 BUG_ON(!pdata->phy_dev); 1920 1921 SMSC_TRACE(IFDOWN, "Stopping driver."); 1922 1923 phy_disconnect(pdata->phy_dev); 1924 pdata->phy_dev = NULL; 1925 mdiobus_unregister(pdata->mii_bus); 1926 mdiobus_free(pdata->mii_bus); 1927 1928 platform_set_drvdata(pdev, NULL); 1929 unregister_netdev(dev); 1930 free_irq(dev->irq, dev); 1931 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 1932 "smsc911x-memory"); 1933 if (!res) 1934 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1935 1936 release_mem_region(res->start, resource_size(res)); 1937 1938 iounmap(pdata->ioaddr); 1939 1940 free_netdev(dev); 1941 1942 return 0; 1943} 1944 1945static int __devinit smsc911x_drv_probe(struct platform_device *pdev) 1946{ 1947 struct net_device *dev; 1948 struct smsc911x_data *pdata; 1949 struct smsc911x_platform_config *config = pdev->dev.platform_data; 1950 struct resource *res, *irq_res; 1951 unsigned int intcfg = 0; 1952 int res_size, irq_flags; 1953 int retval; 1954 1955 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME, SMSC_DRV_VERSION); 1956 1957 /* platform data specifies irq & dynamic bus configuration */ 1958 if (!pdev->dev.platform_data) { 1959 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME); 1960 retval = -ENODEV; 1961 goto out_0; 1962 } 1963 1964 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 1965 "smsc911x-memory"); 1966 if (!res) 1967 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1968 if (!res) { 1969 pr_warning("%s: Could not allocate resource.\n", 1970 SMSC_CHIPNAME); 1971 retval = -ENODEV; 1972 goto out_0; 1973 } 1974 res_size = resource_size(res); 1975 1976 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1977 if (!irq_res) { 1978 pr_warning("%s: Could not allocate irq resource.\n", 1979 SMSC_CHIPNAME); 1980 retval = -ENODEV; 1981 goto out_0; 1982 } 1983 1984 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) { 1985 retval = -EBUSY; 1986 goto out_0; 1987 } 1988 1989 dev = alloc_etherdev(sizeof(struct smsc911x_data)); 1990 if (!dev) { 1991 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME); 1992 retval = -ENOMEM; 1993 goto out_release_io_1; 1994 } 1995 1996 SET_NETDEV_DEV(dev, &pdev->dev); 1997 1998 pdata = netdev_priv(dev); 1999 2000 dev->irq = irq_res->start; 2001 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK; 2002 pdata->ioaddr = ioremap_nocache(res->start, res_size); 2003 2004 /* copy config parameters across to pdata */ 2005 memcpy(&pdata->config, config, sizeof(pdata->config)); 2006 2007 pdata->dev = dev; 2008 pdata->msg_enable = ((1 << debug) - 1); 2009 2010 if (pdata->ioaddr == NULL) { 2011 SMSC_WARNING(PROBE, 2012 "Error smsc911x base address invalid"); 2013 retval = -ENOMEM; 2014 goto out_free_netdev_2; 2015 } 2016 2017 retval = smsc911x_init(dev); 2018 if (retval < 0) 2019 goto out_unmap_io_3; 2020 2021 /* configure irq polarity and type before connecting isr */ 2022 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) 2023 intcfg |= INT_CFG_IRQ_POL_; 2024 2025 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL) 2026 intcfg |= INT_CFG_IRQ_TYPE_; 2027 2028 smsc911x_reg_write(pdata, INT_CFG, intcfg); 2029 2030 /* Ensure interrupts are globally disabled before connecting ISR */ 2031 smsc911x_reg_write(pdata, INT_EN, 0); 2032 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF); 2033 2034 retval = request_irq(dev->irq, smsc911x_irqhandler, 2035 irq_flags | IRQF_SHARED, dev->name, dev); 2036 if (retval) { 2037 SMSC_WARNING(PROBE, 2038 "Unable to claim requested irq: %d", dev->irq); 2039 goto out_unmap_io_3; 2040 } 2041 2042 platform_set_drvdata(pdev, dev); 2043 2044 retval = register_netdev(dev); 2045 if (retval) { 2046 SMSC_WARNING(PROBE, 2047 "Error %i registering device", retval); 2048 goto out_unset_drvdata_4; 2049 } else { 2050 SMSC_TRACE(PROBE, "Network interface: \"%s\"", dev->name); 2051 } 2052 2053 spin_lock_init(&pdata->mac_lock); 2054 2055 retval = smsc911x_mii_init(pdev, dev); 2056 if (retval) { 2057 SMSC_WARNING(PROBE, 2058 "Error %i initialising mii", retval); 2059 goto out_unregister_netdev_5; 2060 } 2061 2062 spin_lock_irq(&pdata->mac_lock); 2063 2064 /* Check if mac address has been specified when bringing interface up */ 2065 if (is_valid_ether_addr(dev->dev_addr)) { 2066 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2067 SMSC_TRACE(PROBE, "MAC Address is specified by configuration"); 2068 } else if (is_valid_ether_addr(pdata->config.mac)) { 2069 memcpy(dev->dev_addr, pdata->config.mac, 6); 2070 SMSC_TRACE(PROBE, "MAC Address specified by platform data"); 2071 } else { 2072 /* Try reading mac address from device. if EEPROM is present 2073 * it will already have been set */ 2074 smsc911x_read_mac_address(dev); 2075 2076 if (is_valid_ether_addr(dev->dev_addr)) { 2077 /* eeprom values are valid so use them */ 2078 SMSC_TRACE(PROBE, 2079 "Mac Address is read from LAN911x EEPROM"); 2080 } else { 2081 /* eeprom values are invalid, generate random MAC */ 2082 random_ether_addr(dev->dev_addr); 2083 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2084 SMSC_TRACE(PROBE, 2085 "MAC Address is set to random_ether_addr"); 2086 } 2087 } 2088 2089 spin_unlock_irq(&pdata->mac_lock); 2090 2091 dev_info(&dev->dev, "MAC Address: %pM\n", dev->dev_addr); 2092 2093 return 0; 2094 2095out_unregister_netdev_5: 2096 unregister_netdev(dev); 2097out_unset_drvdata_4: 2098 platform_set_drvdata(pdev, NULL); 2099 free_irq(dev->irq, dev); 2100out_unmap_io_3: 2101 iounmap(pdata->ioaddr); 2102out_free_netdev_2: 2103 free_netdev(dev); 2104out_release_io_1: 2105 release_mem_region(res->start, resource_size(res)); 2106out_0: 2107 return retval; 2108} 2109 2110#ifdef CONFIG_PM 2111/* This implementation assumes the devices remains powered on its VDDVARIO 2112 * pins during suspend. */ 2113 2114/* TODO: implement freeze/thaw callbacks for hibernation.*/ 2115 2116static int smsc911x_suspend(struct device *dev) 2117{ 2118 struct net_device *ndev = dev_get_drvdata(dev); 2119 struct smsc911x_data *pdata = netdev_priv(ndev); 2120 2121 /* enable wake on LAN, energy detection and the external PME 2122 * signal. */ 2123 smsc911x_reg_write(pdata, PMT_CTRL, 2124 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ | 2125 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_); 2126 2127 return 0; 2128} 2129 2130static int smsc911x_resume(struct device *dev) 2131{ 2132 struct net_device *ndev = dev_get_drvdata(dev); 2133 struct smsc911x_data *pdata = netdev_priv(ndev); 2134 unsigned int to = 100; 2135 2136 /* Note 3.11 from the datasheet: 2137 * "When the LAN9220 is in a power saving state, a write of any 2138 * data to the BYTE_TEST register will wake-up the device." 2139 */ 2140 smsc911x_reg_write(pdata, BYTE_TEST, 0); 2141 2142 /* poll the READY bit in PMT_CTRL. Any other access to the device is 2143 * forbidden while this bit isn't set. Try for 100ms and return -EIO 2144 * if it failed. */ 2145 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to) 2146 udelay(1000); 2147 2148 return (to == 0) ? -EIO : 0; 2149} 2150 2151static const struct dev_pm_ops smsc911x_pm_ops = { 2152 .suspend = smsc911x_suspend, 2153 .resume = smsc911x_resume, 2154}; 2155 2156#define SMSC911X_PM_OPS (&smsc911x_pm_ops) 2157 2158#else 2159#define SMSC911X_PM_OPS NULL 2160#endif 2161 2162static struct platform_driver smsc911x_driver = { 2163 .probe = smsc911x_drv_probe, 2164 .remove = __devexit_p(smsc911x_drv_remove), 2165 .driver = { 2166 .name = SMSC_CHIPNAME, 2167 .owner = THIS_MODULE, 2168 .pm = SMSC911X_PM_OPS, 2169 }, 2170}; 2171 2172/* Entry point for loading the module */ 2173static int __init smsc911x_init_module(void) 2174{ 2175 return platform_driver_register(&smsc911x_driver); 2176} 2177 2178/* entry point for unloading the module */ 2179static void __exit smsc911x_cleanup_module(void) 2180{ 2181 platform_driver_unregister(&smsc911x_driver); 2182} 2183 2184module_init(smsc911x_init_module); 2185module_exit(smsc911x_cleanup_module); 2186