1/* 2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework 3 * 4 * Largely derived from at91_dataflash.c: 5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11*/ 12#include <linux/module.h> 13#include <linux/init.h> 14#include <linux/slab.h> 15#include <linux/delay.h> 16#include <linux/device.h> 17#include <linux/mutex.h> 18#include <linux/err.h> 19#include <linux/math64.h> 20 21#include <linux/spi/spi.h> 22#include <linux/spi/flash.h> 23 24#include <linux/mtd/mtd.h> 25#include <linux/mtd/partitions.h> 26 27 28/* 29 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in 30 * each chip, which may be used for double buffered I/O; but this driver 31 * doesn't (yet) use these for any kind of i/o overlap or prefetching. 32 * 33 * Sometimes DataFlash is packaged in MMC-format cards, although the 34 * MMC stack can't (yet?) distinguish between MMC and DataFlash 35 * protocols during enumeration. 36 */ 37 38/* reads can bypass the buffers */ 39#define OP_READ_CONTINUOUS 0xE8 40#define OP_READ_PAGE 0xD2 41 42/* group B requests can run even while status reports "busy" */ 43#define OP_READ_STATUS 0xD7 /* group B */ 44 45/* move data between host and buffer */ 46#define OP_READ_BUFFER1 0xD4 /* group B */ 47#define OP_READ_BUFFER2 0xD6 /* group B */ 48#define OP_WRITE_BUFFER1 0x84 /* group B */ 49#define OP_WRITE_BUFFER2 0x87 /* group B */ 50 51/* erasing flash */ 52#define OP_ERASE_PAGE 0x81 53#define OP_ERASE_BLOCK 0x50 54 55/* move data between buffer and flash */ 56#define OP_TRANSFER_BUF1 0x53 57#define OP_TRANSFER_BUF2 0x55 58#define OP_MREAD_BUFFER1 0xD4 59#define OP_MREAD_BUFFER2 0xD6 60#define OP_MWERASE_BUFFER1 0x83 61#define OP_MWERASE_BUFFER2 0x86 62#define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ 63#define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ 64 65/* write to buffer, then write-erase to flash */ 66#define OP_PROGRAM_VIA_BUF1 0x82 67#define OP_PROGRAM_VIA_BUF2 0x85 68 69/* compare buffer to flash */ 70#define OP_COMPARE_BUF1 0x60 71#define OP_COMPARE_BUF2 0x61 72 73/* read flash to buffer, then write-erase to flash */ 74#define OP_REWRITE_VIA_BUF1 0x58 75#define OP_REWRITE_VIA_BUF2 0x59 76 77/* newer chips report JEDEC manufacturer and device IDs; chip 78 * serial number and OTP bits; and per-sector writeprotect. 79 */ 80#define OP_READ_ID 0x9F 81#define OP_READ_SECURITY 0x77 82#define OP_WRITE_SECURITY_REVC 0x9A 83#define OP_WRITE_SECURITY 0x9B /* revision D */ 84 85 86struct dataflash { 87 uint8_t command[4]; 88 char name[24]; 89 90 unsigned partitioned:1; 91 92 unsigned short page_offset; /* offset in flash address */ 93 unsigned int page_size; /* of bytes per page */ 94 95 struct mutex lock; 96 struct spi_device *spi; 97 98 struct mtd_info mtd; 99}; 100 101/* ......................................................................... */ 102 103/* 104 * Return the status of the DataFlash device. 105 */ 106static inline int dataflash_status(struct spi_device *spi) 107{ 108 /* NOTE: at45db321c over 25 MHz wants to write 109 * a dummy byte after the opcode... 110 */ 111 return spi_w8r8(spi, OP_READ_STATUS); 112} 113 114/* 115 * Poll the DataFlash device until it is READY. 116 * This usually takes 5-20 msec or so; more for sector erase. 117 */ 118static int dataflash_waitready(struct spi_device *spi) 119{ 120 int status; 121 122 for (;;) { 123 status = dataflash_status(spi); 124 if (status < 0) { 125 DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n", 126 dev_name(&spi->dev), status); 127 status = 0; 128 } 129 130 if (status & (1 << 7)) /* RDY/nBSY */ 131 return status; 132 133 msleep(3); 134 } 135} 136 137/* ......................................................................... */ 138 139/* 140 * Erase pages of flash. 141 */ 142static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) 143{ 144 struct dataflash *priv = mtd->priv; 145 struct spi_device *spi = priv->spi; 146 struct spi_transfer x = { .tx_dma = 0, }; 147 struct spi_message msg; 148 unsigned blocksize = priv->page_size << 3; 149 uint8_t *command; 150 uint32_t rem; 151 152 DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%llx len 0x%llx\n", 153 dev_name(&spi->dev), (long long)instr->addr, 154 (long long)instr->len); 155 156 /* Sanity checks */ 157 if (instr->addr + instr->len > mtd->size) 158 return -EINVAL; 159 div_u64_rem(instr->len, priv->page_size, &rem); 160 if (rem) 161 return -EINVAL; 162 div_u64_rem(instr->addr, priv->page_size, &rem); 163 if (rem) 164 return -EINVAL; 165 166 spi_message_init(&msg); 167 168 x.tx_buf = command = priv->command; 169 x.len = 4; 170 spi_message_add_tail(&x, &msg); 171 172 mutex_lock(&priv->lock); 173 while (instr->len > 0) { 174 unsigned int pageaddr; 175 int status; 176 int do_block; 177 178 /* Calculate flash page address; use block erase (for speed) if 179 * we're at a block boundary and need to erase the whole block. 180 */ 181 pageaddr = div_u64(instr->addr, priv->page_size); 182 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize; 183 pageaddr = pageaddr << priv->page_offset; 184 185 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; 186 command[1] = (uint8_t)(pageaddr >> 16); 187 command[2] = (uint8_t)(pageaddr >> 8); 188 command[3] = 0; 189 190 DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n", 191 do_block ? "block" : "page", 192 command[0], command[1], command[2], command[3], 193 pageaddr); 194 195 status = spi_sync(spi, &msg); 196 (void) dataflash_waitready(spi); 197 198 if (status < 0) { 199 printk(KERN_ERR "%s: erase %x, err %d\n", 200 dev_name(&spi->dev), pageaddr, status); 201 /* REVISIT: can retry instr->retries times; or 202 * giveup and instr->fail_addr = instr->addr; 203 */ 204 continue; 205 } 206 207 if (do_block) { 208 instr->addr += blocksize; 209 instr->len -= blocksize; 210 } else { 211 instr->addr += priv->page_size; 212 instr->len -= priv->page_size; 213 } 214 } 215 mutex_unlock(&priv->lock); 216 217 /* Inform MTD subsystem that erase is complete */ 218 instr->state = MTD_ERASE_DONE; 219 mtd_erase_callback(instr); 220 221 return 0; 222} 223 224/* 225 * Read from the DataFlash device. 226 * from : Start offset in flash device 227 * len : Amount to read 228 * retlen : About of data actually read 229 * buf : Buffer containing the data 230 */ 231static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, 232 size_t *retlen, u_char *buf) 233{ 234 struct dataflash *priv = mtd->priv; 235 struct spi_transfer x[2] = { { .tx_dma = 0, }, }; 236 struct spi_message msg; 237 unsigned int addr; 238 uint8_t *command; 239 int status; 240 241 DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n", 242 dev_name(&priv->spi->dev), (unsigned)from, (unsigned)(from + len)); 243 244 *retlen = 0; 245 246 /* Sanity checks */ 247 if (!len) 248 return 0; 249 if (from + len > mtd->size) 250 return -EINVAL; 251 252 /* Calculate flash page/byte address */ 253 addr = (((unsigned)from / priv->page_size) << priv->page_offset) 254 + ((unsigned)from % priv->page_size); 255 256 command = priv->command; 257 258 DEBUG(MTD_DEBUG_LEVEL3, "READ: (%x) %x %x %x\n", 259 command[0], command[1], command[2], command[3]); 260 261 spi_message_init(&msg); 262 263 x[0].tx_buf = command; 264 x[0].len = 8; 265 spi_message_add_tail(&x[0], &msg); 266 267 x[1].rx_buf = buf; 268 x[1].len = len; 269 spi_message_add_tail(&x[1], &msg); 270 271 mutex_lock(&priv->lock); 272 273 /* Continuous read, max clock = f(car) which may be less than 274 * the peak rate available. Some chips support commands with 275 * fewer "don't care" bytes. Both buffers stay unchanged. 276 */ 277 command[0] = OP_READ_CONTINUOUS; 278 command[1] = (uint8_t)(addr >> 16); 279 command[2] = (uint8_t)(addr >> 8); 280 command[3] = (uint8_t)(addr >> 0); 281 /* plus 4 "don't care" bytes */ 282 283 status = spi_sync(priv->spi, &msg); 284 mutex_unlock(&priv->lock); 285 286 if (status >= 0) { 287 *retlen = msg.actual_length - 8; 288 status = 0; 289 } else 290 DEBUG(MTD_DEBUG_LEVEL1, "%s: read %x..%x --> %d\n", 291 dev_name(&priv->spi->dev), 292 (unsigned)from, (unsigned)(from + len), 293 status); 294 return status; 295} 296 297/* 298 * Write to the DataFlash device. 299 * to : Start offset in flash device 300 * len : Amount to write 301 * retlen : Amount of data actually written 302 * buf : Buffer containing the data 303 */ 304static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, 305 size_t * retlen, const u_char * buf) 306{ 307 struct dataflash *priv = mtd->priv; 308 struct spi_device *spi = priv->spi; 309 struct spi_transfer x[2] = { { .tx_dma = 0, }, }; 310 struct spi_message msg; 311 unsigned int pageaddr, addr, offset, writelen; 312 size_t remaining = len; 313 u_char *writebuf = (u_char *) buf; 314 int status = -EINVAL; 315 uint8_t *command; 316 317 DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n", 318 dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len)); 319 320 *retlen = 0; 321 322 /* Sanity checks */ 323 if (!len) 324 return 0; 325 if ((to + len) > mtd->size) 326 return -EINVAL; 327 328 spi_message_init(&msg); 329 330 x[0].tx_buf = command = priv->command; 331 x[0].len = 4; 332 spi_message_add_tail(&x[0], &msg); 333 334 pageaddr = ((unsigned)to / priv->page_size); 335 offset = ((unsigned)to % priv->page_size); 336 if (offset + len > priv->page_size) 337 writelen = priv->page_size - offset; 338 else 339 writelen = len; 340 341 mutex_lock(&priv->lock); 342 while (remaining > 0) { 343 DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n", 344 pageaddr, offset, writelen); 345 346 /* REVISIT: 347 * (a) each page in a sector must be rewritten at least 348 * once every 10K sibling erase/program operations. 349 * (b) for pages that are already erased, we could 350 * use WRITE+MWRITE not PROGRAM for ~30% speedup. 351 * (c) WRITE to buffer could be done while waiting for 352 * a previous MWRITE/MWERASE to complete ... 353 * (d) error handling here seems to be mostly missing. 354 * 355 * Two persistent bits per page, plus a per-sector counter, 356 * could support (a) and (b) ... we might consider using 357 * the second half of sector zero, which is just one block, 358 * to track that state. (On AT91, that sector should also 359 * support boot-from-DataFlash.) 360 */ 361 362 addr = pageaddr << priv->page_offset; 363 364 /* (1) Maybe transfer partial page to Buffer1 */ 365 if (writelen != priv->page_size) { 366 command[0] = OP_TRANSFER_BUF1; 367 command[1] = (addr & 0x00FF0000) >> 16; 368 command[2] = (addr & 0x0000FF00) >> 8; 369 command[3] = 0; 370 371 DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n", 372 command[0], command[1], command[2], command[3]); 373 374 status = spi_sync(spi, &msg); 375 if (status < 0) 376 DEBUG(MTD_DEBUG_LEVEL1, "%s: xfer %u -> %d \n", 377 dev_name(&spi->dev), addr, status); 378 379 (void) dataflash_waitready(priv->spi); 380 } 381 382 /* (2) Program full page via Buffer1 */ 383 addr += offset; 384 command[0] = OP_PROGRAM_VIA_BUF1; 385 command[1] = (addr & 0x00FF0000) >> 16; 386 command[2] = (addr & 0x0000FF00) >> 8; 387 command[3] = (addr & 0x000000FF); 388 389 DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n", 390 command[0], command[1], command[2], command[3]); 391 392 x[1].tx_buf = writebuf; 393 x[1].len = writelen; 394 spi_message_add_tail(x + 1, &msg); 395 status = spi_sync(spi, &msg); 396 spi_transfer_del(x + 1); 397 if (status < 0) 398 DEBUG(MTD_DEBUG_LEVEL1, "%s: pgm %u/%u -> %d \n", 399 dev_name(&spi->dev), addr, writelen, status); 400 401 (void) dataflash_waitready(priv->spi); 402 403 404#ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY 405 406 /* (3) Compare to Buffer1 */ 407 addr = pageaddr << priv->page_offset; 408 command[0] = OP_COMPARE_BUF1; 409 command[1] = (addr & 0x00FF0000) >> 16; 410 command[2] = (addr & 0x0000FF00) >> 8; 411 command[3] = 0; 412 413 DEBUG(MTD_DEBUG_LEVEL3, "COMPARE: (%x) %x %x %x\n", 414 command[0], command[1], command[2], command[3]); 415 416 status = spi_sync(spi, &msg); 417 if (status < 0) 418 DEBUG(MTD_DEBUG_LEVEL1, "%s: compare %u -> %d \n", 419 dev_name(&spi->dev), addr, status); 420 421 status = dataflash_waitready(priv->spi); 422 423 /* Check result of the compare operation */ 424 if (status & (1 << 6)) { 425 printk(KERN_ERR "%s: compare page %u, err %d\n", 426 dev_name(&spi->dev), pageaddr, status); 427 remaining = 0; 428 status = -EIO; 429 break; 430 } else 431 status = 0; 432 433#endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */ 434 435 remaining = remaining - writelen; 436 pageaddr++; 437 offset = 0; 438 writebuf += writelen; 439 *retlen += writelen; 440 441 if (remaining > priv->page_size) 442 writelen = priv->page_size; 443 else 444 writelen = remaining; 445 } 446 mutex_unlock(&priv->lock); 447 448 return status; 449} 450 451/* ......................................................................... */ 452 453#ifdef CONFIG_MTD_DATAFLASH_OTP 454 455static int dataflash_get_otp_info(struct mtd_info *mtd, 456 struct otp_info *info, size_t len) 457{ 458 /* Report both blocks as identical: bytes 0..64, locked. 459 * Unless the user block changed from all-ones, we can't 460 * tell whether it's still writable; so we assume it isn't. 461 */ 462 info->start = 0; 463 info->length = 64; 464 info->locked = 1; 465 return sizeof(*info); 466} 467 468static ssize_t otp_read(struct spi_device *spi, unsigned base, 469 uint8_t *buf, loff_t off, size_t len) 470{ 471 struct spi_message m; 472 size_t l; 473 uint8_t *scratch; 474 struct spi_transfer t; 475 int status; 476 477 if (off > 64) 478 return -EINVAL; 479 480 if ((off + len) > 64) 481 len = 64 - off; 482 if (len == 0) 483 return len; 484 485 spi_message_init(&m); 486 487 l = 4 + base + off + len; 488 scratch = kzalloc(l, GFP_KERNEL); 489 if (!scratch) 490 return -ENOMEM; 491 492 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes 493 * IN: ignore 4 bytes, data bytes 0..N (max 127) 494 */ 495 scratch[0] = OP_READ_SECURITY; 496 497 memset(&t, 0, sizeof t); 498 t.tx_buf = scratch; 499 t.rx_buf = scratch; 500 t.len = l; 501 spi_message_add_tail(&t, &m); 502 503 dataflash_waitready(spi); 504 505 status = spi_sync(spi, &m); 506 if (status >= 0) { 507 memcpy(buf, scratch + 4 + base + off, len); 508 status = len; 509 } 510 511 kfree(scratch); 512 return status; 513} 514 515static int dataflash_read_fact_otp(struct mtd_info *mtd, 516 loff_t from, size_t len, size_t *retlen, u_char *buf) 517{ 518 struct dataflash *priv = mtd->priv; 519 int status; 520 521 /* 64 bytes, from 0..63 ... start at 64 on-chip */ 522 mutex_lock(&priv->lock); 523 status = otp_read(priv->spi, 64, buf, from, len); 524 mutex_unlock(&priv->lock); 525 526 if (status < 0) 527 return status; 528 *retlen = status; 529 return 0; 530} 531 532static int dataflash_read_user_otp(struct mtd_info *mtd, 533 loff_t from, size_t len, size_t *retlen, u_char *buf) 534{ 535 struct dataflash *priv = mtd->priv; 536 int status; 537 538 /* 64 bytes, from 0..63 ... start at 0 on-chip */ 539 mutex_lock(&priv->lock); 540 status = otp_read(priv->spi, 0, buf, from, len); 541 mutex_unlock(&priv->lock); 542 543 if (status < 0) 544 return status; 545 *retlen = status; 546 return 0; 547} 548 549static int dataflash_write_user_otp(struct mtd_info *mtd, 550 loff_t from, size_t len, size_t *retlen, u_char *buf) 551{ 552 struct spi_message m; 553 const size_t l = 4 + 64; 554 uint8_t *scratch; 555 struct spi_transfer t; 556 struct dataflash *priv = mtd->priv; 557 int status; 558 559 if (len > 64) 560 return -EINVAL; 561 562 /* Strictly speaking, we *could* truncate the write ... but 563 * let's not do that for the only write that's ever possible. 564 */ 565 if ((from + len) > 64) 566 return -EINVAL; 567 568 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes 569 * IN: ignore all 570 */ 571 scratch = kzalloc(l, GFP_KERNEL); 572 if (!scratch) 573 return -ENOMEM; 574 scratch[0] = OP_WRITE_SECURITY; 575 memcpy(scratch + 4 + from, buf, len); 576 577 spi_message_init(&m); 578 579 memset(&t, 0, sizeof t); 580 t.tx_buf = scratch; 581 t.len = l; 582 spi_message_add_tail(&t, &m); 583 584 /* Write the OTP bits, if they've not yet been written. 585 * This modifies SRAM buffer1. 586 */ 587 mutex_lock(&priv->lock); 588 dataflash_waitready(priv->spi); 589 status = spi_sync(priv->spi, &m); 590 mutex_unlock(&priv->lock); 591 592 kfree(scratch); 593 594 if (status >= 0) { 595 status = 0; 596 *retlen = len; 597 } 598 return status; 599} 600 601static char *otp_setup(struct mtd_info *device, char revision) 602{ 603 device->get_fact_prot_info = dataflash_get_otp_info; 604 device->read_fact_prot_reg = dataflash_read_fact_otp; 605 device->get_user_prot_info = dataflash_get_otp_info; 606 device->read_user_prot_reg = dataflash_read_user_otp; 607 608 /* rev c parts (at45db321c and at45db1281 only!) use a 609 * different write procedure; not (yet?) implemented. 610 */ 611 if (revision > 'c') 612 device->write_user_prot_reg = dataflash_write_user_otp; 613 614 return ", OTP"; 615} 616 617#else 618 619static char *otp_setup(struct mtd_info *device, char revision) 620{ 621 return " (OTP)"; 622} 623 624#endif 625 626/* ......................................................................... */ 627 628/* 629 * Register DataFlash device with MTD subsystem. 630 */ 631static int __devinit 632add_dataflash_otp(struct spi_device *spi, char *name, 633 int nr_pages, int pagesize, int pageoffset, char revision) 634{ 635 struct dataflash *priv; 636 struct mtd_info *device; 637 struct flash_platform_data *pdata = spi->dev.platform_data; 638 char *otp_tag = ""; 639 int err = 0; 640 641 priv = kzalloc(sizeof *priv, GFP_KERNEL); 642 if (!priv) 643 return -ENOMEM; 644 645 mutex_init(&priv->lock); 646 priv->spi = spi; 647 priv->page_size = pagesize; 648 priv->page_offset = pageoffset; 649 650 /* name must be usable with cmdlinepart */ 651 sprintf(priv->name, "spi%d.%d-%s", 652 spi->master->bus_num, spi->chip_select, 653 name); 654 655 device = &priv->mtd; 656 device->name = (pdata && pdata->name) ? pdata->name : priv->name; 657 device->size = nr_pages * pagesize; 658 device->erasesize = pagesize; 659 device->writesize = pagesize; 660 device->owner = THIS_MODULE; 661 device->type = MTD_DATAFLASH; 662 device->flags = MTD_WRITEABLE; 663 device->erase = dataflash_erase; 664 device->read = dataflash_read; 665 device->write = dataflash_write; 666 device->priv = priv; 667 668 device->dev.parent = &spi->dev; 669 670 if (revision >= 'c') 671 otp_tag = otp_setup(device, revision); 672 673 dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n", 674 name, (long long)((device->size + 1023) >> 10), 675 pagesize, otp_tag); 676 dev_set_drvdata(&spi->dev, priv); 677 678 if (mtd_has_partitions()) { 679 struct mtd_partition *parts; 680 int nr_parts = 0; 681 682 if (mtd_has_cmdlinepart()) { 683 static const char *part_probes[] 684 = { "cmdlinepart", NULL, }; 685 686 nr_parts = parse_mtd_partitions(device, 687 part_probes, &parts, 0); 688 } 689 690 if (nr_parts <= 0 && pdata && pdata->parts) { 691 parts = pdata->parts; 692 nr_parts = pdata->nr_parts; 693 } 694 695 if (nr_parts > 0) { 696 priv->partitioned = 1; 697 err = add_mtd_partitions(device, parts, nr_parts); 698 goto out; 699 } 700 } else if (pdata && pdata->nr_parts) 701 dev_warn(&spi->dev, "ignoring %d default partitions on %s\n", 702 pdata->nr_parts, device->name); 703 704 if (add_mtd_device(device) == 1) 705 err = -ENODEV; 706 707out: 708 if (!err) 709 return 0; 710 711 dev_set_drvdata(&spi->dev, NULL); 712 kfree(priv); 713 return err; 714} 715 716static inline int __devinit 717add_dataflash(struct spi_device *spi, char *name, 718 int nr_pages, int pagesize, int pageoffset) 719{ 720 return add_dataflash_otp(spi, name, nr_pages, pagesize, 721 pageoffset, 0); 722} 723 724struct flash_info { 725 char *name; 726 727 /* JEDEC id has a high byte of zero plus three data bytes: 728 * the manufacturer id, then a two byte device id. 729 */ 730 uint32_t jedec_id; 731 732 /* The size listed here is what works with OP_ERASE_PAGE. */ 733 unsigned nr_pages; 734 uint16_t pagesize; 735 uint16_t pageoffset; 736 737 uint16_t flags; 738#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ 739#define IS_POW2PS 0x0001 /* uses 2^N byte pages */ 740}; 741 742static struct flash_info __devinitdata dataflash_data [] = { 743 744 /* 745 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, 746 * one with IS_POW2PS and the other without. The entry with the 747 * non-2^N byte page size can't name exact chip revisions without 748 * losing backwards compatibility for cmdlinepart. 749 * 750 * These newer chips also support 128-byte security registers (with 751 * 64 bytes one-time-programmable) and software write-protection. 752 */ 753 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, 754 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, 755 756 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, 757 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, 758 759 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, 760 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, 761 762 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, 763 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, 764 765 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, 766 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, 767 768 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */ 769 770 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, 771 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, 772 773 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, 774 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, 775}; 776 777static struct flash_info *__devinit jedec_probe(struct spi_device *spi) 778{ 779 int tmp; 780 uint8_t code = OP_READ_ID; 781 uint8_t id[3]; 782 uint32_t jedec; 783 struct flash_info *info; 784 int status; 785 786 /* JEDEC also defines an optional "extended device information" 787 * string for after vendor-specific data, after the three bytes 788 * we use here. Supporting some chips might require using it. 789 * 790 * If the vendor ID isn't Atmel's (0x1f), assume this call failed. 791 * That's not an error; only rev C and newer chips handle it, and 792 * only Atmel sells these chips. 793 */ 794 tmp = spi_write_then_read(spi, &code, 1, id, 3); 795 if (tmp < 0) { 796 DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n", 797 dev_name(&spi->dev), tmp); 798 return ERR_PTR(tmp); 799 } 800 if (id[0] != 0x1f) 801 return NULL; 802 803 jedec = id[0]; 804 jedec = jedec << 8; 805 jedec |= id[1]; 806 jedec = jedec << 8; 807 jedec |= id[2]; 808 809 for (tmp = 0, info = dataflash_data; 810 tmp < ARRAY_SIZE(dataflash_data); 811 tmp++, info++) { 812 if (info->jedec_id == jedec) { 813 DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n", 814 dev_name(&spi->dev), 815 (info->flags & SUP_POW2PS) 816 ? ", binary pagesize" : "" 817 ); 818 if (info->flags & SUP_POW2PS) { 819 status = dataflash_status(spi); 820 if (status < 0) { 821 DEBUG(MTD_DEBUG_LEVEL1, 822 "%s: status error %d\n", 823 dev_name(&spi->dev), status); 824 return ERR_PTR(status); 825 } 826 if (status & 0x1) { 827 if (info->flags & IS_POW2PS) 828 return info; 829 } else { 830 if (!(info->flags & IS_POW2PS)) 831 return info; 832 } 833 } else 834 return info; 835 } 836 } 837 838 /* 839 * Treat other chips as errors ... we won't know the right page 840 * size (it might be binary) even when we can tell which density 841 * class is involved (legacy chip id scheme). 842 */ 843 dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec); 844 return ERR_PTR(-ENODEV); 845} 846 847/* 848 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips 849 * or else the ID code embedded in the status bits: 850 * 851 * Device Density ID code #Pages PageSize Offset 852 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 853 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 854 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 855 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 856 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 857 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 858 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 859 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 860 */ 861static int __devinit dataflash_probe(struct spi_device *spi) 862{ 863 int status; 864 struct flash_info *info; 865 866 /* 867 * Try to detect dataflash by JEDEC ID. 868 * If it succeeds we know we have either a C or D part. 869 * D will support power of 2 pagesize option. 870 * Both support the security register, though with different 871 * write procedures. 872 */ 873 info = jedec_probe(spi); 874 if (IS_ERR(info)) 875 return PTR_ERR(info); 876 if (info != NULL) 877 return add_dataflash_otp(spi, info->name, info->nr_pages, 878 info->pagesize, info->pageoffset, 879 (info->flags & SUP_POW2PS) ? 'd' : 'c'); 880 881 /* 882 * Older chips support only legacy commands, identifing 883 * capacity using bits in the status byte. 884 */ 885 status = dataflash_status(spi); 886 if (status <= 0 || status == 0xff) { 887 DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n", 888 dev_name(&spi->dev), status); 889 if (status == 0 || status == 0xff) 890 status = -ENODEV; 891 return status; 892 } 893 894 /* if there's a device there, assume it's dataflash. 895 * board setup should have set spi->max_speed_max to 896 * match f(car) for continuous reads, mode 0 or 3. 897 */ 898 switch (status & 0x3c) { 899 case 0x0c: /* 0 0 1 1 x x */ 900 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9); 901 break; 902 case 0x14: /* 0 1 0 1 x x */ 903 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9); 904 break; 905 case 0x1c: /* 0 1 1 1 x x */ 906 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9); 907 break; 908 case 0x24: /* 1 0 0 1 x x */ 909 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9); 910 break; 911 case 0x2c: /* 1 0 1 1 x x */ 912 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10); 913 break; 914 case 0x34: /* 1 1 0 1 x x */ 915 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10); 916 break; 917 case 0x38: /* 1 1 1 x x x */ 918 case 0x3c: 919 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11); 920 break; 921 /* obsolete AT45DB1282 not (yet?) supported */ 922 default: 923 DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n", 924 dev_name(&spi->dev), status & 0x3c); 925 status = -ENODEV; 926 } 927 928 if (status < 0) 929 DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n", 930 dev_name(&spi->dev), status); 931 932 return status; 933} 934 935static int __devexit dataflash_remove(struct spi_device *spi) 936{ 937 struct dataflash *flash = dev_get_drvdata(&spi->dev); 938 int status; 939 940 DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", dev_name(&spi->dev)); 941 942 if (mtd_has_partitions() && flash->partitioned) 943 status = del_mtd_partitions(&flash->mtd); 944 else 945 status = del_mtd_device(&flash->mtd); 946 if (status == 0) { 947 dev_set_drvdata(&spi->dev, NULL); 948 kfree(flash); 949 } 950 return status; 951} 952 953static struct spi_driver dataflash_driver = { 954 .driver = { 955 .name = "mtd_dataflash", 956 .bus = &spi_bus_type, 957 .owner = THIS_MODULE, 958 }, 959 960 .probe = dataflash_probe, 961 .remove = __devexit_p(dataflash_remove), 962 963}; 964 965static int __init dataflash_init(void) 966{ 967 return spi_register_driver(&dataflash_driver); 968} 969module_init(dataflash_init); 970 971static void __exit dataflash_exit(void) 972{ 973 spi_unregister_driver(&dataflash_driver); 974} 975module_exit(dataflash_exit); 976 977 978MODULE_LICENSE("GPL"); 979MODULE_AUTHOR("Andrew Victor, David Brownell"); 980MODULE_DESCRIPTION("MTD DataFlash driver"); 981MODULE_ALIAS("spi:mtd_dataflash"); 982