1/* 2 * cx18 init/start/stop/exit stream functions 3 * 4 * Derived from ivtv-streams.c 5 * 6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 7 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 22 * 02111-1307 USA 23 */ 24 25#include "cx18-driver.h" 26#include "cx18-io.h" 27#include "cx18-fileops.h" 28#include "cx18-mailbox.h" 29#include "cx18-i2c.h" 30#include "cx18-queue.h" 31#include "cx18-ioctl.h" 32#include "cx18-streams.h" 33#include "cx18-cards.h" 34#include "cx18-scb.h" 35#include "cx18-dvb.h" 36 37#define CX18_DSP0_INTERRUPT_MASK 0xd0004C 38 39static struct v4l2_file_operations cx18_v4l2_enc_fops = { 40 .owner = THIS_MODULE, 41 .read = cx18_v4l2_read, 42 .open = cx18_v4l2_open, 43 .ioctl = cx18_v4l2_ioctl, 44 .release = cx18_v4l2_close, 45 .poll = cx18_v4l2_enc_poll, 46}; 47 48/* offset from 0 to register ts v4l2 minors on */ 49#define CX18_V4L2_ENC_TS_OFFSET 16 50/* offset from 0 to register pcm v4l2 minors on */ 51#define CX18_V4L2_ENC_PCM_OFFSET 24 52/* offset from 0 to register yuv v4l2 minors on */ 53#define CX18_V4L2_ENC_YUV_OFFSET 32 54 55static struct { 56 const char *name; 57 int vfl_type; 58 int num_offset; 59 int dma; 60 enum v4l2_buf_type buf_type; 61} cx18_stream_info[] = { 62 { /* CX18_ENC_STREAM_TYPE_MPG */ 63 "encoder MPEG", 64 VFL_TYPE_GRABBER, 0, 65 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, 66 }, 67 { /* CX18_ENC_STREAM_TYPE_TS */ 68 "TS", 69 VFL_TYPE_GRABBER, -1, 70 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, 71 }, 72 { /* CX18_ENC_STREAM_TYPE_YUV */ 73 "encoder YUV", 74 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET, 75 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, 76 }, 77 { /* CX18_ENC_STREAM_TYPE_VBI */ 78 "encoder VBI", 79 VFL_TYPE_VBI, 0, 80 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE, 81 }, 82 { /* CX18_ENC_STREAM_TYPE_PCM */ 83 "encoder PCM audio", 84 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET, 85 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE, 86 }, 87 { /* CX18_ENC_STREAM_TYPE_IDX */ 88 "encoder IDX", 89 VFL_TYPE_GRABBER, -1, 90 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, 91 }, 92 { /* CX18_ENC_STREAM_TYPE_RAD */ 93 "encoder radio", 94 VFL_TYPE_RADIO, 0, 95 PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE, 96 }, 97}; 98 99static void cx18_stream_init(struct cx18 *cx, int type) 100{ 101 struct cx18_stream *s = &cx->streams[type]; 102 struct video_device *video_dev = s->video_dev; 103 104 /* we need to keep video_dev, so restore it afterwards */ 105 memset(s, 0, sizeof(*s)); 106 s->video_dev = video_dev; 107 108 /* initialize cx18_stream fields */ 109 s->cx = cx; 110 s->type = type; 111 s->name = cx18_stream_info[type].name; 112 s->handle = CX18_INVALID_TASK_HANDLE; 113 114 s->dma = cx18_stream_info[type].dma; 115 s->buffers = cx->stream_buffers[type]; 116 s->buf_size = cx->stream_buf_size[type]; 117 INIT_LIST_HEAD(&s->buf_pool); 118 s->bufs_per_mdl = 1; 119 s->mdl_size = s->buf_size * s->bufs_per_mdl; 120 121 init_waitqueue_head(&s->waitq); 122 s->id = -1; 123 spin_lock_init(&s->q_free.lock); 124 cx18_queue_init(&s->q_free); 125 spin_lock_init(&s->q_busy.lock); 126 cx18_queue_init(&s->q_busy); 127 spin_lock_init(&s->q_full.lock); 128 cx18_queue_init(&s->q_full); 129 spin_lock_init(&s->q_idle.lock); 130 cx18_queue_init(&s->q_idle); 131 132 INIT_WORK(&s->out_work_order, cx18_out_work_handler); 133} 134 135static int cx18_prep_dev(struct cx18 *cx, int type) 136{ 137 struct cx18_stream *s = &cx->streams[type]; 138 u32 cap = cx->v4l2_cap; 139 int num_offset = cx18_stream_info[type].num_offset; 140 int num = cx->instance + cx18_first_minor + num_offset; 141 142 /* These four fields are always initialized. If video_dev == NULL, then 143 this stream is not in use. In that case no other fields but these 144 four can be used. */ 145 s->video_dev = NULL; 146 s->cx = cx; 147 s->type = type; 148 s->name = cx18_stream_info[type].name; 149 150 /* Check whether the radio is supported */ 151 if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO)) 152 return 0; 153 154 /* Check whether VBI is supported */ 155 if (type == CX18_ENC_STREAM_TYPE_VBI && 156 !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE))) 157 return 0; 158 159 /* User explicitly selected 0 buffers for these streams, so don't 160 create them. */ 161 if (cx18_stream_info[type].dma != PCI_DMA_NONE && 162 cx->stream_buffers[type] == 0) { 163 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name); 164 return 0; 165 } 166 167 cx18_stream_init(cx, type); 168 169 if (num_offset == -1) 170 return 0; 171 172 /* allocate and initialize the v4l2 video device structure */ 173 s->video_dev = video_device_alloc(); 174 if (s->video_dev == NULL) { 175 CX18_ERR("Couldn't allocate v4l2 video_device for %s\n", 176 s->name); 177 return -ENOMEM; 178 } 179 180 snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s", 181 cx->v4l2_dev.name, s->name); 182 183 s->video_dev->num = num; 184 s->video_dev->v4l2_dev = &cx->v4l2_dev; 185 s->video_dev->fops = &cx18_v4l2_enc_fops; 186 s->video_dev->release = video_device_release; 187 s->video_dev->tvnorms = V4L2_STD_ALL; 188 cx18_set_funcs(s->video_dev); 189 return 0; 190} 191 192/* Initialize v4l2 variables and register v4l2 devices */ 193int cx18_streams_setup(struct cx18 *cx) 194{ 195 int type, ret; 196 197 /* Setup V4L2 Devices */ 198 for (type = 0; type < CX18_MAX_STREAMS; type++) { 199 /* Prepare device */ 200 ret = cx18_prep_dev(cx, type); 201 if (ret < 0) 202 break; 203 204 /* Allocate Stream */ 205 ret = cx18_stream_alloc(&cx->streams[type]); 206 if (ret < 0) 207 break; 208 } 209 if (type == CX18_MAX_STREAMS) 210 return 0; 211 212 /* One or more streams could not be initialized. Clean 'em all up. */ 213 cx18_streams_cleanup(cx, 0); 214 return ret; 215} 216 217static int cx18_reg_dev(struct cx18 *cx, int type) 218{ 219 struct cx18_stream *s = &cx->streams[type]; 220 int vfl_type = cx18_stream_info[type].vfl_type; 221 const char *name; 222 int num, ret; 223 224 /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something? 225 * We need a VFL_TYPE_TS defined. 226 */ 227 if (strcmp("TS", s->name) == 0) { 228 /* just return if no DVB is supported */ 229 if ((cx->card->hw_all & CX18_HW_DVB) == 0) 230 return 0; 231 ret = cx18_dvb_register(s); 232 if (ret < 0) { 233 CX18_ERR("DVB failed to register\n"); 234 return ret; 235 } 236 } 237 238 if (s->video_dev == NULL) 239 return 0; 240 241 num = s->video_dev->num; 242 /* card number + user defined offset + device offset */ 243 if (type != CX18_ENC_STREAM_TYPE_MPG) { 244 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG]; 245 246 if (s_mpg->video_dev) 247 num = s_mpg->video_dev->num 248 + cx18_stream_info[type].num_offset; 249 } 250 video_set_drvdata(s->video_dev, s); 251 252 /* Register device. First try the desired minor, then any free one. */ 253 ret = video_register_device_no_warn(s->video_dev, vfl_type, num); 254 if (ret < 0) { 255 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n", 256 s->name, num); 257 video_device_release(s->video_dev); 258 s->video_dev = NULL; 259 return ret; 260 } 261 262 name = video_device_node_name(s->video_dev); 263 264 switch (vfl_type) { 265 case VFL_TYPE_GRABBER: 266 CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n", 267 name, s->name, cx->stream_buffers[type], 268 cx->stream_buf_size[type] / 1024, 269 (cx->stream_buf_size[type] * 100 / 1024) % 100); 270 break; 271 272 case VFL_TYPE_RADIO: 273 CX18_INFO("Registered device %s for %s\n", name, s->name); 274 break; 275 276 case VFL_TYPE_VBI: 277 if (cx->stream_buffers[type]) 278 CX18_INFO("Registered device %s for %s " 279 "(%d x %d bytes)\n", 280 name, s->name, cx->stream_buffers[type], 281 cx->stream_buf_size[type]); 282 else 283 CX18_INFO("Registered device %s for %s\n", 284 name, s->name); 285 break; 286 } 287 288 return 0; 289} 290 291/* Register v4l2 devices */ 292int cx18_streams_register(struct cx18 *cx) 293{ 294 int type; 295 int err; 296 int ret = 0; 297 298 /* Register V4L2 devices */ 299 for (type = 0; type < CX18_MAX_STREAMS; type++) { 300 err = cx18_reg_dev(cx, type); 301 if (err && ret == 0) 302 ret = err; 303 } 304 305 if (ret == 0) 306 return 0; 307 308 /* One or more streams could not be initialized. Clean 'em all up. */ 309 cx18_streams_cleanup(cx, 1); 310 return ret; 311} 312 313/* Unregister v4l2 devices */ 314void cx18_streams_cleanup(struct cx18 *cx, int unregister) 315{ 316 struct video_device *vdev; 317 int type; 318 319 /* Teardown all streams */ 320 for (type = 0; type < CX18_MAX_STREAMS; type++) { 321 322 /* No struct video_device, but can have buffers allocated */ 323 if (type == CX18_ENC_STREAM_TYPE_TS) { 324 if (cx->streams[type].dvb.enabled) { 325 cx18_dvb_unregister(&cx->streams[type]); 326 cx->streams[type].dvb.enabled = false; 327 cx18_stream_free(&cx->streams[type]); 328 } 329 continue; 330 } 331 332 /* No struct video_device, but can have buffers allocated */ 333 if (type == CX18_ENC_STREAM_TYPE_IDX) { 334 if (cx->stream_buffers[type] != 0) { 335 cx->stream_buffers[type] = 0; 336 cx18_stream_free(&cx->streams[type]); 337 } 338 continue; 339 } 340 341 /* If struct video_device exists, can have buffers allocated */ 342 vdev = cx->streams[type].video_dev; 343 344 cx->streams[type].video_dev = NULL; 345 if (vdev == NULL) 346 continue; 347 348 cx18_stream_free(&cx->streams[type]); 349 350 /* Unregister or release device */ 351 if (unregister) 352 video_unregister_device(vdev); 353 else 354 video_device_release(vdev); 355 } 356} 357 358static void cx18_vbi_setup(struct cx18_stream *s) 359{ 360 struct cx18 *cx = s->cx; 361 int raw = cx18_raw_vbi(cx); 362 u32 data[CX2341X_MBOX_MAX_DATA]; 363 int lines; 364 365 if (cx->is_60hz) { 366 cx->vbi.count = 12; 367 cx->vbi.start[0] = 10; 368 cx->vbi.start[1] = 273; 369 } else { /* PAL/SECAM */ 370 cx->vbi.count = 18; 371 cx->vbi.start[0] = 6; 372 cx->vbi.start[1] = 318; 373 } 374 375 /* setup VBI registers */ 376 if (raw) 377 v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi); 378 else 379 v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced); 380 381 /* 382 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw 383 * VBI when the first analog capture channel starts, as once it starts 384 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup 385 * (i.e. for the VBI capture channels). We also send it for each 386 * analog capture channel anyway just to make sure we get the proper 387 * behavior 388 */ 389 if (raw) { 390 lines = cx->vbi.count * 2; 391 } else { 392 /* 393 * For 525/60 systems, according to the VIP 2 & BT.656 std: 394 * The EAV RP code's Field bit toggles on line 4, a few lines 395 * after the Vertcal Blank bit has already toggled. 396 * Tell the encoder to capture 21-4+1=18 lines per field, 397 * since we want lines 10 through 21. 398 * 399 * For 625/50 systems, according to the VIP 2 & BT.656 std: 400 * The EAV RP code's Field bit toggles on line 1, a few lines 401 * after the Vertcal Blank bit has already toggled. 402 * (We've actually set the digitizer so that the Field bit 403 * toggles on line 2.) Tell the encoder to capture 23-2+1=22 404 * lines per field, since we want lines 6 through 23. 405 */ 406 lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2; 407 } 408 409 data[0] = s->handle; 410 /* Lines per field */ 411 data[1] = (lines / 2) | ((lines / 2) << 16); 412 /* bytes per line */ 413 data[2] = (raw ? vbi_active_samples 414 : (cx->is_60hz ? vbi_hblank_samples_60Hz 415 : vbi_hblank_samples_50Hz)); 416 /* Every X number of frames a VBI interrupt arrives 417 (frames as in 25 or 30 fps) */ 418 data[3] = 1; 419 /* 420 * Set the SAV/EAV RP codes to look for as start/stop points 421 * when in VIP-1.1 mode 422 */ 423 if (raw) { 424 /* 425 * Start codes for beginning of "active" line in vertical blank 426 * 0x20 ( VerticalBlank ) 427 * 0x60 ( EvenField VerticalBlank ) 428 */ 429 data[4] = 0x20602060; 430 /* 431 * End codes for end of "active" raw lines and regular lines 432 * 0x30 ( VerticalBlank HorizontalBlank) 433 * 0x70 ( EvenField VerticalBlank HorizontalBlank) 434 * 0x90 (Task HorizontalBlank) 435 * 0xd0 (Task EvenField HorizontalBlank) 436 */ 437 data[5] = 0x307090d0; 438 } else { 439 /* 440 * End codes for active video, we want data in the hblank region 441 * 0xb0 (Task 0 VerticalBlank HorizontalBlank) 442 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank) 443 * 444 * Since the V bit is only allowed to toggle in the EAV RP code, 445 * just before the first active region line, these two 446 * are problematic: 447 * 0x90 (Task HorizontalBlank) 448 * 0xd0 (Task EvenField HorizontalBlank) 449 * 450 * We have set the digitzer such that we don't have to worry 451 * about these problem codes. 452 */ 453 data[4] = 0xB0F0B0F0; 454 /* 455 * Start codes for beginning of active line in vertical blank 456 * 0xa0 (Task VerticalBlank ) 457 * 0xe0 (Task EvenField VerticalBlank ) 458 */ 459 data[5] = 0xA0E0A0E0; 460 } 461 462 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n", 463 data[0], data[1], data[2], data[3], data[4], data[5]); 464 465 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data); 466} 467 468void cx18_stream_rotate_idx_mdls(struct cx18 *cx) 469{ 470 struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; 471 struct cx18_mdl *mdl; 472 473 if (!cx18_stream_enabled(s)) 474 return; 475 476 /* Return if the firmware is not running low on MDLs */ 477 if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >= 478 CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN) 479 return; 480 481 /* Return if there are no MDLs to rotate back to the firmware */ 482 if (atomic_read(&s->q_full.depth) < 2) 483 return; 484 485 /* 486 * Take the oldest IDX MDL still holding data, and discard its index 487 * entries by scheduling the MDL to go back to the firmware 488 */ 489 mdl = cx18_dequeue(s, &s->q_full); 490 if (mdl != NULL) 491 cx18_enqueue(s, mdl, &s->q_free); 492} 493 494static 495struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s, 496 struct cx18_mdl *mdl) 497{ 498 struct cx18 *cx = s->cx; 499 struct cx18_queue *q; 500 501 /* Don't give it to the firmware, if we're not running a capture */ 502 if (s->handle == CX18_INVALID_TASK_HANDLE || 503 test_bit(CX18_F_S_STOPPING, &s->s_flags) || 504 !test_bit(CX18_F_S_STREAMING, &s->s_flags)) 505 return cx18_enqueue(s, mdl, &s->q_free); 506 507 q = cx18_enqueue(s, mdl, &s->q_busy); 508 if (q != &s->q_busy) 509 return q; /* The firmware has the max MDLs it can handle */ 510 511 cx18_mdl_sync_for_device(s, mdl); 512 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle, 513 (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem, 514 s->bufs_per_mdl, mdl->id, s->mdl_size); 515 return q; 516} 517 518static 519void _cx18_stream_load_fw_queue(struct cx18_stream *s) 520{ 521 struct cx18_queue *q; 522 struct cx18_mdl *mdl; 523 524 if (atomic_read(&s->q_free.depth) == 0 || 525 atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM) 526 return; 527 528 /* Move from q_free to q_busy notifying the firmware, until the limit */ 529 do { 530 mdl = cx18_dequeue(s, &s->q_free); 531 if (mdl == NULL) 532 break; 533 q = _cx18_stream_put_mdl_fw(s, mdl); 534 } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM 535 && q == &s->q_busy); 536} 537 538void cx18_out_work_handler(struct work_struct *work) 539{ 540 struct cx18_stream *s = 541 container_of(work, struct cx18_stream, out_work_order); 542 543 _cx18_stream_load_fw_queue(s); 544} 545 546static void cx18_stream_configure_mdls(struct cx18_stream *s) 547{ 548 cx18_unload_queues(s); 549 550 switch (s->type) { 551 case CX18_ENC_STREAM_TYPE_YUV: 552 /* 553 * Height should be a multiple of 32 lines. 554 * Set the MDL size to the exact size needed for one frame. 555 * Use enough buffers per MDL to cover the MDL size 556 */ 557 s->mdl_size = 720 * s->cx->params.height * 3 / 2; 558 s->bufs_per_mdl = s->mdl_size / s->buf_size; 559 if (s->mdl_size % s->buf_size) 560 s->bufs_per_mdl++; 561 break; 562 case CX18_ENC_STREAM_TYPE_VBI: 563 s->bufs_per_mdl = 1; 564 if (cx18_raw_vbi(s->cx)) { 565 s->mdl_size = (s->cx->is_60hz ? 12 : 18) 566 * 2 * vbi_active_samples; 567 } else { 568 /* 569 * See comment in cx18_vbi_setup() below about the 570 * extra lines we capture in sliced VBI mode due to 571 * the lines on which EAV RP codes toggle. 572 */ 573 s->mdl_size = s->cx->is_60hz 574 ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz 575 : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz; 576 } 577 break; 578 default: 579 s->bufs_per_mdl = 1; 580 s->mdl_size = s->buf_size * s->bufs_per_mdl; 581 break; 582 } 583 584 cx18_load_queues(s); 585} 586 587int cx18_start_v4l2_encode_stream(struct cx18_stream *s) 588{ 589 u32 data[MAX_MB_ARGUMENTS]; 590 struct cx18 *cx = s->cx; 591 int captype = 0; 592 struct cx18_api_func_private priv; 593 struct cx18_stream *s_idx; 594 595 if (!cx18_stream_enabled(s)) 596 return -EINVAL; 597 598 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name); 599 600 switch (s->type) { 601 case CX18_ENC_STREAM_TYPE_MPG: 602 captype = CAPTURE_CHANNEL_TYPE_MPEG; 603 cx->mpg_data_received = cx->vbi_data_inserted = 0; 604 cx->dualwatch_jiffies = jiffies; 605 cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300; 606 cx->search_pack_header = 0; 607 break; 608 609 case CX18_ENC_STREAM_TYPE_IDX: 610 captype = CAPTURE_CHANNEL_TYPE_INDEX; 611 break; 612 case CX18_ENC_STREAM_TYPE_TS: 613 captype = CAPTURE_CHANNEL_TYPE_TS; 614 break; 615 case CX18_ENC_STREAM_TYPE_YUV: 616 captype = CAPTURE_CHANNEL_TYPE_YUV; 617 break; 618 case CX18_ENC_STREAM_TYPE_PCM: 619 captype = CAPTURE_CHANNEL_TYPE_PCM; 620 break; 621 case CX18_ENC_STREAM_TYPE_VBI: 622#ifdef CX18_ENCODER_PARSES_SLICED 623 captype = cx18_raw_vbi(cx) ? 624 CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI; 625#else 626 /* 627 * Currently we set things up so that Sliced VBI from the 628 * digitizer is handled as Raw VBI by the encoder 629 */ 630 captype = CAPTURE_CHANNEL_TYPE_VBI; 631#endif 632 cx->vbi.frame = 0; 633 cx->vbi.inserted_frame = 0; 634 memset(cx->vbi.sliced_mpeg_size, 635 0, sizeof(cx->vbi.sliced_mpeg_size)); 636 break; 637 default: 638 return -EINVAL; 639 } 640 641 /* Clear Streamoff flags in case left from last capture */ 642 clear_bit(CX18_F_S_STREAMOFF, &s->s_flags); 643 644 cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE); 645 s->handle = data[0]; 646 cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype); 647 648 /* 649 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and 650 * set up all the parameters, as it is not obvious which parameters the 651 * firmware shares across capture channel types and which it does not. 652 * 653 * Some of the cx18_vapi() calls below apply to only certain capture 654 * channel types. We're hoping there's no harm in calling most of them 655 * anyway, as long as the values are all consistent. Setting some 656 * shared parameters will have no effect once an analog capture channel 657 * has started streaming. 658 */ 659 if (captype != CAPTURE_CHANNEL_TYPE_TS) { 660 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0); 661 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1); 662 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0); 663 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1); 664 665 /* 666 * Audio related reset according to 667 * Documentation/video4linux/cx2341x/fw-encoder-api.txt 668 */ 669 if (atomic_read(&cx->ana_capturing) == 0) 670 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, 671 s->handle, 12); 672 673 /* 674 * Number of lines for Field 1 & Field 2 according to 675 * Documentation/video4linux/cx2341x/fw-encoder-api.txt 676 * Field 1 is 312 for 625 line systems in BT.656 677 * Field 2 is 313 for 625 line systems in BT.656 678 */ 679 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3, 680 s->handle, 312, 313); 681 682 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE) 683 cx18_vbi_setup(s); 684 685 /* 686 * Select to receive I, P, and B frame index entries, if the 687 * index stream is enabled. Otherwise disable index entry 688 * generation. 689 */ 690 s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; 691 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2, 692 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0); 693 694 /* Call out to the common CX2341x API setup for user controls */ 695 priv.cx = cx; 696 priv.s = s; 697 cx2341x_update(&priv, cx18_api_func, NULL, &cx->params); 698 699 /* 700 * When starting a capture and we're set for radio, 701 * ensure the video is muted, despite the user control. 702 */ 703 if (!cx->params.video_mute && 704 test_bit(CX18_F_I_RADIO_USER, &cx->i_flags)) 705 cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle, 706 (cx->params.video_mute_yuv << 8) | 1); 707 } 708 709 if (atomic_read(&cx->tot_capturing) == 0) { 710 clear_bit(CX18_F_I_EOS, &cx->i_flags); 711 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK); 712 } 713 714 cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle, 715 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem, 716 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem); 717 718 /* Init all the cpu_mdls for this stream */ 719 cx18_stream_configure_mdls(s); 720 _cx18_stream_load_fw_queue(s); 721 722 /* begin_capture */ 723 if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) { 724 CX18_DEBUG_WARN("Error starting capture!\n"); 725 /* Ensure we're really not capturing before releasing MDLs */ 726 set_bit(CX18_F_S_STOPPING, &s->s_flags); 727 if (s->type == CX18_ENC_STREAM_TYPE_MPG) 728 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1); 729 else 730 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); 731 clear_bit(CX18_F_S_STREAMING, &s->s_flags); 732 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); 733 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); 734 s->handle = CX18_INVALID_TASK_HANDLE; 735 clear_bit(CX18_F_S_STOPPING, &s->s_flags); 736 if (atomic_read(&cx->tot_capturing) == 0) { 737 set_bit(CX18_F_I_EOS, &cx->i_flags); 738 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); 739 } 740 return -EINVAL; 741 } 742 743 /* you're live! sit back and await interrupts :) */ 744 if (captype != CAPTURE_CHANNEL_TYPE_TS) 745 atomic_inc(&cx->ana_capturing); 746 atomic_inc(&cx->tot_capturing); 747 return 0; 748} 749EXPORT_SYMBOL(cx18_start_v4l2_encode_stream); 750 751void cx18_stop_all_captures(struct cx18 *cx) 752{ 753 int i; 754 755 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) { 756 struct cx18_stream *s = &cx->streams[i]; 757 758 if (!cx18_stream_enabled(s)) 759 continue; 760 if (test_bit(CX18_F_S_STREAMING, &s->s_flags)) 761 cx18_stop_v4l2_encode_stream(s, 0); 762 } 763} 764 765int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end) 766{ 767 struct cx18 *cx = s->cx; 768 unsigned long then; 769 770 if (!cx18_stream_enabled(s)) 771 return -EINVAL; 772 773 /* This function assumes that you are allowed to stop the capture 774 and that we are actually capturing */ 775 776 CX18_DEBUG_INFO("Stop Capture\n"); 777 778 if (atomic_read(&cx->tot_capturing) == 0) 779 return 0; 780 781 set_bit(CX18_F_S_STOPPING, &s->s_flags); 782 if (s->type == CX18_ENC_STREAM_TYPE_MPG) 783 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end); 784 else 785 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); 786 787 then = jiffies; 788 789 if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) { 790 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n"); 791 } 792 793 if (s->type != CX18_ENC_STREAM_TYPE_TS) 794 atomic_dec(&cx->ana_capturing); 795 atomic_dec(&cx->tot_capturing); 796 797 /* Clear capture and no-read bits */ 798 clear_bit(CX18_F_S_STREAMING, &s->s_flags); 799 800 /* Tell the CX23418 it can't use our buffers anymore */ 801 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); 802 803 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); 804 s->handle = CX18_INVALID_TASK_HANDLE; 805 clear_bit(CX18_F_S_STOPPING, &s->s_flags); 806 807 if (atomic_read(&cx->tot_capturing) > 0) 808 return 0; 809 810 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); 811 wake_up(&s->waitq); 812 813 return 0; 814} 815EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream); 816 817u32 cx18_find_handle(struct cx18 *cx) 818{ 819 int i; 820 821 /* find first available handle to be used for global settings */ 822 for (i = 0; i < CX18_MAX_STREAMS; i++) { 823 struct cx18_stream *s = &cx->streams[i]; 824 825 if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE)) 826 return s->handle; 827 } 828 return CX18_INVALID_TASK_HANDLE; 829} 830 831struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle) 832{ 833 int i; 834 struct cx18_stream *s; 835 836 if (handle == CX18_INVALID_TASK_HANDLE) 837 return NULL; 838 839 for (i = 0; i < CX18_MAX_STREAMS; i++) { 840 s = &cx->streams[i]; 841 if (s->handle != handle) 842 continue; 843 if (cx18_stream_enabled(s)) 844 return s; 845 } 846 return NULL; 847} 848