1/* 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 */ 33 34#include <linux/module.h> 35#include <linux/moduleparam.h> 36#include <linux/netdevice.h> 37#include <linux/etherdevice.h> 38#include <linux/ethtool.h> 39#include <linux/mii.h> 40#include <linux/if_vlan.h> 41#include <linux/slab.h> 42#include <linux/crc32.h> 43#include <linux/in.h> 44#include <linux/ip.h> 45#include <linux/tcp.h> 46#include <linux/init.h> 47 48#include <asm/io.h> 49#include <asm/irq.h> 50#include <asm/byteorder.h> 51 52#include "nes.h" 53 54 55 56static u16 nes_read16_eeprom(void __iomem *addr, u16 offset); 57 58u32 mh_detected; 59u32 mh_pauses_sent; 60 61/** 62 * nes_read_eeprom_values - 63 */ 64int nes_read_eeprom_values(struct nes_device *nesdev, struct nes_adapter *nesadapter) 65{ 66 u32 mac_addr_low; 67 u16 mac_addr_high; 68 u16 eeprom_data; 69 u16 eeprom_offset; 70 u16 next_section_address; 71 u16 sw_section_ver; 72 u8 major_ver = 0; 73 u8 minor_ver = 0; 74 75 /* TODO: deal with EEPROM endian issues */ 76 if (nesadapter->firmware_eeprom_offset == 0) { 77 /* Read the EEPROM Parameters */ 78 eeprom_data = nes_read16_eeprom(nesdev->regs, 0); 79 nes_debug(NES_DBG_HW, "EEPROM Offset 0 = 0x%04X\n", eeprom_data); 80 eeprom_offset = 2 + (((eeprom_data & 0x007f) << 3) << 81 ((eeprom_data & 0x0080) >> 7)); 82 nes_debug(NES_DBG_HW, "Firmware Offset = 0x%04X\n", eeprom_offset); 83 nesadapter->firmware_eeprom_offset = eeprom_offset; 84 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4); 85 if (eeprom_data != 0x5746) { 86 nes_debug(NES_DBG_HW, "Not a valid Firmware Image = 0x%04X\n", eeprom_data); 87 return -1; 88 } 89 90 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); 91 nes_debug(NES_DBG_HW, "EEPROM Offset %u = 0x%04X\n", 92 eeprom_offset + 2, eeprom_data); 93 eeprom_offset += ((eeprom_data & 0x00ff) << 3) << ((eeprom_data & 0x0100) >> 8); 94 nes_debug(NES_DBG_HW, "Software Offset = 0x%04X\n", eeprom_offset); 95 nesadapter->software_eeprom_offset = eeprom_offset; 96 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4); 97 if (eeprom_data != 0x5753) { 98 printk("Not a valid Software Image = 0x%04X\n", eeprom_data); 99 return -1; 100 } 101 sw_section_ver = nes_read16_eeprom(nesdev->regs, nesadapter->software_eeprom_offset + 6); 102 nes_debug(NES_DBG_HW, "Software section version number = 0x%04X\n", 103 sw_section_ver); 104 105 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); 106 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", 107 eeprom_offset + 2, eeprom_data); 108 next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) << 109 ((eeprom_data & 0x0100) >> 8)); 110 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); 111 if (eeprom_data != 0x414d) { 112 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n", 113 eeprom_data); 114 goto no_fw_rev; 115 } 116 eeprom_offset = next_section_address; 117 118 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); 119 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", 120 eeprom_offset + 2, eeprom_data); 121 next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) << 122 ((eeprom_data & 0x0100) >> 8)); 123 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); 124 if (eeprom_data != 0x4f52) { 125 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x4f52 but was 0x%04X\n", 126 eeprom_data); 127 goto no_fw_rev; 128 } 129 eeprom_offset = next_section_address; 130 131 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); 132 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", 133 eeprom_offset + 2, eeprom_data); 134 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3); 135 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); 136 if (eeprom_data != 0x5746) { 137 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5746 but was 0x%04X\n", 138 eeprom_data); 139 goto no_fw_rev; 140 } 141 eeprom_offset = next_section_address; 142 143 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); 144 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", 145 eeprom_offset + 2, eeprom_data); 146 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3); 147 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); 148 if (eeprom_data != 0x5753) { 149 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5753 but was 0x%04X\n", 150 eeprom_data); 151 goto no_fw_rev; 152 } 153 eeprom_offset = next_section_address; 154 155 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); 156 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", 157 eeprom_offset + 2, eeprom_data); 158 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3); 159 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); 160 if (eeprom_data != 0x414d) { 161 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n", 162 eeprom_data); 163 goto no_fw_rev; 164 } 165 eeprom_offset = next_section_address; 166 167 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); 168 nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", 169 eeprom_offset + 2, eeprom_data); 170 next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3); 171 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); 172 if (eeprom_data != 0x464e) { 173 nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x464e but was 0x%04X\n", 174 eeprom_data); 175 goto no_fw_rev; 176 } 177 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 8); 178 printk(PFX "Firmware version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data); 179 major_ver = (u8)(eeprom_data >> 8); 180 minor_ver = (u8)(eeprom_data); 181 182 if (nes_drv_opt & NES_DRV_OPT_DISABLE_VIRT_WQ) { 183 nes_debug(NES_DBG_HW, "Virtual WQs have been disabled\n"); 184 } else if (((major_ver == 2) && (minor_ver > 21)) || ((major_ver > 2) && (major_ver != 255))) { 185 nesadapter->virtwq = 1; 186 } 187 if (((major_ver == 3) && (minor_ver >= 16)) || (major_ver > 3)) 188 nesadapter->send_term_ok = 1; 189 190 nesadapter->firmware_version = (((u32)(u8)(eeprom_data>>8)) << 16) + 191 (u32)((u8)eeprom_data); 192 193 eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 10); 194 printk(PFX "EEPROM version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data); 195 nesadapter->eeprom_version = (((u32)(u8)(eeprom_data>>8)) << 16) + 196 (u32)((u8)eeprom_data); 197 198no_fw_rev: 199 /* eeprom is valid */ 200 eeprom_offset = nesadapter->software_eeprom_offset; 201 eeprom_offset += 8; 202 nesadapter->netdev_max = (u8)nes_read16_eeprom(nesdev->regs, eeprom_offset); 203 eeprom_offset += 2; 204 mac_addr_high = nes_read16_eeprom(nesdev->regs, eeprom_offset); 205 eeprom_offset += 2; 206 mac_addr_low = (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset); 207 eeprom_offset += 2; 208 mac_addr_low <<= 16; 209 mac_addr_low += (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset); 210 nes_debug(NES_DBG_HW, "Base MAC Address = 0x%04X%08X\n", 211 mac_addr_high, mac_addr_low); 212 nes_debug(NES_DBG_HW, "MAC Address count = %u\n", nesadapter->netdev_max); 213 214 nesadapter->mac_addr_low = mac_addr_low; 215 nesadapter->mac_addr_high = mac_addr_high; 216 217 /* Read the Phy Type array */ 218 eeprom_offset += 10; 219 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 220 nesadapter->phy_type[0] = (u8)(eeprom_data >> 8); 221 nesadapter->phy_type[1] = (u8)eeprom_data; 222 223 /* Read the port array */ 224 eeprom_offset += 2; 225 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 226 nesadapter->phy_type[2] = (u8)(eeprom_data >> 8); 227 nesadapter->phy_type[3] = (u8)eeprom_data; 228 /* port_count is set by soft reset reg */ 229 nes_debug(NES_DBG_HW, "port_count = %u, port 0 -> %u, port 1 -> %u," 230 " port 2 -> %u, port 3 -> %u\n", 231 nesadapter->port_count, 232 nesadapter->phy_type[0], nesadapter->phy_type[1], 233 nesadapter->phy_type[2], nesadapter->phy_type[3]); 234 235 /* Read PD config array */ 236 eeprom_offset += 10; 237 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 238 nesadapter->pd_config_size[0] = eeprom_data; 239 eeprom_offset += 2; 240 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 241 nesadapter->pd_config_base[0] = eeprom_data; 242 nes_debug(NES_DBG_HW, "PD0 config, size=0x%04x, base=0x%04x\n", 243 nesadapter->pd_config_size[0], nesadapter->pd_config_base[0]); 244 245 eeprom_offset += 2; 246 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 247 nesadapter->pd_config_size[1] = eeprom_data; 248 eeprom_offset += 2; 249 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 250 nesadapter->pd_config_base[1] = eeprom_data; 251 nes_debug(NES_DBG_HW, "PD1 config, size=0x%04x, base=0x%04x\n", 252 nesadapter->pd_config_size[1], nesadapter->pd_config_base[1]); 253 254 eeprom_offset += 2; 255 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 256 nesadapter->pd_config_size[2] = eeprom_data; 257 eeprom_offset += 2; 258 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 259 nesadapter->pd_config_base[2] = eeprom_data; 260 nes_debug(NES_DBG_HW, "PD2 config, size=0x%04x, base=0x%04x\n", 261 nesadapter->pd_config_size[2], nesadapter->pd_config_base[2]); 262 263 eeprom_offset += 2; 264 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 265 nesadapter->pd_config_size[3] = eeprom_data; 266 eeprom_offset += 2; 267 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 268 nesadapter->pd_config_base[3] = eeprom_data; 269 nes_debug(NES_DBG_HW, "PD3 config, size=0x%04x, base=0x%04x\n", 270 nesadapter->pd_config_size[3], nesadapter->pd_config_base[3]); 271 272 /* Read Rx Pool Size */ 273 eeprom_offset += 22; /* 46 */ 274 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 275 eeprom_offset += 2; 276 nesadapter->rx_pool_size = (((u32)eeprom_data) << 16) + 277 nes_read16_eeprom(nesdev->regs, eeprom_offset); 278 nes_debug(NES_DBG_HW, "rx_pool_size = 0x%08X\n", nesadapter->rx_pool_size); 279 280 eeprom_offset += 2; 281 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 282 eeprom_offset += 2; 283 nesadapter->tx_pool_size = (((u32)eeprom_data) << 16) + 284 nes_read16_eeprom(nesdev->regs, eeprom_offset); 285 nes_debug(NES_DBG_HW, "tx_pool_size = 0x%08X\n", nesadapter->tx_pool_size); 286 287 eeprom_offset += 2; 288 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 289 eeprom_offset += 2; 290 nesadapter->rx_threshold = (((u32)eeprom_data) << 16) + 291 nes_read16_eeprom(nesdev->regs, eeprom_offset); 292 nes_debug(NES_DBG_HW, "rx_threshold = 0x%08X\n", nesadapter->rx_threshold); 293 294 eeprom_offset += 2; 295 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 296 eeprom_offset += 2; 297 nesadapter->tcp_timer_core_clk_divisor = (((u32)eeprom_data) << 16) + 298 nes_read16_eeprom(nesdev->regs, eeprom_offset); 299 nes_debug(NES_DBG_HW, "tcp_timer_core_clk_divisor = 0x%08X\n", 300 nesadapter->tcp_timer_core_clk_divisor); 301 302 eeprom_offset += 2; 303 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 304 eeprom_offset += 2; 305 nesadapter->iwarp_config = (((u32)eeprom_data) << 16) + 306 nes_read16_eeprom(nesdev->regs, eeprom_offset); 307 nes_debug(NES_DBG_HW, "iwarp_config = 0x%08X\n", nesadapter->iwarp_config); 308 309 eeprom_offset += 2; 310 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 311 eeprom_offset += 2; 312 nesadapter->cm_config = (((u32)eeprom_data) << 16) + 313 nes_read16_eeprom(nesdev->regs, eeprom_offset); 314 nes_debug(NES_DBG_HW, "cm_config = 0x%08X\n", nesadapter->cm_config); 315 316 eeprom_offset += 2; 317 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 318 eeprom_offset += 2; 319 nesadapter->sws_timer_config = (((u32)eeprom_data) << 16) + 320 nes_read16_eeprom(nesdev->regs, eeprom_offset); 321 nes_debug(NES_DBG_HW, "sws_timer_config = 0x%08X\n", nesadapter->sws_timer_config); 322 323 eeprom_offset += 2; 324 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 325 eeprom_offset += 2; 326 nesadapter->tcp_config1 = (((u32)eeprom_data) << 16) + 327 nes_read16_eeprom(nesdev->regs, eeprom_offset); 328 nes_debug(NES_DBG_HW, "tcp_config1 = 0x%08X\n", nesadapter->tcp_config1); 329 330 eeprom_offset += 2; 331 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 332 eeprom_offset += 2; 333 nesadapter->wqm_wat = (((u32)eeprom_data) << 16) + 334 nes_read16_eeprom(nesdev->regs, eeprom_offset); 335 nes_debug(NES_DBG_HW, "wqm_wat = 0x%08X\n", nesadapter->wqm_wat); 336 337 eeprom_offset += 2; 338 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 339 eeprom_offset += 2; 340 nesadapter->core_clock = (((u32)eeprom_data) << 16) + 341 nes_read16_eeprom(nesdev->regs, eeprom_offset); 342 nes_debug(NES_DBG_HW, "core_clock = 0x%08X\n", nesadapter->core_clock); 343 344 if ((sw_section_ver) && (nesadapter->hw_rev != NE020_REV)) { 345 eeprom_offset += 2; 346 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 347 nesadapter->phy_index[0] = (eeprom_data & 0xff00)>>8; 348 nesadapter->phy_index[1] = eeprom_data & 0x00ff; 349 eeprom_offset += 2; 350 eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); 351 nesadapter->phy_index[2] = (eeprom_data & 0xff00)>>8; 352 nesadapter->phy_index[3] = eeprom_data & 0x00ff; 353 } else { 354 nesadapter->phy_index[0] = 4; 355 nesadapter->phy_index[1] = 5; 356 nesadapter->phy_index[2] = 6; 357 nesadapter->phy_index[3] = 7; 358 } 359 nes_debug(NES_DBG_HW, "Phy address map = 0 > %u, 1 > %u, 2 > %u, 3 > %u\n", 360 nesadapter->phy_index[0],nesadapter->phy_index[1], 361 nesadapter->phy_index[2],nesadapter->phy_index[3]); 362 } 363 364 return 0; 365} 366 367 368/** 369 * nes_read16_eeprom 370 */ 371static u16 nes_read16_eeprom(void __iomem *addr, u16 offset) 372{ 373 writel(NES_EEPROM_READ_REQUEST + (offset >> 1), 374 (void __iomem *)addr + NES_EEPROM_COMMAND); 375 376 do { 377 } while (readl((void __iomem *)addr + NES_EEPROM_COMMAND) & 378 NES_EEPROM_READ_REQUEST); 379 380 return readw((void __iomem *)addr + NES_EEPROM_DATA); 381} 382 383 384/** 385 * nes_write_1G_phy_reg 386 */ 387void nes_write_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 data) 388{ 389 u32 u32temp; 390 u32 counter; 391 392 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, 393 0x50020000 | data | ((u32)phy_reg << 18) | ((u32)phy_addr << 23)); 394 for (counter = 0; counter < 100 ; counter++) { 395 udelay(30); 396 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); 397 if (u32temp & 1) { 398 /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */ 399 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); 400 break; 401 } 402 } 403 if (!(u32temp & 1)) 404 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", 405 u32temp); 406} 407 408 409/** 410 * nes_read_1G_phy_reg 411 * This routine only issues the read, the data must be read 412 * separately. 413 */ 414void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 *data) 415{ 416 u32 u32temp; 417 u32 counter; 418 419 /* nes_debug(NES_DBG_PHY, "phy addr = %d, mac_index = %d\n", 420 phy_addr, nesdev->mac_index); */ 421 422 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, 423 0x60020000 | ((u32)phy_reg << 18) | ((u32)phy_addr << 23)); 424 for (counter = 0; counter < 100 ; counter++) { 425 udelay(30); 426 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); 427 if (u32temp & 1) { 428 /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */ 429 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); 430 break; 431 } 432 } 433 if (!(u32temp & 1)) { 434 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", 435 u32temp); 436 *data = 0xffff; 437 } else { 438 *data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 439 } 440} 441 442 443/** 444 * nes_write_10G_phy_reg 445 */ 446void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_addr, u8 dev_addr, u16 phy_reg, 447 u16 data) 448{ 449 u32 port_addr; 450 u32 u32temp; 451 u32 counter; 452 453 port_addr = phy_addr; 454 455 /* set address */ 456 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, 457 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); 458 for (counter = 0; counter < 100 ; counter++) { 459 udelay(30); 460 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); 461 if (u32temp & 1) { 462 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); 463 break; 464 } 465 } 466 if (!(u32temp & 1)) 467 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", 468 u32temp); 469 470 /* set data */ 471 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, 472 0x10020000 | (u32)data | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); 473 for (counter = 0; counter < 100 ; counter++) { 474 udelay(30); 475 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); 476 if (u32temp & 1) { 477 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); 478 break; 479 } 480 } 481 if (!(u32temp & 1)) 482 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", 483 u32temp); 484} 485 486 487/** 488 * nes_read_10G_phy_reg 489 * This routine only issues the read, the data must be read 490 * separately. 491 */ 492void nes_read_10G_phy_reg(struct nes_device *nesdev, u8 phy_addr, u8 dev_addr, u16 phy_reg) 493{ 494 u32 port_addr; 495 u32 u32temp; 496 u32 counter; 497 498 port_addr = phy_addr; 499 500 /* set address */ 501 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, 502 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); 503 for (counter = 0; counter < 100 ; counter++) { 504 udelay(30); 505 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); 506 if (u32temp & 1) { 507 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); 508 break; 509 } 510 } 511 if (!(u32temp & 1)) 512 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", 513 u32temp); 514 515 /* issue read */ 516 nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, 517 0x30020000 | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); 518 for (counter = 0; counter < 100 ; counter++) { 519 udelay(30); 520 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); 521 if (u32temp & 1) { 522 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); 523 break; 524 } 525 } 526 if (!(u32temp & 1)) 527 nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", 528 u32temp); 529} 530 531 532/** 533 * nes_get_cqp_request 534 */ 535struct nes_cqp_request *nes_get_cqp_request(struct nes_device *nesdev) 536{ 537 unsigned long flags; 538 struct nes_cqp_request *cqp_request = NULL; 539 540 if (!list_empty(&nesdev->cqp_avail_reqs)) { 541 spin_lock_irqsave(&nesdev->cqp.lock, flags); 542 if (!list_empty(&nesdev->cqp_avail_reqs)) { 543 cqp_request = list_entry(nesdev->cqp_avail_reqs.next, 544 struct nes_cqp_request, list); 545 list_del_init(&cqp_request->list); 546 } 547 spin_unlock_irqrestore(&nesdev->cqp.lock, flags); 548 } 549 if (cqp_request == NULL) { 550 cqp_request = kzalloc(sizeof(struct nes_cqp_request), GFP_ATOMIC); 551 if (cqp_request) { 552 cqp_request->dynamic = 1; 553 INIT_LIST_HEAD(&cqp_request->list); 554 } 555 } 556 557 if (cqp_request) { 558 init_waitqueue_head(&cqp_request->waitq); 559 cqp_request->waiting = 0; 560 cqp_request->request_done = 0; 561 cqp_request->callback = 0; 562 init_waitqueue_head(&cqp_request->waitq); 563 nes_debug(NES_DBG_CQP, "Got cqp request %p from the available list \n", 564 cqp_request); 565 } else 566 printk(KERN_ERR PFX "%s: Could not allocated a CQP request.\n", 567 __func__); 568 569 return cqp_request; 570} 571 572void nes_free_cqp_request(struct nes_device *nesdev, 573 struct nes_cqp_request *cqp_request) 574{ 575 unsigned long flags; 576 577 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n", 578 cqp_request, 579 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f); 580 581 if (cqp_request->dynamic) { 582 kfree(cqp_request); 583 } else { 584 spin_lock_irqsave(&nesdev->cqp.lock, flags); 585 list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); 586 spin_unlock_irqrestore(&nesdev->cqp.lock, flags); 587 } 588} 589 590void nes_put_cqp_request(struct nes_device *nesdev, 591 struct nes_cqp_request *cqp_request) 592{ 593 if (atomic_dec_and_test(&cqp_request->refcount)) 594 nes_free_cqp_request(nesdev, cqp_request); 595} 596 597/** 598 * nes_post_cqp_request 599 */ 600void nes_post_cqp_request(struct nes_device *nesdev, 601 struct nes_cqp_request *cqp_request) 602{ 603 struct nes_hw_cqp_wqe *cqp_wqe; 604 unsigned long flags; 605 u32 cqp_head; 606 u64 u64temp; 607 608 spin_lock_irqsave(&nesdev->cqp.lock, flags); 609 610 if (((((nesdev->cqp.sq_tail+(nesdev->cqp.sq_size*2))-nesdev->cqp.sq_head) & 611 (nesdev->cqp.sq_size - 1)) != 1) 612 && (list_empty(&nesdev->cqp_pending_reqs))) { 613 cqp_head = nesdev->cqp.sq_head++; 614 nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1; 615 cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head]; 616 memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe)); 617 barrier(); 618 u64temp = (unsigned long)cqp_request; 619 set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_COMP_SCRATCH_LOW_IDX, 620 u64temp); 621 nes_debug(NES_DBG_CQP, "CQP request (opcode 0x%02X), line 1 = 0x%08X put on CQPs SQ," 622 " request = %p, cqp_head = %u, cqp_tail = %u, cqp_size = %u," 623 " waiting = %d, refcount = %d.\n", 624 le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f, 625 le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX]), cqp_request, 626 nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size, 627 cqp_request->waiting, atomic_read(&cqp_request->refcount)); 628 barrier(); 629 630 /* Ring doorbell (1 WQEs) */ 631 nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id); 632 633 barrier(); 634 } else { 635 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X), line 1 = 0x%08X" 636 " put on the pending queue.\n", 637 cqp_request, 638 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f, 639 le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_ID_IDX])); 640 list_add_tail(&cqp_request->list, &nesdev->cqp_pending_reqs); 641 } 642 643 spin_unlock_irqrestore(&nesdev->cqp.lock, flags); 644 645 return; 646} 647 648 649/** 650 * nes_arp_table 651 */ 652int nes_arp_table(struct nes_device *nesdev, u32 ip_addr, u8 *mac_addr, u32 action) 653{ 654 struct nes_adapter *nesadapter = nesdev->nesadapter; 655 int arp_index; 656 int err = 0; 657 __be32 tmp_addr; 658 659 for (arp_index = 0; (u32) arp_index < nesadapter->arp_table_size; arp_index++) { 660 if (nesadapter->arp_table[arp_index].ip_addr == ip_addr) 661 break; 662 } 663 664 if (action == NES_ARP_ADD) { 665 if (arp_index != nesadapter->arp_table_size) { 666 return -1; 667 } 668 669 arp_index = 0; 670 err = nes_alloc_resource(nesadapter, nesadapter->allocated_arps, 671 nesadapter->arp_table_size, (u32 *)&arp_index, &nesadapter->next_arp_index); 672 if (err) { 673 nes_debug(NES_DBG_NETDEV, "nes_alloc_resource returned error = %u\n", err); 674 return err; 675 } 676 nes_debug(NES_DBG_NETDEV, "ADD, arp_index=%d\n", arp_index); 677 678 nesadapter->arp_table[arp_index].ip_addr = ip_addr; 679 memcpy(nesadapter->arp_table[arp_index].mac_addr, mac_addr, ETH_ALEN); 680 return arp_index; 681 } 682 683 /* DELETE or RESOLVE */ 684 if (arp_index == nesadapter->arp_table_size) { 685 tmp_addr = cpu_to_be32(ip_addr); 686 nes_debug(NES_DBG_NETDEV, "MAC for %pI4 not in ARP table - cannot %s\n", 687 &tmp_addr, action == NES_ARP_RESOLVE ? "resolve" : "delete"); 688 return -1; 689 } 690 691 if (action == NES_ARP_RESOLVE) { 692 nes_debug(NES_DBG_NETDEV, "RESOLVE, arp_index=%d\n", arp_index); 693 return arp_index; 694 } 695 696 if (action == NES_ARP_DELETE) { 697 nes_debug(NES_DBG_NETDEV, "DELETE, arp_index=%d\n", arp_index); 698 nesadapter->arp_table[arp_index].ip_addr = 0; 699 memset(nesadapter->arp_table[arp_index].mac_addr, 0x00, ETH_ALEN); 700 nes_free_resource(nesadapter, nesadapter->allocated_arps, arp_index); 701 return arp_index; 702 } 703 704 return -1; 705} 706 707 708/** 709 * nes_mh_fix 710 */ 711void nes_mh_fix(unsigned long parm) 712{ 713 unsigned long flags; 714 struct nes_device *nesdev = (struct nes_device *)parm; 715 struct nes_adapter *nesadapter = nesdev->nesadapter; 716 struct nes_vnic *nesvnic; 717 u32 used_chunks_tx; 718 u32 temp_used_chunks_tx; 719 u32 temp_last_used_chunks_tx; 720 u32 used_chunks_mask; 721 u32 mac_tx_frames_low; 722 u32 mac_tx_frames_high; 723 u32 mac_tx_pauses; 724 u32 serdes_status; 725 u32 reset_value; 726 u32 tx_control; 727 u32 tx_config; 728 u32 tx_pause_quanta; 729 u32 rx_control; 730 u32 rx_config; 731 u32 mac_exact_match; 732 u32 mpp_debug; 733 u32 i=0; 734 u32 chunks_tx_progress = 0; 735 736 spin_lock_irqsave(&nesadapter->phy_lock, flags); 737 if ((nesadapter->mac_sw_state[0] != NES_MAC_SW_IDLE) || (nesadapter->mac_link_down[0])) { 738 spin_unlock_irqrestore(&nesadapter->phy_lock, flags); 739 goto no_mh_work; 740 } 741 nesadapter->mac_sw_state[0] = NES_MAC_SW_MH; 742 spin_unlock_irqrestore(&nesadapter->phy_lock, flags); 743 do { 744 mac_tx_frames_low = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_LOW); 745 mac_tx_frames_high = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_HIGH); 746 mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES); 747 used_chunks_tx = nes_read_indexed(nesdev, NES_IDX_USED_CHUNKS_TX); 748 nesdev->mac_pause_frames_sent += mac_tx_pauses; 749 used_chunks_mask = 0; 750 temp_used_chunks_tx = used_chunks_tx; 751 temp_last_used_chunks_tx = nesdev->last_used_chunks_tx; 752 753 if (nesdev->netdev[0]) { 754 nesvnic = netdev_priv(nesdev->netdev[0]); 755 } else { 756 break; 757 } 758 759 for (i=0; i<4; i++) { 760 used_chunks_mask <<= 8; 761 if (nesvnic->qp_nic_index[i] != 0xff) { 762 used_chunks_mask |= 0xff; 763 if ((temp_used_chunks_tx&0xff)<(temp_last_used_chunks_tx&0xff)) { 764 chunks_tx_progress = 1; 765 } 766 } 767 temp_used_chunks_tx >>= 8; 768 temp_last_used_chunks_tx >>= 8; 769 } 770 if ((mac_tx_frames_low) || (mac_tx_frames_high) || 771 (!(used_chunks_tx&used_chunks_mask)) || 772 (!(nesdev->last_used_chunks_tx&used_chunks_mask)) || 773 (chunks_tx_progress) ) { 774 nesdev->last_used_chunks_tx = used_chunks_tx; 775 break; 776 } 777 nesdev->last_used_chunks_tx = used_chunks_tx; 778 barrier(); 779 780 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000005); 781 mh_pauses_sent++; 782 mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES); 783 if (mac_tx_pauses) { 784 nesdev->mac_pause_frames_sent += mac_tx_pauses; 785 break; 786 } 787 788 tx_control = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONTROL); 789 tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG); 790 tx_pause_quanta = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA); 791 rx_control = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONTROL); 792 rx_config = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONFIG); 793 mac_exact_match = nes_read_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM); 794 mpp_debug = nes_read_indexed(nesdev, NES_IDX_MPP_DEBUG); 795 796 /* one last ditch effort to avoid a false positive */ 797 mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES); 798 if (mac_tx_pauses) { 799 nesdev->last_mac_tx_pauses = nesdev->mac_pause_frames_sent; 800 nes_debug(NES_DBG_HW, "failsafe caught slow outbound pause\n"); 801 break; 802 } 803 mh_detected++; 804 805 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000000); 806 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, 0x00000000); 807 reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET); 808 809 nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value | 0x0000001d); 810 811 while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET) 812 & 0x00000040) != 0x00000040) && (i++ < 5000)) { 813 /* mdelay(1); */ 814 } 815 816 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, 0x00000008); 817 serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0); 818 819 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP0, 0x000bdef7); 820 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_DRIVE0, 0x9ce73000); 821 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_MODE0, 0x0ff00000); 822 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_SIGDET0, 0x00000000); 823 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_BYPASS0, 0x00000000); 824 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_LOOPBACK_CONTROL0, 0x00000000); 825 if (nesadapter->OneG_Mode) { 826 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0182222); 827 } else { 828 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0042222); 829 } 830 serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_STATUS0); 831 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000ff); 832 833 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, tx_control); 834 nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config); 835 nes_write_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA, tx_pause_quanta); 836 nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONTROL, rx_control); 837 nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONFIG, rx_config); 838 nes_write_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM, mac_exact_match); 839 nes_write_indexed(nesdev, NES_IDX_MPP_DEBUG, mpp_debug); 840 841 } while (0); 842 843 nesadapter->mac_sw_state[0] = NES_MAC_SW_IDLE; 844no_mh_work: 845 nesdev->nesadapter->mh_timer.expires = jiffies + (HZ/5); 846 add_timer(&nesdev->nesadapter->mh_timer); 847} 848 849/** 850 * nes_clc 851 */ 852void nes_clc(unsigned long parm) 853{ 854 unsigned long flags; 855 struct nes_device *nesdev = (struct nes_device *)parm; 856 struct nes_adapter *nesadapter = nesdev->nesadapter; 857 858 spin_lock_irqsave(&nesadapter->phy_lock, flags); 859 nesadapter->link_interrupt_count[0] = 0; 860 nesadapter->link_interrupt_count[1] = 0; 861 nesadapter->link_interrupt_count[2] = 0; 862 nesadapter->link_interrupt_count[3] = 0; 863 spin_unlock_irqrestore(&nesadapter->phy_lock, flags); 864 865 nesadapter->lc_timer.expires = jiffies + 3600 * HZ; /* 1 hour */ 866 add_timer(&nesadapter->lc_timer); 867} 868 869 870/** 871 * nes_dump_mem 872 */ 873void nes_dump_mem(unsigned int dump_debug_level, void *addr, int length) 874{ 875 char xlate[] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 876 'a', 'b', 'c', 'd', 'e', 'f'}; 877 char *ptr; 878 char hex_buf[80]; 879 char ascii_buf[20]; 880 int num_char; 881 int num_ascii; 882 int num_hex; 883 884 if (!(nes_debug_level & dump_debug_level)) { 885 return; 886 } 887 888 ptr = addr; 889 if (length > 0x100) { 890 nes_debug(dump_debug_level, "Length truncated from %x to %x\n", length, 0x100); 891 length = 0x100; 892 } 893 nes_debug(dump_debug_level, "Address=0x%p, length=0x%x (%d)\n", ptr, length, length); 894 895 memset(ascii_buf, 0, 20); 896 memset(hex_buf, 0, 80); 897 898 num_ascii = 0; 899 num_hex = 0; 900 for (num_char = 0; num_char < length; num_char++) { 901 if (num_ascii == 8) { 902 ascii_buf[num_ascii++] = ' '; 903 hex_buf[num_hex++] = '-'; 904 hex_buf[num_hex++] = ' '; 905 } 906 907 if (*ptr < 0x20 || *ptr > 0x7e) 908 ascii_buf[num_ascii++] = '.'; 909 else 910 ascii_buf[num_ascii++] = *ptr; 911 hex_buf[num_hex++] = xlate[((*ptr & 0xf0) >> 4)]; 912 hex_buf[num_hex++] = xlate[*ptr & 0x0f]; 913 hex_buf[num_hex++] = ' '; 914 ptr++; 915 916 if (num_ascii >= 17) { 917 /* output line and reset */ 918 nes_debug(dump_debug_level, " %s | %s\n", hex_buf, ascii_buf); 919 memset(ascii_buf, 0, 20); 920 memset(hex_buf, 0, 80); 921 num_ascii = 0; 922 num_hex = 0; 923 } 924 } 925 926 /* output the rest */ 927 if (num_ascii) { 928 while (num_ascii < 17) { 929 if (num_ascii == 8) { 930 hex_buf[num_hex++] = ' '; 931 hex_buf[num_hex++] = ' '; 932 } 933 hex_buf[num_hex++] = ' '; 934 hex_buf[num_hex++] = ' '; 935 hex_buf[num_hex++] = ' '; 936 num_ascii++; 937 } 938 939 nes_debug(dump_debug_level, " %s | %s\n", hex_buf, ascii_buf); 940 } 941} 942