• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/infiniband/hw/ehca/
1/*
2 *  IBM eServer eHCA Infiniband device driver for Linux on POWER
3 *
4 *  Struct definition for eHCA internal structures
5 *
6 *  Authors: Heiko J Schick <schickhj@de.ibm.com>
7 *           Christoph Raisch <raisch@de.ibm.com>
8 *           Joachim Fenkes <fenkes@de.ibm.com>
9 *
10 *  Copyright (c) 2005 IBM Corporation
11 *
12 *  All rights reserved.
13 *
14 *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
15 *  BSD.
16 *
17 * OpenIB BSD License
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions are met:
21 *
22 * Redistributions of source code must retain the above copyright notice, this
23 * list of conditions and the following disclaimer.
24 *
25 * Redistributions in binary form must reproduce the above copyright notice,
26 * this list of conditions and the following disclaimer in the documentation
27 * and/or other materials
28 * provided with the distribution.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
34 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
37 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
38 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 * POSSIBILITY OF SUCH DAMAGE.
41 */
42
43#ifndef __EHCA_CLASSES_H__
44#define __EHCA_CLASSES_H__
45
46struct ehca_module;
47struct ehca_qp;
48struct ehca_cq;
49struct ehca_eq;
50struct ehca_mr;
51struct ehca_mw;
52struct ehca_pd;
53struct ehca_av;
54
55#include <linux/wait.h>
56#include <linux/mutex.h>
57
58#include <rdma/ib_verbs.h>
59#include <rdma/ib_user_verbs.h>
60
61#ifdef CONFIG_PPC64
62#include "ehca_classes_pSeries.h"
63#endif
64#include "ipz_pt_fn.h"
65#include "ehca_qes.h"
66#include "ehca_irq.h"
67
68#define EHCA_EQE_CACHE_SIZE 20
69#define EHCA_MAX_NUM_QUEUES 0xffff
70
71struct ehca_eqe_cache_entry {
72	struct ehca_eqe *eqe;
73	struct ehca_cq *cq;
74};
75
76struct ehca_eq {
77	u32 length;
78	struct ipz_queue ipz_queue;
79	struct ipz_eq_handle ipz_eq_handle;
80	struct work_struct work;
81	struct h_galpas galpas;
82	int is_initialized;
83	struct ehca_pfeq pf;
84	spinlock_t spinlock;
85	struct tasklet_struct interrupt_task;
86	u32 ist;
87	spinlock_t irq_spinlock;
88	struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
89};
90
91struct ehca_sma_attr {
92	u16 lid, lmc, sm_sl, sm_lid;
93	u16 pkey_tbl_len, pkeys[16];
94};
95
96struct ehca_sport {
97	struct ib_cq *ibcq_aqp1;
98	struct ib_qp *ibqp_sqp[2];
99	/* lock to serialze modify_qp() calls for sqp in normal
100	 * and irq path (when event PORT_ACTIVE is received first time)
101	 */
102	spinlock_t mod_sqp_lock;
103	enum ib_port_state port_state;
104	struct ehca_sma_attr saved_attr;
105	u32 pma_qp_nr;
106};
107
108#define HCA_CAP_MR_PGSIZE_4K  0x80000000
109#define HCA_CAP_MR_PGSIZE_64K 0x40000000
110#define HCA_CAP_MR_PGSIZE_1M  0x20000000
111#define HCA_CAP_MR_PGSIZE_16M 0x10000000
112
113struct ehca_shca {
114	struct ib_device ib_device;
115	struct platform_device *ofdev;
116	u8 num_ports;
117	int hw_level;
118	struct list_head shca_list;
119	struct ipz_adapter_handle ipz_hca_handle;
120	struct ehca_sport sport[2];
121	struct ehca_eq eq;
122	struct ehca_eq neq;
123	struct ehca_mr *maxmr;
124	struct ehca_pd *pd;
125	struct h_galpas galpas;
126	struct mutex modify_mutex;
127	u64 hca_cap;
128	/* MR pgsize: bit 0-3 means 4K, 64K, 1M, 16M respectively */
129	u32 hca_cap_mr_pgsize;
130	int max_mtu;
131	int max_num_qps;
132	int max_num_cqs;
133	atomic_t num_cqs;
134	atomic_t num_qps;
135};
136
137struct ehca_pd {
138	struct ib_pd ib_pd;
139	struct ipz_pd fw_pd;
140	/* small queue mgmt */
141	struct mutex lock;
142	struct list_head free[2];
143	struct list_head full[2];
144};
145
146enum ehca_ext_qp_type {
147	EQPT_NORMAL    = 0,
148	EQPT_LLQP      = 1,
149	EQPT_SRQBASE   = 2,
150	EQPT_SRQ       = 3,
151};
152
153/* struct to cache modify_qp()'s parms for GSI/SMI qp */
154struct ehca_mod_qp_parm {
155	int mask;
156	struct ib_qp_attr attr;
157};
158
159#define EHCA_MOD_QP_PARM_MAX 4
160
161#define QMAP_IDX_MASK 0xFFFFULL
162
163/* struct for tracking if cqes have been reported to the application */
164struct ehca_qmap_entry {
165	u16 app_wr_id;
166	u8 reported;
167	u8 cqe_req;
168};
169
170struct ehca_queue_map {
171	struct ehca_qmap_entry *map;
172	unsigned int entries;
173	unsigned int tail;
174	unsigned int left_to_poll;
175	unsigned int next_wqe_idx;   /* Idx to first wqe to be flushed */
176};
177
178/* function to calculate the next index for the qmap */
179static inline unsigned int next_index(unsigned int cur_index, unsigned int limit)
180{
181	unsigned int temp = cur_index + 1;
182	return (temp == limit) ? 0 : temp;
183}
184
185struct ehca_qp {
186	union {
187		struct ib_qp ib_qp;
188		struct ib_srq ib_srq;
189	};
190	u32 qp_type;
191	enum ehca_ext_qp_type ext_type;
192	enum ib_qp_state state;
193	struct ipz_queue ipz_squeue;
194	struct ehca_queue_map sq_map;
195	struct ipz_queue ipz_rqueue;
196	struct ehca_queue_map rq_map;
197	struct h_galpas galpas;
198	u32 qkey;
199	u32 real_qp_num;
200	u32 token;
201	spinlock_t spinlock_s;
202	spinlock_t spinlock_r;
203	u32 sq_max_inline_data_size;
204	struct ipz_qp_handle ipz_qp_handle;
205	struct ehca_pfqp pf;
206	struct ib_qp_init_attr init_attr;
207	struct ehca_cq *send_cq;
208	struct ehca_cq *recv_cq;
209	unsigned int sqerr_purgeflag;
210	struct hlist_node list_entries;
211	/* array to cache modify_qp()'s parms for GSI/SMI qp */
212	struct ehca_mod_qp_parm *mod_qp_parm;
213	int mod_qp_parm_idx;
214	/* mmap counter for resources mapped into user space */
215	u32 mm_count_squeue;
216	u32 mm_count_rqueue;
217	u32 mm_count_galpa;
218	/* unsolicited ack circumvention */
219	int unsol_ack_circ;
220	int mtu_shift;
221	u32 message_count;
222	u32 packet_count;
223	atomic_t nr_events; /* events seen */
224	wait_queue_head_t wait_completion;
225	int mig_armed;
226	struct list_head sq_err_node;
227	struct list_head rq_err_node;
228};
229
230#define IS_SRQ(qp) (qp->ext_type == EQPT_SRQ)
231#define HAS_SQ(qp) (qp->ext_type != EQPT_SRQ)
232#define HAS_RQ(qp) (qp->ext_type != EQPT_SRQBASE)
233
234/* must be power of 2 */
235#define QP_HASHTAB_LEN 8
236
237struct ehca_cq {
238	struct ib_cq ib_cq;
239	struct ipz_queue ipz_queue;
240	struct h_galpas galpas;
241	spinlock_t spinlock;
242	u32 cq_number;
243	u32 token;
244	u32 nr_of_entries;
245	struct ipz_cq_handle ipz_cq_handle;
246	struct ehca_pfcq pf;
247	spinlock_t cb_lock;
248	struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
249	struct list_head entry;
250	u32 nr_callbacks;   /* #events assigned to cpu by scaling code */
251	atomic_t nr_events; /* #events seen */
252	wait_queue_head_t wait_completion;
253	spinlock_t task_lock;
254	/* mmap counter for resources mapped into user space */
255	u32 mm_count_queue;
256	u32 mm_count_galpa;
257	struct list_head sqp_err_list;
258	struct list_head rqp_err_list;
259};
260
261enum ehca_mr_flag {
262	EHCA_MR_FLAG_FMR = 0x80000000,	 /* FMR, created with ehca_alloc_fmr */
263	EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR                           */
264};
265
266struct ehca_mr {
267	union {
268		struct ib_mr ib_mr;	/* must always be first in ehca_mr */
269		struct ib_fmr ib_fmr;	/* must always be first in ehca_mr */
270	} ib;
271	struct ib_umem *umem;
272	spinlock_t mrlock;
273
274	enum ehca_mr_flag flags;
275	u32 num_kpages;		/* number of kernel pages */
276	u32 num_hwpages;	/* number of hw pages to form MR */
277	u64 hwpage_size;	/* hw page size used for this MR */
278	int acl;		/* ACL (stored here for usage in reregister) */
279	u64 *start;		/* virtual start address (stored here for */
280				/* usage in reregister) */
281	u64 size;		/* size (stored here for usage in reregister) */
282	u32 fmr_page_size;	/* page size for FMR */
283	u32 fmr_max_pages;	/* max pages for FMR */
284	u32 fmr_max_maps;	/* max outstanding maps for FMR */
285	u32 fmr_map_cnt;	/* map counter for FMR */
286	/* fw specific data */
287	struct ipz_mrmw_handle ipz_mr_handle;	/* MR handle for h-calls */
288	struct h_galpas galpas;
289};
290
291struct ehca_mw {
292	struct ib_mw ib_mw;	/* gen2 mw, must always be first in ehca_mw */
293	spinlock_t mwlock;
294
295	u8 never_bound;		/* indication MW was never bound */
296	struct ipz_mrmw_handle ipz_mw_handle;	/* MW handle for h-calls */
297	struct h_galpas galpas;
298};
299
300enum ehca_mr_pgi_type {
301	EHCA_MR_PGI_PHYS   = 1,  /* type of ehca_reg_phys_mr,
302				  * ehca_rereg_phys_mr,
303				  * ehca_reg_internal_maxmr */
304	EHCA_MR_PGI_USER   = 2,  /* type of ehca_reg_user_mr */
305	EHCA_MR_PGI_FMR    = 3   /* type of ehca_map_phys_fmr */
306};
307
308struct ehca_mr_pginfo {
309	enum ehca_mr_pgi_type type;
310	u64 num_kpages;
311	u64 kpage_cnt;
312	u64 hwpage_size;     /* hw page size used for this MR */
313	u64 num_hwpages;     /* number of hw pages */
314	u64 hwpage_cnt;      /* counter for hw pages */
315	u64 next_hwpage;     /* next hw page in buffer/chunk/listelem */
316
317	union {
318		struct { /* type EHCA_MR_PGI_PHYS section */
319			int num_phys_buf;
320			struct ib_phys_buf *phys_buf_array;
321			u64 next_buf;
322		} phy;
323		struct { /* type EHCA_MR_PGI_USER section */
324			struct ib_umem *region;
325			struct ib_umem_chunk *next_chunk;
326			u64 next_nmap;
327		} usr;
328		struct { /* type EHCA_MR_PGI_FMR section */
329			u64 fmr_pgsize;
330			u64 *page_list;
331			u64 next_listelem;
332		} fmr;
333	} u;
334};
335
336/* output parameters for MR/FMR hipz calls */
337struct ehca_mr_hipzout_parms {
338	struct ipz_mrmw_handle handle;
339	u32 lkey;
340	u32 rkey;
341	u64 len;
342	u64 vaddr;
343	u32 acl;
344};
345
346/* output parameters for MW hipz calls */
347struct ehca_mw_hipzout_parms {
348	struct ipz_mrmw_handle handle;
349	u32 rkey;
350};
351
352struct ehca_av {
353	struct ib_ah ib_ah;
354	struct ehca_ud_av av;
355};
356
357struct ehca_ucontext {
358	struct ib_ucontext ib_ucontext;
359};
360
361int ehca_init_pd_cache(void);
362void ehca_cleanup_pd_cache(void);
363int ehca_init_cq_cache(void);
364void ehca_cleanup_cq_cache(void);
365int ehca_init_qp_cache(void);
366void ehca_cleanup_qp_cache(void);
367int ehca_init_av_cache(void);
368void ehca_cleanup_av_cache(void);
369int ehca_init_mrmw_cache(void);
370void ehca_cleanup_mrmw_cache(void);
371int ehca_init_small_qp_cache(void);
372void ehca_cleanup_small_qp_cache(void);
373
374extern rwlock_t ehca_qp_idr_lock;
375extern rwlock_t ehca_cq_idr_lock;
376extern struct idr ehca_qp_idr;
377extern struct idr ehca_cq_idr;
378extern spinlock_t shca_list_lock;
379
380extern int ehca_static_rate;
381extern int ehca_port_act_time;
382extern int ehca_use_hp_mr;
383extern int ehca_scaling_code;
384extern int ehca_lock_hcalls;
385extern int ehca_nr_ports;
386extern int ehca_max_cq;
387extern int ehca_max_qp;
388
389struct ipzu_queue_resp {
390	u32 qe_size;      /* queue entry size */
391	u32 act_nr_of_sg;
392	u32 queue_length; /* queue length allocated in bytes */
393	u32 pagesize;
394	u32 toggle_state;
395	u32 offset; /* save offset within a page for small_qp */
396};
397
398struct ehca_create_cq_resp {
399	u32 cq_number;
400	u32 token;
401	struct ipzu_queue_resp ipz_queue;
402	u32 fw_handle_ofs;
403	u32 dummy;
404};
405
406struct ehca_create_qp_resp {
407	u32 qp_num;
408	u32 token;
409	u32 qp_type;
410	u32 ext_type;
411	u32 qkey;
412	/* qp_num assigned by ehca: sqp0/1 may have got different numbers */
413	u32 real_qp_num;
414	u32 fw_handle_ofs;
415	u32 dummy;
416	struct ipzu_queue_resp ipz_squeue;
417	struct ipzu_queue_resp ipz_rqueue;
418};
419
420struct ehca_alloc_cq_parms {
421	u32 nr_cqe;
422	u32 act_nr_of_entries;
423	u32 act_pages;
424	struct ipz_eq_handle eq_handle;
425};
426
427enum ehca_service_type {
428	ST_RC  = 0,
429	ST_UC  = 1,
430	ST_RD  = 2,
431	ST_UD  = 3,
432};
433
434enum ehca_ll_comp_flags {
435	LLQP_SEND_COMP = 0x20,
436	LLQP_RECV_COMP = 0x40,
437	LLQP_COMP_MASK = 0x60,
438};
439
440struct ehca_alloc_queue_parms {
441	/* input parameters */
442	int max_wr;
443	int max_sge;
444	int page_size;
445	int is_small;
446
447	/* output parameters */
448	u16 act_nr_wqes;
449	u8  act_nr_sges;
450	u32 queue_size; /* bytes for small queues, pages otherwise */
451};
452
453struct ehca_alloc_qp_parms {
454	struct ehca_alloc_queue_parms squeue;
455	struct ehca_alloc_queue_parms rqueue;
456
457	/* input parameters */
458	enum ehca_service_type servicetype;
459	int qp_storage;
460	int sigtype;
461	enum ehca_ext_qp_type ext_type;
462	enum ehca_ll_comp_flags ll_comp_flags;
463	int ud_av_l_key_ctl;
464
465	u32 token;
466	struct ipz_eq_handle eq_handle;
467	struct ipz_pd pd;
468	struct ipz_cq_handle send_cq_handle, recv_cq_handle;
469
470	u32 srq_qpn, srq_token, srq_limit;
471
472	/* output parameters */
473	u32 real_qp_num;
474	struct ipz_qp_handle qp_handle;
475	struct h_galpas galpas;
476};
477
478int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp);
479int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
480struct ehca_qp *ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);
481
482#endif
483