• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/ide/
1/*
2 * Copyright (C) 2002 Toshiba Corporation
3 * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
4 *
5 * This file is licensed under the terms of the GNU General Public
6 * License version 2.  This program is licensed "as is" without any
7 * warranty of any kind, whether express or implied.
8 */
9
10#include <linux/types.h>
11#include <linux/pci.h>
12#include <linux/ide.h>
13
14#define DRV_NAME "tc86c001"
15
16static void tc86c001_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
17{
18	unsigned long scr_port	= hwif->config_data + (drive->dn ? 0x02 : 0x00);
19	u16 mode, scr		= inw(scr_port);
20	const u8 speed		= drive->dma_mode;
21
22	switch (speed) {
23	case XFER_UDMA_4:	mode = 0x00c0; break;
24	case XFER_UDMA_3:	mode = 0x00b0; break;
25	case XFER_UDMA_2:	mode = 0x00a0; break;
26	case XFER_UDMA_1:	mode = 0x0090; break;
27	case XFER_UDMA_0:	mode = 0x0080; break;
28	case XFER_MW_DMA_2:	mode = 0x0070; break;
29	case XFER_MW_DMA_1:	mode = 0x0060; break;
30	case XFER_MW_DMA_0:	mode = 0x0050; break;
31	case XFER_PIO_4:	mode = 0x0400; break;
32	case XFER_PIO_3:	mode = 0x0300; break;
33	case XFER_PIO_2:	mode = 0x0200; break;
34	case XFER_PIO_1:	mode = 0x0100; break;
35	case XFER_PIO_0:
36	default:		mode = 0x0000; break;
37	}
38
39	scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
40	scr |= mode;
41	outw(scr, scr_port);
42}
43
44static void tc86c001_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
45{
46	drive->dma_mode = drive->pio_mode;
47	tc86c001_set_mode(hwif, drive);
48}
49
50static int tc86c001_timer_expiry(ide_drive_t *drive)
51{
52	ide_hwif_t *hwif	= drive->hwif;
53	ide_expiry_t *expiry	= ide_get_hwifdata(hwif);
54	u8 dma_stat		= inb(hwif->dma_base + ATA_DMA_STATUS);
55
56	/* Restore a higher level driver's expiry handler first. */
57	hwif->expiry = expiry;
58
59	if ((dma_stat & 5) == 1) {	/* DMA active and no interrupt */
60		unsigned long sc_base	= hwif->config_data;
61		unsigned long twcr_port	= sc_base + (drive->dn ? 0x06 : 0x04);
62		u8 dma_cmd		= inb(hwif->dma_base + ATA_DMA_CMD);
63
64		printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
65		       "attempting recovery...\n", drive->name);
66
67		/* Stop DMA */
68		outb(dma_cmd & ~0x01, hwif->dma_base + ATA_DMA_CMD);
69
70		/* Setup the dummy DMA transfer */
71		outw(0, sc_base + 0x0a);	/* Sector Count */
72		outw(0, twcr_port);	/* Transfer Word Count 1 or 2 */
73
74		/* Start the dummy DMA transfer */
75
76		/* clear R_OR_WCTR for write */
77		outb(0x00, hwif->dma_base + ATA_DMA_CMD);
78		/* set START_STOPBM */
79		outb(0x01, hwif->dma_base + ATA_DMA_CMD);
80
81		/*
82		 * If an interrupt was pending, it should come thru shortly.
83		 * If not, a higher level driver's expiry handler should
84		 * eventually cause some kind of recovery from the DMA stall.
85		 */
86		return WAIT_MIN_SLEEP;
87	}
88
89	/* Chain to the restored expiry handler if DMA wasn't active. */
90	if (likely(expiry != NULL))
91		return expiry(drive);
92
93	/* If there was no handler, "emulate" that for ide_timer_expiry()... */
94	return -1;
95}
96
97static void tc86c001_dma_start(ide_drive_t *drive)
98{
99	ide_hwif_t *hwif	= drive->hwif;
100	unsigned long sc_base	= hwif->config_data;
101	unsigned long twcr_port	= sc_base + (drive->dn ? 0x06 : 0x04);
102	unsigned long nsectors	= blk_rq_sectors(hwif->rq);
103
104	/*
105	 * We have to manually load the sector count and size into
106	 * the appropriate system control registers for DMA to work
107	 * with LBA48 and ATAPI devices...
108	 */
109	outw(nsectors, sc_base + 0x0a);	/* Sector Count */
110	outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
111
112	/* Install our timeout expiry hook, saving the current handler... */
113	ide_set_hwifdata(hwif, hwif->expiry);
114	hwif->expiry = &tc86c001_timer_expiry;
115
116	ide_dma_start(drive);
117}
118
119static u8 tc86c001_cable_detect(ide_hwif_t *hwif)
120{
121	struct pci_dev *dev = to_pci_dev(hwif->dev);
122	unsigned long sc_base = pci_resource_start(dev, 5);
123	u16 scr1 = inw(sc_base + 0x00);
124
125	/*
126	 * System Control  1 Register bit 13 (PDIAGN):
127	 * 0=80-pin cable, 1=40-pin cable
128	 */
129	return (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
130}
131
132static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
133{
134	struct pci_dev *dev	= to_pci_dev(hwif->dev);
135	unsigned long sc_base	= pci_resource_start(dev, 5);
136	u16 scr1		= inw(sc_base + 0x00);
137
138	/* System Control 1 Register bit 15 (Soft Reset) set */
139	outw(scr1 |  0x8000, sc_base + 0x00);
140
141	/* System Control 1 Register bit 14 (FIFO Reset) set */
142	outw(scr1 |  0x4000, sc_base + 0x00);
143
144	/* System Control 1 Register: reset clear */
145	outw(scr1 & ~0xc000, sc_base + 0x00);
146
147	/* Store the system control register base for convenience... */
148	hwif->config_data = sc_base;
149
150	if (!hwif->dma_base)
151		return;
152
153	/*
154	 * Sector Count Control Register bits 0 and 1 set:
155	 * software sets Sector Count Register for master and slave device
156	 */
157	outw(0x0003, sc_base + 0x0c);
158
159	/* Sector Count Register limit */
160	hwif->rqsize	 = 0xffff;
161}
162
163static const struct ide_port_ops tc86c001_port_ops = {
164	.set_pio_mode		= tc86c001_set_pio_mode,
165	.set_dma_mode		= tc86c001_set_mode,
166	.cable_detect		= tc86c001_cable_detect,
167};
168
169static const struct ide_dma_ops tc86c001_dma_ops = {
170	.dma_host_set		= ide_dma_host_set,
171	.dma_setup		= ide_dma_setup,
172	.dma_start		= tc86c001_dma_start,
173	.dma_end		= ide_dma_end,
174	.dma_test_irq		= ide_dma_test_irq,
175	.dma_lost_irq		= ide_dma_lost_irq,
176	.dma_timer_expiry	= ide_dma_sff_timer_expiry,
177	.dma_sff_read_status	= ide_dma_sff_read_status,
178};
179
180static const struct ide_port_info tc86c001_chipset __devinitdata = {
181	.name		= DRV_NAME,
182	.init_hwif	= init_hwif_tc86c001,
183	.port_ops	= &tc86c001_port_ops,
184	.dma_ops	= &tc86c001_dma_ops,
185	.host_flags	= IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD,
186	.pio_mask	= ATA_PIO4,
187	.mwdma_mask	= ATA_MWDMA2,
188	.udma_mask	= ATA_UDMA4,
189};
190
191static int __devinit tc86c001_init_one(struct pci_dev *dev,
192				       const struct pci_device_id *id)
193{
194	int rc;
195
196	rc = pci_enable_device(dev);
197	if (rc)
198		goto out;
199
200	rc = pci_request_region(dev, 5, DRV_NAME);
201	if (rc) {
202		printk(KERN_ERR DRV_NAME ": system control regs already in use");
203		goto out_disable;
204	}
205
206	rc = ide_pci_init_one(dev, &tc86c001_chipset, NULL);
207	if (rc)
208		goto out_release;
209
210	goto out;
211
212out_release:
213	pci_release_region(dev, 5);
214out_disable:
215	pci_disable_device(dev);
216out:
217	return rc;
218}
219
220static void __devexit tc86c001_remove(struct pci_dev *dev)
221{
222	ide_pci_remove(dev);
223	pci_release_region(dev, 5);
224	pci_disable_device(dev);
225}
226
227static const struct pci_device_id tc86c001_pci_tbl[] = {
228	{ PCI_VDEVICE(TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE), 0 },
229	{ 0, }
230};
231MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);
232
233static struct pci_driver tc86c001_pci_driver = {
234	.name		= "TC86C001",
235	.id_table	= tc86c001_pci_tbl,
236	.probe		= tc86c001_init_one,
237	.remove		= __devexit_p(tc86c001_remove),
238};
239
240static int __init tc86c001_ide_init(void)
241{
242	return ide_pci_register_driver(&tc86c001_pci_driver);
243}
244
245static void __exit tc86c001_ide_exit(void)
246{
247	pci_unregister_driver(&tc86c001_pci_driver);
248}
249
250module_init(tc86c001_ide_init);
251module_exit(tc86c001_ide_exit);
252
253MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
254MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
255MODULE_LICENSE("GPL");
256