1/* pci_sun4v_asm: Hypervisor calls for PCI support. 2 * 3 * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net> 4 */ 5 6#include <linux/linkage.h> 7#include <asm/hypervisor.h> 8 9 /* %o0: devhandle 10 * %o1: tsbid 11 * %o2: num ttes 12 * %o3: io_attributes 13 * %o4: io_page_list phys address 14 * 15 * returns %o0: -status if status was non-zero, else 16 * %o0: num pages mapped 17 */ 18ENTRY(pci_sun4v_iommu_map) 19 mov %o5, %g1 20 mov HV_FAST_PCI_IOMMU_MAP, %o5 21 ta HV_FAST_TRAP 22 brnz,pn %o0, 1f 23 sub %g0, %o0, %o0 24 mov %o1, %o0 251: retl 26 nop 27ENDPROC(pci_sun4v_iommu_map) 28 29 /* %o0: devhandle 30 * %o1: tsbid 31 * %o2: num ttes 32 * 33 * returns %o0: num ttes demapped 34 */ 35ENTRY(pci_sun4v_iommu_demap) 36 mov HV_FAST_PCI_IOMMU_DEMAP, %o5 37 ta HV_FAST_TRAP 38 retl 39 mov %o1, %o0 40ENDPROC(pci_sun4v_iommu_demap) 41 42 /* %o0: devhandle 43 * %o1: tsbid 44 * %o2: &io_attributes 45 * %o3: &real_address 46 * 47 * returns %o0: status 48 */ 49ENTRY(pci_sun4v_iommu_getmap) 50 mov %o2, %o4 51 mov HV_FAST_PCI_IOMMU_GETMAP, %o5 52 ta HV_FAST_TRAP 53 stx %o1, [%o4] 54 stx %o2, [%o3] 55 retl 56 mov %o0, %o0 57ENDPROC(pci_sun4v_iommu_getmap) 58 59 /* %o0: devhandle 60 * %o1: pci_device 61 * %o2: pci_config_offset 62 * %o3: size 63 * 64 * returns %o0: data 65 * 66 * If there is an error, the data will be returned 67 * as all 1's. 68 */ 69ENTRY(pci_sun4v_config_get) 70 mov HV_FAST_PCI_CONFIG_GET, %o5 71 ta HV_FAST_TRAP 72 brnz,a,pn %o1, 1f 73 mov -1, %o2 741: retl 75 mov %o2, %o0 76ENDPROC(pci_sun4v_config_get) 77 78 /* %o0: devhandle 79 * %o1: pci_device 80 * %o2: pci_config_offset 81 * %o3: size 82 * %o4: data 83 * 84 * returns %o0: status 85 * 86 * status will be zero if the operation completed 87 * successfully, else -1 if not 88 */ 89ENTRY(pci_sun4v_config_put) 90 mov HV_FAST_PCI_CONFIG_PUT, %o5 91 ta HV_FAST_TRAP 92 brnz,a,pn %o1, 1f 93 mov -1, %o1 941: retl 95 mov %o1, %o0 96ENDPROC(pci_sun4v_config_put) 97 98 /* %o0: devhandle 99 * %o1: msiqid 100 * %o2: msiq phys address 101 * %o3: num entries 102 * 103 * returns %o0: status 104 * 105 * status will be zero if the operation completed 106 * successfully, else -1 if not 107 */ 108ENTRY(pci_sun4v_msiq_conf) 109 mov HV_FAST_PCI_MSIQ_CONF, %o5 110 ta HV_FAST_TRAP 111 retl 112 mov %o0, %o0 113ENDPROC(pci_sun4v_msiq_conf) 114 115 /* %o0: devhandle 116 * %o1: msiqid 117 * %o2: &msiq_phys_addr 118 * %o3: &msiq_num_entries 119 * 120 * returns %o0: status 121 */ 122ENTRY(pci_sun4v_msiq_info) 123 mov %o2, %o4 124 mov HV_FAST_PCI_MSIQ_INFO, %o5 125 ta HV_FAST_TRAP 126 stx %o1, [%o4] 127 stx %o2, [%o3] 128 retl 129 mov %o0, %o0 130ENDPROC(pci_sun4v_msiq_info) 131 132 /* %o0: devhandle 133 * %o1: msiqid 134 * %o2: &valid 135 * 136 * returns %o0: status 137 */ 138ENTRY(pci_sun4v_msiq_getvalid) 139 mov HV_FAST_PCI_MSIQ_GETVALID, %o5 140 ta HV_FAST_TRAP 141 stx %o1, [%o2] 142 retl 143 mov %o0, %o0 144ENDPROC(pci_sun4v_msiq_getvalid) 145 146 /* %o0: devhandle 147 * %o1: msiqid 148 * %o2: valid 149 * 150 * returns %o0: status 151 */ 152ENTRY(pci_sun4v_msiq_setvalid) 153 mov HV_FAST_PCI_MSIQ_SETVALID, %o5 154 ta HV_FAST_TRAP 155 retl 156 mov %o0, %o0 157ENDPROC(pci_sun4v_msiq_setvalid) 158 159 /* %o0: devhandle 160 * %o1: msiqid 161 * %o2: &state 162 * 163 * returns %o0: status 164 */ 165ENTRY(pci_sun4v_msiq_getstate) 166 mov HV_FAST_PCI_MSIQ_GETSTATE, %o5 167 ta HV_FAST_TRAP 168 stx %o1, [%o2] 169 retl 170 mov %o0, %o0 171ENDPROC(pci_sun4v_msiq_getstate) 172 173 /* %o0: devhandle 174 * %o1: msiqid 175 * %o2: state 176 * 177 * returns %o0: status 178 */ 179ENTRY(pci_sun4v_msiq_setstate) 180 mov HV_FAST_PCI_MSIQ_SETSTATE, %o5 181 ta HV_FAST_TRAP 182 retl 183 mov %o0, %o0 184ENDPROC(pci_sun4v_msiq_setstate) 185 186 /* %o0: devhandle 187 * %o1: msiqid 188 * %o2: &head 189 * 190 * returns %o0: status 191 */ 192ENTRY(pci_sun4v_msiq_gethead) 193 mov HV_FAST_PCI_MSIQ_GETHEAD, %o5 194 ta HV_FAST_TRAP 195 stx %o1, [%o2] 196 retl 197 mov %o0, %o0 198ENDPROC(pci_sun4v_msiq_gethead) 199 200 /* %o0: devhandle 201 * %o1: msiqid 202 * %o2: head 203 * 204 * returns %o0: status 205 */ 206ENTRY(pci_sun4v_msiq_sethead) 207 mov HV_FAST_PCI_MSIQ_SETHEAD, %o5 208 ta HV_FAST_TRAP 209 retl 210 mov %o0, %o0 211ENDPROC(pci_sun4v_msiq_sethead) 212 213 /* %o0: devhandle 214 * %o1: msiqid 215 * %o2: &tail 216 * 217 * returns %o0: status 218 */ 219ENTRY(pci_sun4v_msiq_gettail) 220 mov HV_FAST_PCI_MSIQ_GETTAIL, %o5 221 ta HV_FAST_TRAP 222 stx %o1, [%o2] 223 retl 224 mov %o0, %o0 225ENDPROC(pci_sun4v_msiq_gettail) 226 227 /* %o0: devhandle 228 * %o1: msinum 229 * %o2: &valid 230 * 231 * returns %o0: status 232 */ 233ENTRY(pci_sun4v_msi_getvalid) 234 mov HV_FAST_PCI_MSI_GETVALID, %o5 235 ta HV_FAST_TRAP 236 stx %o1, [%o2] 237 retl 238 mov %o0, %o0 239ENDPROC(pci_sun4v_msi_getvalid) 240 241 /* %o0: devhandle 242 * %o1: msinum 243 * %o2: valid 244 * 245 * returns %o0: status 246 */ 247ENTRY(pci_sun4v_msi_setvalid) 248 mov HV_FAST_PCI_MSI_SETVALID, %o5 249 ta HV_FAST_TRAP 250 retl 251 mov %o0, %o0 252ENDPROC(pci_sun4v_msi_setvalid) 253 254 /* %o0: devhandle 255 * %o1: msinum 256 * %o2: &msiq 257 * 258 * returns %o0: status 259 */ 260ENTRY(pci_sun4v_msi_getmsiq) 261 mov HV_FAST_PCI_MSI_GETMSIQ, %o5 262 ta HV_FAST_TRAP 263 stx %o1, [%o2] 264 retl 265 mov %o0, %o0 266ENDPROC(pci_sun4v_msi_getmsiq) 267 268 /* %o0: devhandle 269 * %o1: msinum 270 * %o2: msitype 271 * %o3: msiq 272 * 273 * returns %o0: status 274 */ 275ENTRY(pci_sun4v_msi_setmsiq) 276 mov HV_FAST_PCI_MSI_SETMSIQ, %o5 277 ta HV_FAST_TRAP 278 retl 279 mov %o0, %o0 280ENDPROC(pci_sun4v_msi_setmsiq) 281 282 /* %o0: devhandle 283 * %o1: msinum 284 * %o2: &state 285 * 286 * returns %o0: status 287 */ 288ENTRY(pci_sun4v_msi_getstate) 289 mov HV_FAST_PCI_MSI_GETSTATE, %o5 290 ta HV_FAST_TRAP 291 stx %o1, [%o2] 292 retl 293 mov %o0, %o0 294ENDPROC(pci_sun4v_msi_getstate) 295 296 /* %o0: devhandle 297 * %o1: msinum 298 * %o2: state 299 * 300 * returns %o0: status 301 */ 302ENTRY(pci_sun4v_msi_setstate) 303 mov HV_FAST_PCI_MSI_SETSTATE, %o5 304 ta HV_FAST_TRAP 305 retl 306 mov %o0, %o0 307ENDPROC(pci_sun4v_msi_setstate) 308 309 /* %o0: devhandle 310 * %o1: msinum 311 * %o2: &msiq 312 * 313 * returns %o0: status 314 */ 315ENTRY(pci_sun4v_msg_getmsiq) 316 mov HV_FAST_PCI_MSG_GETMSIQ, %o5 317 ta HV_FAST_TRAP 318 stx %o1, [%o2] 319 retl 320 mov %o0, %o0 321ENDPROC(pci_sun4v_msg_getmsiq) 322 323 /* %o0: devhandle 324 * %o1: msinum 325 * %o2: msiq 326 * 327 * returns %o0: status 328 */ 329ENTRY(pci_sun4v_msg_setmsiq) 330 mov HV_FAST_PCI_MSG_SETMSIQ, %o5 331 ta HV_FAST_TRAP 332 retl 333 mov %o0, %o0 334ENDPROC(pci_sun4v_msg_setmsiq) 335 336 /* %o0: devhandle 337 * %o1: msinum 338 * %o2: &valid 339 * 340 * returns %o0: status 341 */ 342ENTRY(pci_sun4v_msg_getvalid) 343 mov HV_FAST_PCI_MSG_GETVALID, %o5 344 ta HV_FAST_TRAP 345 stx %o1, [%o2] 346 retl 347 mov %o0, %o0 348ENDPROC(pci_sun4v_msg_getvalid) 349 350 /* %o0: devhandle 351 * %o1: msinum 352 * %o2: valid 353 * 354 * returns %o0: status 355 */ 356ENTRY(pci_sun4v_msg_setvalid) 357 mov HV_FAST_PCI_MSG_SETVALID, %o5 358 ta HV_FAST_TRAP 359 retl 360 mov %o0, %o0 361ENDPROC(pci_sun4v_msg_setvalid) 362