1/* 2 * linux/arch/sh/boards/renesas/sh7763rdp/setup.c 3 * 4 * Renesas Solutions sh7763rdp board 5 * 6 * Copyright (C) 2008 Renesas Solutions Corp. 7 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 8 * 9 * This file is subject to the terms and conditions of the GNU General Public 10 * License. See the file "COPYING" in the main directory of this archive 11 * for more details. 12 */ 13#include <linux/init.h> 14#include <linux/platform_device.h> 15#include <linux/interrupt.h> 16#include <linux/input.h> 17#include <linux/mtd/physmap.h> 18#include <linux/fb.h> 19#include <linux/io.h> 20#include <mach/sh7763rdp.h> 21#include <asm/sh_eth.h> 22#include <asm/sh7760fb.h> 23 24/* NOR Flash */ 25static struct mtd_partition sh7763rdp_nor_flash_partitions[] = { 26 { 27 .name = "U-Boot", 28 .offset = 0, 29 .size = (2 * 128 * 1024), 30 .mask_flags = MTD_WRITEABLE, /* Read-only */ 31 }, { 32 .name = "Linux-Kernel", 33 .offset = MTDPART_OFS_APPEND, 34 .size = (20 * 128 * 1024), 35 }, { 36 .name = "Root Filesystem", 37 .offset = MTDPART_OFS_APPEND, 38 .size = MTDPART_SIZ_FULL, 39 }, 40}; 41 42static struct physmap_flash_data sh7763rdp_nor_flash_data = { 43 .width = 2, 44 .parts = sh7763rdp_nor_flash_partitions, 45 .nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions), 46}; 47 48static struct resource sh7763rdp_nor_flash_resources[] = { 49 [0] = { 50 .name = "NOR Flash", 51 .start = 0, 52 .end = (64 * 1024 * 1024), 53 .flags = IORESOURCE_MEM, 54 }, 55}; 56 57static struct platform_device sh7763rdp_nor_flash_device = { 58 .name = "physmap-flash", 59 .resource = sh7763rdp_nor_flash_resources, 60 .num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources), 61 .dev = { 62 .platform_data = &sh7763rdp_nor_flash_data, 63 }, 64}; 65 66/* 67 * SH-Ether 68 * 69 * SH Ether of SH7763 has multi IRQ handling. 70 * (57,58,59 -> 57) 71 */ 72static struct resource sh_eth_resources[] = { 73 { 74 .start = 0xFEE00800, /* use eth1 */ 75 .end = 0xFEE00F7C - 1, 76 .flags = IORESOURCE_MEM, 77 }, { 78 .start = 57, /* irq number */ 79 .flags = IORESOURCE_IRQ, 80 }, 81}; 82 83static struct sh_eth_plat_data sh7763_eth_pdata = { 84 .phy = 1, 85 .edmac_endian = EDMAC_LITTLE_ENDIAN, 86}; 87 88static struct platform_device sh7763rdp_eth_device = { 89 .name = "sh-eth", 90 .resource = sh_eth_resources, 91 .num_resources = ARRAY_SIZE(sh_eth_resources), 92 .dev = { 93 .platform_data = &sh7763_eth_pdata, 94 }, 95}; 96 97/* SH7763 LCDC */ 98static struct resource sh7763rdp_fb_resources[] = { 99 { 100 .start = 0xFFE80000, 101 .end = 0xFFE80442 - 1, 102 .flags = IORESOURCE_MEM, 103 }, 104}; 105 106static struct fb_videomode sh7763fb_videomode = { 107 .refresh = 60, 108 .name = "VGA Monitor", 109 .xres = 640, 110 .yres = 480, 111 .pixclock = 10000, 112 .left_margin = 80, 113 .right_margin = 24, 114 .upper_margin = 30, 115 .lower_margin = 1, 116 .hsync_len = 96, 117 .vsync_len = 1, 118 .sync = 0, 119 .vmode = FB_VMODE_NONINTERLACED, 120 .flag = FBINFO_FLAG_DEFAULT, 121}; 122 123static struct sh7760fb_platdata sh7763fb_def_pdata = { 124 .def_mode = &sh7763fb_videomode, 125 .ldmtr = (LDMTR_TFT_COLOR_16|LDMTR_MCNT), 126 .lddfr = LDDFR_16BPP_RGB565, 127 .ldpmmr = 0x0000, 128 .ldpspr = 0xFFFF, 129 .ldaclnr = 0x0001, 130 .ldickr = 0x1102, 131 .rotate = 0, 132 .novsync = 0, 133 .blank = NULL, 134}; 135 136static struct platform_device sh7763rdp_fb_device = { 137 .name = "sh7760-lcdc", 138 .resource = sh7763rdp_fb_resources, 139 .num_resources = ARRAY_SIZE(sh7763rdp_fb_resources), 140 .dev = { 141 .platform_data = &sh7763fb_def_pdata, 142 }, 143}; 144 145static struct platform_device *sh7763rdp_devices[] __initdata = { 146 &sh7763rdp_nor_flash_device, 147 &sh7763rdp_eth_device, 148 &sh7763rdp_fb_device, 149}; 150 151static int __init sh7763rdp_devices_setup(void) 152{ 153 return platform_add_devices(sh7763rdp_devices, 154 ARRAY_SIZE(sh7763rdp_devices)); 155} 156device_initcall(sh7763rdp_devices_setup); 157 158static void __init sh7763rdp_setup(char **cmdline_p) 159{ 160 /* Board version check */ 161 if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) 162 printk(KERN_INFO "RTE Standard Configuration\n"); 163 else 164 printk(KERN_INFO "RTA Standard Configuration\n"); 165 166 /* USB pin select bits (clear bit 5-2 to 0) */ 167 __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); 168 /* USBH setup port I controls to other (clear bits 4-9 to 0) */ 169 __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR); 170 171 /* Select USB Host controller */ 172 __raw_writew(0x00, USB_USBHSC); 173 174 /* For LCD */ 175 /* set PTJ7-1, bits 15-2 of PJCR to 0 */ 176 __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR); 177 /* set PTI5, bits 11-10 of PICR to 0 */ 178 __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR); 179 __raw_writew(0, PORT_PKCR); 180 __raw_writew(0, PORT_PLCR); 181 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */ 182 __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); 183 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */ 184 __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3); 185 186 /* For HAC */ 187 /* bit3-0 0100:HAC & SSI1 enable */ 188 __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); 189 /* bit14 1:SSI_HAC_CLK enable */ 190 __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4); 191 192 /* SH-Ether */ 193 __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); 194 __raw_writew(0x0, PORT_PFCR); 195 __raw_writew(0x0, PORT_PFCR); 196 __raw_writew(0x0, PORT_PFCR); 197 198 /* MMC */ 199 /*selects SCIF and MMC other functions */ 200 __raw_writew(0x0001, PORT_PSEL0); 201 /* MMC clock operates */ 202 __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1); 203 __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR); 204 __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); 205} 206 207static struct sh_machine_vector mv_sh7763rdp __initmv = { 208 .mv_name = "sh7763drp", 209 .mv_setup = sh7763rdp_setup, 210 .mv_nr_irqs = 112, 211 .mv_init_irq = init_sh7763rdp_IRQ, 212}; 213