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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/loongson/common/
1/*
2 * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
3 * Author: Fuxin Zhang, zhangfx@lemote.com
4 *
5 *  This program is free software; you can redistribute  it and/or modify it
6 *  under  the terms of  the GNU General  Public License as published by the
7 *  Free Software Foundation;  either version 2 of the  License, or (at your
8 *  option) any later version.
9 */
10#include <linux/delay.h>
11#include <linux/interrupt.h>
12
13#include <loongson.h>
14/*
15 * the first level int-handler will jump here if it is a bonito irq
16 */
17void bonito_irqdispatch(void)
18{
19	u32 int_status;
20	int i;
21
22	int_status = LOONGSON_INTISR;
23	while (int_status & (1 << 10)) {
24		udelay(1);
25		int_status = LOONGSON_INTISR;
26	}
27
28	/* Get pending sources, masked by current enables */
29	int_status = LOONGSON_INTISR & LOONGSON_INTEN;
30
31	if (int_status) {
32		i = __ffs(int_status);
33		do_IRQ(LOONGSON_IRQ_BASE + i);
34	}
35}
36
37asmlinkage void plat_irq_dispatch(void)
38{
39	unsigned int pending;
40
41	pending = read_c0_cause() & read_c0_status() & ST0_IM;
42
43	/* machine-specific plat_irq_dispatch */
44	mach_irq_dispatch(pending);
45}
46
47void __init arch_init_irq(void)
48{
49	/*
50	 * Clear all of the interrupts while we change the able around a bit.
51	 * int-handler is not on bootstrap
52	 */
53	clear_c0_status(ST0_IM | ST0_BEV);
54
55	/* no steer */
56	LOONGSON_INTSTEER = 0;
57
58	/*
59	 * Mask out all interrupt by writing "1" to all bit position in
60	 * the interrupt reset reg.
61	 */
62	LOONGSON_INTENCLR = ~0;
63
64	/* machine specific irq init */
65	mach_init_irq();
66}
67