1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1998, 1999, 2000 by Ralf Baechle 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 2007 by Maciej W. Rozycki 9 * Copyright (C) 2011 MIPS Technologies, Inc. 10 */ 11#include <asm/asm.h> 12#include <asm/asm-offsets.h> 13#include <asm/regdef.h> 14 15#if LONGSIZE == 4 16#define LONG_S_L swl 17#define LONG_S_R swr 18#else 19#define LONG_S_L sdl 20#define LONG_S_R sdr 21#endif 22 23#ifdef CONFIG_CPU_MICROMIPS 24#define STORSIZE (LONGSIZE * 2) 25#define STORMASK (STORSIZE - 1) 26#else 27#define STORSIZE LONGSIZE 28#define STORMASK LONGMASK 29#endif 30 31#define EX(insn,reg,addr,handler) \ 329: insn reg, addr; \ 33 .section __ex_table,"a"; \ 34 PTR 9b, handler; \ 35 .previous 36 37 .macro f_fill64 dst, offset, val, fixup 38#ifdef CONFIG_CPU_MICROMIPS 39 EX(swp, t8, (\offset + 0 * STORSIZE)(\dst), \fixup) 40 EX(swp, t8, (\offset + 1 * STORSIZE)(\dst), \fixup) 41 EX(swp, t8, (\offset + 2 * STORSIZE)(\dst), \fixup) 42 EX(swp, t8, (\offset + 3 * STORSIZE)(\dst), \fixup) 43#if LONGSIZE == 4 44 EX(swp, t8, (\offset + 4 * STORSIZE)(\dst), \fixup) 45 EX(swp, t8, (\offset + 5 * STORSIZE)(\dst), \fixup) 46 EX(swp, t8, (\offset + 6 * STORSIZE)(\dst), \fixup) 47 EX(swp, t8, (\offset + 7 * STORSIZE)(\dst), \fixup) 48#endif 49#else 50 EX(LONG_S, \val, (\offset + 0 * STORSIZE)(\dst), \fixup) 51 EX(LONG_S, \val, (\offset + 1 * STORSIZE)(\dst), \fixup) 52 EX(LONG_S, \val, (\offset + 2 * STORSIZE)(\dst), \fixup) 53 EX(LONG_S, \val, (\offset + 3 * STORSIZE)(\dst), \fixup) 54 EX(LONG_S, \val, (\offset + 4 * STORSIZE)(\dst), \fixup) 55 EX(LONG_S, \val, (\offset + 5 * STORSIZE)(\dst), \fixup) 56 EX(LONG_S, \val, (\offset + 6 * STORSIZE)(\dst), \fixup) 57 EX(LONG_S, \val, (\offset + 7 * STORSIZE)(\dst), \fixup) 58#if LONGSIZE == 4 59 EX(LONG_S, \val, (\offset + 8 * STORSIZE)(\dst), \fixup) 60 EX(LONG_S, \val, (\offset + 9 * STORSIZE)(\dst), \fixup) 61 EX(LONG_S, \val, (\offset + 10 * STORSIZE)(\dst), \fixup) 62 EX(LONG_S, \val, (\offset + 11 * STORSIZE)(\dst), \fixup) 63 EX(LONG_S, \val, (\offset + 12 * STORSIZE)(\dst), \fixup) 64 EX(LONG_S, \val, (\offset + 13 * STORSIZE)(\dst), \fixup) 65 EX(LONG_S, \val, (\offset + 14 * STORSIZE)(\dst), \fixup) 66 EX(LONG_S, \val, (\offset + 15 * STORSIZE)(\dst), \fixup) 67#endif 68#endif 69 .endm 70 71/* 72 * memset(void *s, int c, size_t n) 73 * 74 * a0: start of area to clear 75 * a1: char to fill with 76 * a2: size of area to clear 77 */ 78 .set noreorder 79 .align 5 80LEAF(memset) 81 beqz a1, 1f 82 move v0, a0 /* result */ 83 84 andi a1, 0xff /* spread fillword */ 85 LONG_SLL t1, a1, 8 86 or a1, t1 87 LONG_SLL t1, a1, 16 88#if LONGSIZE == 8 89 or a1, t1 90 LONG_SLL t1, a1, 32 91#endif 92 or a1, t1 931: 94 95FEXPORT(__bzero) 96 sltiu t0, a2, STORSIZE /* very small region? */ 97 bnez t0, .Lsmall_memset 98 andi t0, a0, STORMASK /* aligned? */ 99 100#ifdef CONFIG_CPU_MICROMIPS 101 move t8, a1 102 move t9, a1 103#endif 104#ifndef CONFIG_CPU_DADDI_WORKAROUNDS 105 beqz t0, 1f 106 PTR_SUBU t0, STORSIZE /* alignment in bytes */ 107#else 108 .set noat 109 li AT, STORSIZE 110 beqz t0, 1f 111 PTR_SUBU t0, AT /* alignment in bytes */ 112 .set at 113#endif 114 115 R10KCBARRIER(0(ra)) 116#ifdef __MIPSEB__ 117 EX(LONG_S_L, a1, (a0), .Lfirst_fixup) /* make word/dword aligned */ 118#endif 119#ifdef __MIPSEL__ 120 EX(LONG_S_R, a1, (a0), .Lfirst_fixup) /* make word/dword aligned */ 121#endif 122 PTR_SUBU a0, t0 /* long align ptr */ 123 PTR_ADDU a2, t0 /* correct size */ 124 1251: ori t1, a2, 0x3f /* # of full blocks */ 126 xori t1, 0x3f 127 beqz t1, .Lmemset_partial /* no block to fill */ 128 andi t0, a2, 0x40-STORSIZE 129 130 PTR_ADDU t1, a0 /* end address */ 131 .set reorder 1321: PTR_ADDIU a0, 64 133 R10KCBARRIER(0(ra)) 134 f_fill64 a0, -64, a1, .Lfwd_fixup 135 bne t1, a0, 1b 136 .set noreorder 137 138.Lmemset_partial: 139 R10KCBARRIER(0(ra)) 140 PTR_LA t1, 2f /* where to start */ 141#ifdef CONFIG_CPU_MICROMIPS 142 LONG_SRL t7, t0, 1 143#if LONGSIZE == 4 144 PTR_SUBU t1, t7 145#else 146 .set noat 147 LONG_SRL AT, t7, 1 148 PTR_SUBU t1, AT 149 .set at 150#endif 151#else 152#if LONGSIZE == 4 153 PTR_SUBU t1, t0 154#else 155 .set noat 156 LONG_SRL AT, t0, 1 157 PTR_SUBU t1, AT 158 .set at 159#endif 160#endif 161 jr t1 162 PTR_ADDU a0, t0 /* dest ptr */ 163 164 .set push 165 .set noreorder 166 .set nomacro 167 f_fill64 a0, -64, a1, .Lpartial_fixup /* ... but first do longs ... */ 1682: .set pop 169 andi a2, STORMASK /* At most one long to go */ 170 171 beqz a2, 1f 172 PTR_ADDU a0, a2 /* What's left */ 173 R10KCBARRIER(0(ra)) 174#ifdef __MIPSEB__ 175 EX(LONG_S_R, a1, -1(a0), .Llast_fixup) 176#endif 177#ifdef __MIPSEL__ 178 EX(LONG_S_L, a1, -1(a0), .Llast_fixup) 179#endif 1801: jr ra 181 move a2, zero 182 183.Lsmall_memset: 184 beqz a2, 2f 185 PTR_ADDU t1, a0, a2 186 1871: PTR_ADDIU a0, 1 /* fill bytewise */ 188 R10KCBARRIER(0(ra)) 189 bne t1, a0, 1b 190 sb a1, -1(a0) 191 1922: jr ra /* done */ 193 move a2, zero 194 END(memset) 195 196.Lfirst_fixup: 197 jr ra 198 nop 199 200.Lfwd_fixup: 201 PTR_L t0, TI_TASK($28) 202 andi a2, 0x3f 203 LONG_L t0, THREAD_BUADDR(t0) 204 LONG_ADDU a2, t1 205 jr ra 206 LONG_SUBU a2, t0 207 208.Lpartial_fixup: 209 PTR_L t0, TI_TASK($28) 210 andi a2, STORMASK 211 LONG_L t0, THREAD_BUADDR(t0) 212 LONG_ADDU a2, t1 213 jr ra 214 LONG_SUBU a2, t0 215 216.Llast_fixup: 217 jr ra 218 andi v1, a2, STORMASK 219