1/* 2 * Copyright (C) 2009 Lemote, Inc. 3 * Author: Wu Zhangjin <wuzhangjin@gmail.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 */ 10 11#ifndef __ASM_MACH_LOONGSON_LOONGSON_H 12#define __ASM_MACH_LOONGSON_LOONGSON_H 13 14#include <linux/io.h> 15#include <linux/init.h> 16 17/* loongson internal northbridge initialization */ 18extern void bonito_irq_init(void); 19 20/* machine-specific reboot/halt operation */ 21extern void mach_prepare_reboot(void); 22extern void mach_prepare_shutdown(void); 23 24/* environment arguments from bootloader */ 25extern unsigned long cpu_clock_freq; 26extern unsigned long memsize, highmemsize; 27 28/* loongson-specific command line, env and memory initialization */ 29extern void __init prom_init_memory(void); 30extern void __init prom_init_cmdline(void); 31extern void __init prom_init_machtype(void); 32extern void __init prom_init_env(void); 33#ifdef CONFIG_LOONGSON_UART_BASE 34extern unsigned long _loongson_uart_base, loongson_uart_base; 35extern void prom_init_loongson_uart_base(void); 36#endif 37 38static inline void prom_init_uart_base(void) 39{ 40#ifdef CONFIG_LOONGSON_UART_BASE 41 prom_init_loongson_uart_base(); 42#endif 43} 44 45/* irq operation functions */ 46extern void bonito_irqdispatch(void); 47extern void __init bonito_irq_init(void); 48extern void __init mach_init_irq(void); 49extern void mach_irq_dispatch(unsigned int pending); 50extern int mach_i8259_irq(void); 51 52/* We need this in some places... */ 53#define delay() ({ \ 54 int x; \ 55 for (x = 0; x < 100000; x++) \ 56 __asm__ __volatile__(""); \ 57}) 58 59#define LOONGSON_REG(x) \ 60 (*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x))) 61 62#define LOONGSON_IRQ_BASE 32 63#define LOONGSON2_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */ 64 65#include <linux/interrupt.h> 66static inline void do_perfcnt_IRQ(void) 67{ 68#if defined(CONFIG_OPROFILE) || defined(CONFIG_OPROFILE_MODULE) 69 do_IRQ(LOONGSON2_PERFCNT_IRQ); 70#endif 71} 72 73#define LOONGSON_FLASH_BASE 0x1c000000 74#define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */ 75#define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1) 76 77#define LOONGSON_LIO0_BASE 0x1e000000 78#define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */ 79#define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1) 80 81#define LOONGSON_BOOT_BASE 0x1fc00000 82#define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */ 83#define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1) 84#define LOONGSON_REG_BASE 0x1fe00000 85#define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */ 86#define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1) 87 88#define LOONGSON_LIO1_BASE 0x1ff00000 89#define LOONGSON_LIO1_SIZE 0x00100000 /* 1M */ 90#define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1) 91 92#define LOONGSON_PCILO0_BASE 0x10000000 93#define LOONGSON_PCILO1_BASE 0x14000000 94#define LOONGSON_PCILO2_BASE 0x18000000 95#define LOONGSON_PCILO_BASE LOONGSON_PCILO0_BASE 96#define LOONGSON_PCILO_SIZE 0x0c000000 /* 64M * 3 */ 97#define LOONGSON_PCILO_TOP (LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1) 98 99#define LOONGSON_PCICFG_BASE 0x1fe80000 100#define LOONGSON_PCICFG_SIZE 0x00000800 /* 2K */ 101#define LOONGSON_PCICFG_TOP (LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1) 102#define LOONGSON_PCIIO_BASE 0x1fd00000 103#define LOONGSON_PCIIO_SIZE 0x00100000 /* 1M */ 104#define LOONGSON_PCIIO_TOP (LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1) 105 106/* Loongson Register Bases */ 107 108#define LOONGSON_PCICONFIGBASE 0x00 109#define LOONGSON_REGBASE 0x100 110 111/* PCI Configuration Registers */ 112 113#define LOONGSON_PCI_REG(x) LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x)) 114#define LOONGSON_PCIDID LOONGSON_PCI_REG(0x00) 115#define LOONGSON_PCICMD LOONGSON_PCI_REG(0x04) 116#define LOONGSON_PCICLASS LOONGSON_PCI_REG(0x08) 117#define LOONGSON_PCILTIMER LOONGSON_PCI_REG(0x0c) 118#define LOONGSON_PCIBASE0 LOONGSON_PCI_REG(0x10) 119#define LOONGSON_PCIBASE1 LOONGSON_PCI_REG(0x14) 120#define LOONGSON_PCIBASE2 LOONGSON_PCI_REG(0x18) 121#define LOONGSON_PCIBASE3 LOONGSON_PCI_REG(0x1c) 122#define LOONGSON_PCIBASE4 LOONGSON_PCI_REG(0x20) 123#define LOONGSON_PCIEXPRBASE LOONGSON_PCI_REG(0x30) 124#define LOONGSON_PCIINT LOONGSON_PCI_REG(0x3c) 125 126#define LOONGSON_PCI_ISR4C LOONGSON_PCI_REG(0x4c) 127 128#define LOONGSON_PCICMD_PERR_CLR 0x80000000 129#define LOONGSON_PCICMD_SERR_CLR 0x40000000 130#define LOONGSON_PCICMD_MABORT_CLR 0x20000000 131#define LOONGSON_PCICMD_MTABORT_CLR 0x10000000 132#define LOONGSON_PCICMD_TABORT_CLR 0x08000000 133#define LOONGSON_PCICMD_MPERR_CLR 0x01000000 134#define LOONGSON_PCICMD_PERRRESPEN 0x00000040 135#define LOONGSON_PCICMD_ASTEPEN 0x00000080 136#define LOONGSON_PCICMD_SERREN 0x00000100 137#define LOONGSON_PCILTIMER_BUSLATENCY 0x0000ff00 138#define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT 8 139 140/* Loongson h/w Configuration */ 141 142#define LOONGSON_GENCFG_OFFSET 0x4 143#define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET) 144 145#define LOONGSON_GENCFG_DEBUGMODE 0x00000001 146#define LOONGSON_GENCFG_SNOOPEN 0x00000002 147#define LOONGSON_GENCFG_CPUSELFRESET 0x00000004 148 149#define LOONGSON_GENCFG_FORCE_IRQA 0x00000008 150#define LOONGSON_GENCFG_IRQA_ISOUT 0x00000010 151#define LOONGSON_GENCFG_IRQA_FROM_INT1 0x00000020 152#define LOONGSON_GENCFG_BYTESWAP 0x00000040 153 154#define LOONGSON_GENCFG_UNCACHED 0x00000080 155#define LOONGSON_GENCFG_PREFETCHEN 0x00000100 156#define LOONGSON_GENCFG_WBEHINDEN 0x00000200 157#define LOONGSON_GENCFG_CACHEALG 0x00000c00 158#define LOONGSON_GENCFG_CACHEALG_SHIFT 10 159#define LOONGSON_GENCFG_PCIQUEUE 0x00001000 160#define LOONGSON_GENCFG_CACHESTOP 0x00002000 161#define LOONGSON_GENCFG_MSTRBYTESWAP 0x00004000 162#define LOONGSON_GENCFG_BUSERREN 0x00008000 163#define LOONGSON_GENCFG_NORETRYTIMEOUT 0x00010000 164#define LOONGSON_GENCFG_SHORTCOPYTIMEOUT 0x00020000 165 166/* PCI address map control */ 167 168#define LOONGSON_PCIMAP LOONGSON_REG(LOONGSON_REGBASE + 0x10) 169#define LOONGSON_PCIMEMBASECFG LOONGSON_REG(LOONGSON_REGBASE + 0x14) 170#define LOONGSON_PCIMAP_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x18) 171 172/* GPIO Regs - r/w */ 173 174#define LOONGSON_GPIODATA LOONGSON_REG(LOONGSON_REGBASE + 0x1c) 175#define LOONGSON_GPIOIE LOONGSON_REG(LOONGSON_REGBASE + 0x20) 176 177/* ICU Configuration Regs - r/w */ 178 179#define LOONGSON_INTEDGE LOONGSON_REG(LOONGSON_REGBASE + 0x24) 180#define LOONGSON_INTSTEER LOONGSON_REG(LOONGSON_REGBASE + 0x28) 181#define LOONGSON_INTPOL LOONGSON_REG(LOONGSON_REGBASE + 0x2c) 182 183/* ICU Enable Regs - IntEn & IntISR are r/o. */ 184 185#define LOONGSON_INTENSET LOONGSON_REG(LOONGSON_REGBASE + 0x30) 186#define LOONGSON_INTENCLR LOONGSON_REG(LOONGSON_REGBASE + 0x34) 187#define LOONGSON_INTEN LOONGSON_REG(LOONGSON_REGBASE + 0x38) 188#define LOONGSON_INTISR LOONGSON_REG(LOONGSON_REGBASE + 0x3c) 189 190/* ICU */ 191#define LOONGSON_ICU_MBOXES 0x0000000f 192#define LOONGSON_ICU_MBOXES_SHIFT 0 193#define LOONGSON_ICU_DMARDY 0x00000010 194#define LOONGSON_ICU_DMAEMPTY 0x00000020 195#define LOONGSON_ICU_COPYRDY 0x00000040 196#define LOONGSON_ICU_COPYEMPTY 0x00000080 197#define LOONGSON_ICU_COPYERR 0x00000100 198#define LOONGSON_ICU_PCIIRQ 0x00000200 199#define LOONGSON_ICU_MASTERERR 0x00000400 200#define LOONGSON_ICU_SYSTEMERR 0x00000800 201#define LOONGSON_ICU_DRAMPERR 0x00001000 202#define LOONGSON_ICU_RETRYERR 0x00002000 203#define LOONGSON_ICU_GPIOS 0x01ff0000 204#define LOONGSON_ICU_GPIOS_SHIFT 16 205#define LOONGSON_ICU_GPINS 0x7e000000 206#define LOONGSON_ICU_GPINS_SHIFT 25 207#define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N))) 208#define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N))) 209#define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N))) 210 211/* PCI prefetch window base & mask */ 212 213#define LOONGSON_MEM_WIN_BASE_L LOONGSON_REG(LOONGSON_REGBASE + 0x40) 214#define LOONGSON_MEM_WIN_BASE_H LOONGSON_REG(LOONGSON_REGBASE + 0x44) 215#define LOONGSON_MEM_WIN_MASK_L LOONGSON_REG(LOONGSON_REGBASE + 0x48) 216#define LOONGSON_MEM_WIN_MASK_H LOONGSON_REG(LOONGSON_REGBASE + 0x4c) 217 218/* PCI_Hit*_Sel_* */ 219 220#define LOONGSON_PCI_HIT0_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x50) 221#define LOONGSON_PCI_HIT0_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x54) 222#define LOONGSON_PCI_HIT1_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x58) 223#define LOONGSON_PCI_HIT1_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x5c) 224#define LOONGSON_PCI_HIT2_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x60) 225#define LOONGSON_PCI_HIT2_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x64) 226 227/* PXArb Config & Status */ 228 229#define LOONGSON_PXARB_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x68) 230#define LOONGSON_PXARB_STATUS LOONGSON_REG(LOONGSON_REGBASE + 0x6c) 231 232/* pcimap */ 233 234#define LOONGSON_PCIMAP_PCIMAP_LO0 0x0000003f 235#define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT 0 236#define LOONGSON_PCIMAP_PCIMAP_LO1 0x00000fc0 237#define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT 6 238#define LOONGSON_PCIMAP_PCIMAP_LO2 0x0003f000 239#define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT 12 240#define LOONGSON_PCIMAP_PCIMAP_2 0x00040000 241#define LOONGSON_PCIMAP_WIN(WIN, ADDR) \ 242 ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) 243 244#ifdef CONFIG_CPU_SUPPORTS_CPUFREQ 245#include <linux/cpufreq.h> 246extern void loongson2_cpu_wait(void); 247extern struct cpufreq_frequency_table loongson2_clockmod_table[]; 248 249/* Chip Config */ 250#define LOONGSON_CHIPCFG0 LOONGSON_REG(LOONGSON_REGBASE + 0x80) 251#endif 252 253/* 254 * address windows configuration module 255 * 256 * loongson2e do not have this module 257 */ 258#ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG 259 260/* address window config module base address */ 261#define LOONGSON_ADDRWINCFG_BASE 0x3ff00000ul 262#define LOONGSON_ADDRWINCFG_SIZE 0x180 263 264extern unsigned long _loongson_addrwincfg_base; 265#define LOONGSON_ADDRWINCFG(offset) \ 266 (*(volatile u64 *)(_loongson_addrwincfg_base + (offset))) 267 268#define CPU_WIN0_BASE LOONGSON_ADDRWINCFG(0x00) 269#define CPU_WIN1_BASE LOONGSON_ADDRWINCFG(0x08) 270#define CPU_WIN2_BASE LOONGSON_ADDRWINCFG(0x10) 271#define CPU_WIN3_BASE LOONGSON_ADDRWINCFG(0x18) 272 273#define CPU_WIN0_MASK LOONGSON_ADDRWINCFG(0x20) 274#define CPU_WIN1_MASK LOONGSON_ADDRWINCFG(0x28) 275#define CPU_WIN2_MASK LOONGSON_ADDRWINCFG(0x30) 276#define CPU_WIN3_MASK LOONGSON_ADDRWINCFG(0x38) 277 278#define CPU_WIN0_MMAP LOONGSON_ADDRWINCFG(0x40) 279#define CPU_WIN1_MMAP LOONGSON_ADDRWINCFG(0x48) 280#define CPU_WIN2_MMAP LOONGSON_ADDRWINCFG(0x50) 281#define CPU_WIN3_MMAP LOONGSON_ADDRWINCFG(0x58) 282 283#define PCIDMA_WIN0_BASE LOONGSON_ADDRWINCFG(0x60) 284#define PCIDMA_WIN1_BASE LOONGSON_ADDRWINCFG(0x68) 285#define PCIDMA_WIN2_BASE LOONGSON_ADDRWINCFG(0x70) 286#define PCIDMA_WIN3_BASE LOONGSON_ADDRWINCFG(0x78) 287 288#define PCIDMA_WIN0_MASK LOONGSON_ADDRWINCFG(0x80) 289#define PCIDMA_WIN1_MASK LOONGSON_ADDRWINCFG(0x88) 290#define PCIDMA_WIN2_MASK LOONGSON_ADDRWINCFG(0x90) 291#define PCIDMA_WIN3_MASK LOONGSON_ADDRWINCFG(0x98) 292 293#define PCIDMA_WIN0_MMAP LOONGSON_ADDRWINCFG(0xa0) 294#define PCIDMA_WIN1_MMAP LOONGSON_ADDRWINCFG(0xa8) 295#define PCIDMA_WIN2_MMAP LOONGSON_ADDRWINCFG(0xb0) 296#define PCIDMA_WIN3_MMAP LOONGSON_ADDRWINCFG(0xb8) 297 298#define ADDRWIN_WIN0 0 299#define ADDRWIN_WIN1 1 300#define ADDRWIN_WIN2 2 301#define ADDRWIN_WIN3 3 302 303#define ADDRWIN_MAP_DST_DDR 0 304#define ADDRWIN_MAP_DST_PCI 1 305#define ADDRWIN_MAP_DST_LIO 1 306 307/* 308 * s: CPU, PCIDMA 309 * d: DDR, PCI, LIO 310 * win: 0, 1, 2, 3 311 * src: map source 312 * dst: map destination 313 * size: ~mask + 1 314 */ 315#define LOONGSON_ADDRWIN_CFG(s, d, w, src, dst, size) do {\ 316 s##_WIN##w##_BASE = (src); \ 317 s##_WIN##w##_MMAP = (dst) | ADDRWIN_MAP_DST_##d; \ 318 s##_WIN##w##_MASK = ~(size-1); \ 319} while (0) 320 321#define LOONGSON_ADDRWIN_CPUTOPCI(win, src, dst, size) \ 322 LOONGSON_ADDRWIN_CFG(CPU, PCI, win, src, dst, size) 323#define LOONGSON_ADDRWIN_CPUTODDR(win, src, dst, size) \ 324 LOONGSON_ADDRWIN_CFG(CPU, DDR, win, src, dst, size) 325#define LOONGSON_ADDRWIN_PCITODDR(win, src, dst, size) \ 326 LOONGSON_ADDRWIN_CFG(PCIDMA, DDR, win, src, dst, size) 327 328#endif /* ! CONFIG_CPU_SUPPORTS_ADDRWINCFG */ 329 330#endif /* __ASM_MACH_LOONGSON_LOONGSON_H */ 331