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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m68knommu/platform/68360/
1/*
2 *  linux/arch/m68knommu/platform/68360/config.c
3 *
4 *  Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
5 *  Copyright (C) 1993 Hamish Macdonald
6 *  Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License.  See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <stdarg.h>
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19
20#include <asm/setup.h>
21#include <asm/system.h>
22#include <asm/pgtable.h>
23#include <asm/machdep.h>
24#include <asm/m68360.h>
25
26#ifdef CONFIG_UCQUICC
27#include <asm/bootstd.h>
28#endif
29
30extern void m360_cpm_reset(void);
31
32// Mask to select if the PLL prescaler is enabled.
33#define MCU_PREEN   ((unsigned short)(0x0001 << 13))
34
35#if defined(CONFIG_UCQUICC)
36#define OSCILLATOR  (unsigned long int)33000000
37#endif
38
39unsigned long int system_clock;
40
41extern QUICC *pquicc;
42
43/* TODO  DON"T Hard Code this */
44/* calculate properly using the right PLL and prescaller */
45// unsigned int system_clock = 33000000l;
46extern unsigned long int system_clock; //In kernel setup.c
47
48
49static irqreturn_t hw_tick(int irq, void *dummy)
50{
51  /* Reset Timer1 */
52  /* TSTAT &= 0; */
53
54  pquicc->timer_ter1 = 0x0002; /* clear timer event */
55
56  return arch_timer_interrupt(irq, dummy);
57}
58
59static struct irqaction m68360_timer_irq = {
60	.name	 = "timer",
61	.flags	 = IRQF_DISABLED | IRQF_TIMER,
62	.handler = hw_tick,
63};
64
65void hw_timer_init(void)
66{
67  unsigned char prescaler;
68  unsigned short tgcr_save;
69
70
71  /* General purpose quicc timers: MC68360UM p7-20 */
72
73  /* Set up timer 1 (in [1..4]) to do 100Hz */
74  tgcr_save = pquicc->timer_tgcr & 0xfff0;
75  pquicc->timer_tgcr  = tgcr_save; /* stop and reset timer 1 */
76  /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
77
78  prescaler = 8;
79  pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
80                           (unsigned short)((prescaler - 1) << 8);
81
82  pquicc->timer_tcn1 = 0x0000; /* initial count */
83  /* calculate interval for 100Hz based on the _system_clock: */
84  pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
85
86  pquicc->timer_ter1 = 0x0003; /* clear timer events */
87
88  /* enable timer 1 interrupt in CIMR */
89  setup_irq(CPMVEC_TIMER1, &m68360_timer_irq);
90
91  /* Start timer 1: */
92  tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
93  pquicc->timer_tgcr  = tgcr_save;
94}
95
96void BSP_gettod (int *yearp, int *monp, int *dayp,
97		   int *hourp, int *minp, int *secp)
98{
99}
100
101int BSP_set_clock_mmss(unsigned long nowtime)
102{
103  return 0;
104}
105
106void BSP_reset (void)
107{
108  local_irq_disable();
109  asm volatile (
110    "moveal #_start, %a0;\n"
111    "moveb #0, 0xFFFFF300;\n"
112    "moveal 0(%a0), %sp;\n"
113    "moveal 4(%a0), %a0;\n"
114    "jmp (%a0);\n"
115    );
116}
117
118unsigned char *scc1_hwaddr;
119static int errno;
120
121#if defined(CONFIG_UCQUICC)
122_bsc0(char *, getserialnum)
123_bsc1(unsigned char *, gethwaddr, int, a)
124_bsc1(char *, getbenv, char *, a)
125#endif
126
127
128void config_BSP(char *command, int len)
129{
130  unsigned char *p;
131
132  m360_cpm_reset();
133
134  /* Calculate the real system clock value. */
135  {
136     unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
137     if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
138     {
139         int mf = (int)(pquicc->sim_pllcr & 0x0fff);
140         system_clock = (OSCILLATOR / 128) * (mf + 1);
141     }
142     else
143     {
144         int mf = (int)(pquicc->sim_pllcr & 0x0fff);
145         system_clock = (OSCILLATOR) * (mf + 1);
146     }
147  }
148
149  printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
150
151  scc1_hwaddr = "\00\01\02\03\04\05";
152
153  mach_gettod          = BSP_gettod;
154  mach_reset           = BSP_reset;
155}
156